Abstract: A cache system including a data cache memory comprising a plurality of cache lines. A tag store has an entry representing each line in the cache memory where each entry comprises tag information for accessing the data cache. The tag information includes state information indicating whether the represented cache line includes dirty data. A speculative write back unit monitors the state information and is operative to initiate a write back of a cache line having more than a preselected amount of dirty data.

Abstract: A method and system for creating and maintaining a journal of transactions directed to a configuration database is disclosed. A multi-threaded journaling method logs transactions in a configuration database by first receiving a database transaction, the transaction being either a single modification, e.g. insertion, deletion, update, or a series of modifications directed to the configuration database. An initial entry is inserted into a journal file where the initial entry includes a transaction identifier or handle that corresponds to the database transaction. Subsequent entries are inserted into the journal file corresponding to the specific updates of the transaction, the subsequent entry containing the transaction identifier and actual transaction data relating to the specific update. The journaling mechanism then determines whether each of the specific updates to the configuration database has been successfully completed.

Abstract: Stack tracebacks are performed in debugging and exception handling routines, and involve providing the values of non-volatile registers at the time of entry into each function in a call chain. One stack traceback technique includes performing the following two steps for each virtual address at which a function call in the call chain is made: (1) locating the tag section whose virtual address range includes the virtual address; and (2) locating a tag in the tag section found in step (1), whose virtual address range includes the virtual address. The tag found in step (2) indicates which of the values, if any, respectively held by the non-volatile registers upon entry to the particular function in which the above function call is made, are stored in a stack frame for the particular function at the time of the function call.

Abstract: Methods and apparatus are disclosed for providing a data framework and associated client/server protocol for storing and exchanging data among computers in a network. A data schema having an n-way tree-type structure with a root node layer, intermediate node layers, and a data layer for storing configuration data is described. The intermediate node layers contain a multitude of nodes containing categorical information relating to components and various aspects of the computer network. Following a tree structure, each intermediate node and root node has branches emanating to nodes below it. These subordinate nodes are referred to as children nodes. The data node layer is at the bottom of the tree and contains actual specific configuration data relating to components and other aspects of the computer network, such as information regarding users registered to use the network.

Abstract: A method and apparatus are provided for dynamically configuring authorized clients with the address of a protected host and the key and address of an intermediate device (e.g., encrypting firewall, encrypting router, secure gateway) which is protecting a number of hosts on a private network located topologically behind that intermediate device. The registered name server for a domain is configured to return a new resource record type, herein called an SX record, in response to requests for information needed for secure communications with protected hosts in that domain. The resolver on (or otherwise associated with) the authorized client is configured to use the data in the SX record to dynamically update the information used by the client to handle secure communications.

Abstract: A computer implemented method and apparatus for mounting a user removable media in a computer system includes acquiring a media identifier input and a function identifier input from a user of the computer system. The media identifier input identifies the user removable media, and the function identifier input specifies a mounting operation to be performed on the user removable media. The media identifier and the function identifier inputs are processed to access a system media interface of the computer system, for example, by converting the media identifier input to a physical path of the user removable media in the computer system, and determining if the physical path of the media identifier input is valid within the computer system. A simulated media event is generated to mount the user removable media in the computer system. If desired, a determination may be made whether the user has valid permission to control the user removable media identified by the media identifier input.

Abstract: A system and method for avoiding collision between objects and wingtips of an aircraft when the aircraft is on the ground includes mounting detecting devices such as a low cost radar unit and a video camera in the wingtip. These detection devices are coupled with one or more indicators to provide an operator of the aircraft such as a pilot that an imminent collision with an object is about the occur. The indication can be an audio or visual signal, either within or outside of the aircraft.

Abstract: A method and system are disclosed for updating and managing a configuration database used to store configuration and user data in a computer network having multiple clients, such as network computers. The transaction management mechanisms described determine whether new data, such as a new user or specific property, is being added to the configuration database or whether an existing node in the database is being modified by a transaction. A locking mechanism obtains a lock on a node according to whether a new node is being added to the configuration database or an existing node is being modified. During this process, an identifier is assigned to the transaction that caused the lock that acts as a transaction handle. The transaction then proceeds to modify the configuration database by either adding new data or modifying existing data.

Abstract: The present invention is a system and method for providing server selection for mirrored sites. In one embodiment, a user requests an address via a local name service (LNS), and the local name service requests the address from a server, examples of which include an authoritative name server, and a Optimizer Name Server (ONS). If the ONS has already calculated a best route which applies to this user, and a predetermined time applying to the best route has not yet expired, then the ONS replies to the user with the best route server. In one embodiment, the best route is determined by having the ONS server request from all the mirrored servers the round trip time to the LNS. This is accomplished by having each mirrored server respond to the LNS with a name query. In response, the LNS replies with an error message. The round trip time is measured from the time the name query was sent to the time the error message was received. Each mirrored server then sends the measured round trip time to the ONS.

Abstract: A digital computer includes an efficient mechanism by which an exception handler can traverse the instruction stream in a reverse direction to identify the instruction which gave rise to the exception condition after a discontinuity in an instruction stream. The digital computer is provided with both a program counter and an "old program counter." For points in an instruction sequence at which a discontinuity may occur, the "branch taken" portion of the instruction stream is provided with a predetermined type of instruction to enable the old program counter to be saved in a predetermined location. When the instruction is executed, the old program counter will contain a pointer to the "branch not taken" portion of the instruction sequence.

Abstract: One embodiment of the present invention provides a system for predicting an address of an instruction following a branch instruction in a computer instruction stream. This system receives a current address specifying an address of a current instruction. It uses this current address (or possibly a preceding address) to generate a first select signal, which is used to select a first predicted address of an instruction following the current instruction in the computer instruction stream. At the same time the system generates a second select signal, which takes more time to generate than the first select signal but achieves a more accurate selection for a predicted address of the instruction following the current instruction. The system assumes that the first predicted address is correct and proceeds with a subsequent instruction fetch operation using the first predicted address. Next, the system compares the first select signal with the second select signal.

Abstract: A method for handling Z-values in accordance with the present invention. The Z-values correspond to vertices of a given primitive being processed within a graphics pipeline. The Z-values received by the pipeline are represented in a first floating point format (such as IEEE floating point format) which includes a mantissa portion and an exponent portion. The method comprises determining which of the Z-values for the given primitive has the largest value of the exponent portion. In one embodiment, this includes comparing current exponent values to a current greatest exponent value until all Z-values are tested. The method subsequently comprises generating a common Z exponent value in response to determining the largest exponent value for the given primitive. In one embodiment, the common Z exponent value is generated by subtracting a constant value from the largest exponent value.

Abstract: A computer system employs a hierarchical ring structure for communication. Computer system elements are configured into modules with ring interface hardware, and the modules are coupled to one or more rings. Bridge modules may be included for transmitting between rings in the hierarchy. The rings are time division multiplexed, and each time slot on a ring carries a frame. According to an address carried within the frame, bridge modules determine whether or not to transmit a frame circulating on a source ring onto a target ring. If the address of the frame indicates a module upon the source ring, the bridge module retransmits the frame on the source ring. Otherwise, the bridge module transmits the frame on the target ring. The bridge module operates in this fashion at any level of the hierarchy. The owner of a time slot on a ring is permitted to release the time slot for use by other modules. To reclaim a time slot, the owner marks the time slot owned.

Abstract: A distributed multi-layer network element delivering Layer 2 (data link layer) wire-speed performance within and across subnetworks, allowing queuing decisions to be based on Layer 3 (network layer) protocol and endstation information combined with Layer 2 topology information. The network element performs packet relay functions using multiple switching subsystems as building blocks coupled to each other to form a larger switch that acts as both a router and a bridge. Each switching subsystem includes a hardware forwarding search engine having a switching element coupled to a forwarding memory and an associated memory. The switching subsystems and their fully meshed interconnection allow the network element to scale easily without compromising packet forwarding speed and without significantly increasing the storage requirements of each forwarding memory.

Abstract: The present invention organizes the circuits on a VLSI chip into clusters. A number of channels exist in-between the clusters. Blocks of repeaters are used in a linear array, and are placed adjacent the edges of the clusters where repeaters are estimated to be needed. The repeater cells themselves are preferably formed to have a width less than or equal to the width of a line track for routing lines such that an array of repeater cells can be lined up with an array of routing lines in a bus.

Abstract: An atomic instruction is executed without the use of a dedicated atomic unit. A store instruction is transmitted from a front-end of one of a plurality of processors to a write-cache to cause the write-cache to obtain exclusive access to a control memory of a shared resource. A first signal is then transmitted to the front end of the processor indicating that the write-cache has obtained exclusive access to the control memory of the shared source. At least one next instruction is executed, and a second signal is transmitted from the front end to the write cache indicating that execution of the at least one next instruction has been completed. Data from the write cache is stored in the control memory of the shared resource in response to the second signal transmitted to the write cache.

Abstract: In a system for dynamically linking a compiled procedure to referenced object components during execution of the compiled procedure, a native code loader loads the compiled procedure into a user's address space, and replaces a first instruction in the compiled procedure that references a first object component with a replacement instruction that invokes execution of a dynamic resolution procedure. While executing the compiled procedure, execution of the replacement instruction invokes execution of the dynamic resolution procedure. The dynamic resolution procedure locates the first object component, replaces the replacement instruction in the compiled procedure with a patch instruction, corresponding to the first instruction, that references the located first object component.

Abstract: A method for making an asymmetric MOS device having a notched gate oxide wherein a region of the gate oxide adjacent to either the source or drain is thinner than the remainder of the gate oxide. The resulting MOS device includes a channel under the notched region of the gate oxide with a relatively high concentration of mobile charge carriers.

Abstract: Arbiter circuits placed between two signal path segments on a semiconductor chip to measure the difference in propagation delay between those paths at their beginning and end. Each arbiter circuit has two inputs, and outputs signals indicating which of its inputs is the first to receive a leading edge of an input transition. External circuitry monitors the arbiter outputs, and accordingly controls the application of the input transitions. By varying the delay of the input signal paths, the relative propagation delay can be determined.