Abstract: A current operating system such as Solaris.RTM. X86 is adapted to run a user program such as a Common Object File Format (COFF) executable program which was designed to run on a retrograde operating system such as an older version of UNIX.RTM.. The operating system is adapted to include an emulator module or COFF interpreter which emulates retrograde system calls that are unique to the COFF system. A Local Descriptor Table (LDT) which is constructed for the COFF program includes a main system call gate and an alternate system call gate that initially both point to a system call entry point in the operating system kernel. Prior to running a COFF program, the main system call gate is revectored to point to the COFF interpreter, such that all system calls generated by the COFF program are directed to the COFF interpreter. The COFF interpreter redirects current system calls which are compatible with the current operating system to the kernel via the alternate call gate.

Abstract: A digital data processing system and method with shared, distributed memory transfers data between corresponding data sets within memory. The digital data processing system includes a plurality of processing cells interconnected by a hierarchical network, at least some of the processing cells including a processor and a memory. Each memory provides storage space which is arranged in sets, with each set being capable of holding a plurality of data pages. At least one of the processing cells, as a first processing cell, includes a page distributor for determining when at least a first set in the associated memory has reached a predetermined storage commitment condition (for example, a filled condition). Under such a condition, the page distributor invokes a page-transfer element that selects a candidate processing cell from among the other processing cells and transfers one or more pages from the first set to a corresponding set in the candidate processing cell.

Abstract: A multi-layer network element for forwarding received packets from an input port to one or more output ports. The packet is examined to look for first and second forwarding information. A packet is also assigned to a class and provided with default packet forwarding information. An associative memory is searched once for each type of information. The results from the two searches are combined with the default packet forwarding information to forward the packet to the appropriate one or more output ports. In some instances, the results of the first search dominate the forwarding decision, in other, the results of the second search dominate the forwarding decision, and in still other instances, the default information dominates.

Abstract: The present invention provides an electronic system which includes an integrated circuit chip having a processor, a memory controller and a bus interface. The bus interface is both a memory interface and a system interface and has at least one address pin line, at least one data transfer pin line and at least one control pin line and is coupled to the processor and the memory controller. An S-DRAM is coupled to the bus interface wherein the processor and the S-DRAM share the same address pin line and data transfer pin line reducing the number of pins necessary to interface with the system. A system interface bridge chip interconnects the bus interface to one or more peripheral devices and includes a protocol module for managing interactions on the bus interface between the processor, the S-DRAM and the system interface bridge chip. An electronic system is thus provided which reduces the number of pins that an integrated circuit chip needs for interfacing without reducing performance.

Abstract: To compensate for process, activity and environmental variations in a semiconductor device, a ratio of a transistor on-current to a transistor off-current within the semiconductor device is detected. The detected ratio is compared with a target ratio to adjust a bias potential of the semiconductor device to bring the detected ratio of the transistor on-current to the transistor off-current to the target ratio.

Abstract: A processor including at least one execution unit generating out-of-order results and out-of-order condition codes. Precise architectural state of the processor is maintained by providing a results buffer having a number of slots and providing a condition code buffer having the same number of slots as the results buffer, each slot in the condition code buffer in one-to-one correspondence with a slot in the results buffer. Each live instruction in the processor is assigned a slot in the results buffer and the condition code buffer. Each speculative result produced by the execution units is stored in the assigned slot in the results buffer. When an instruction is retired, the results for that instruction are transferred to an architectural result register and any condition codes generated by that instruction are transferred to an architectural condition code register.

Abstract: A layered counterflow pipeline structure is described in which sub-tasks performed at each stage in a counterflow pipeline processor are separated into different layers. As words flow through the counterflow pipeline processor, they are divided into partial words which are supplied to the different layers, GET, CHECK and PROCESS, for appropriate handling by that portion of each stage. In the GET layer, partial words passing through each stage are analyzed to determine whether they constitute an encounter pair. In the CHECK layer a determination is made as to whether the word selected by the GET layer requires further modification. Finally, in the PROCESS layer operations are performed on the words themselves based upon control messages from the other layers. The layers of the processor communicate with each other using suitable communication paths such as First In First Out registers.

Abstract: A distributed object application builder apparatus filters an object definition to determine the information needed (plugs) and provided (sockets) by an object. Each part (a run-time instance of an object) in the builder has plugs and sockets that are interconnected to other parts to define a distributed object application. At run time, actual instances of objects are substituted for the parts. A method of determining the plugs of an identified part begins by retrieving the interface (object definition) that corresponds to the part. Once retrieved, the plugs of the part are identified by determining the object-valued attributes of the retrieved interface, determining the operations from the retrieved interface that require one object-valued argument, and retrieving the factory argument list from the factory method for the object. These attributes and arguments constitute the plugs of the part. Sockets of a part are determined similarly.

Abstract: A method for determining bit element values for an impedance control circuit is provided which controls the output impedance of drivers which are coupled to the impedance control circuit. Accordingly, a desired driver output impedance can advantageously be established and maintained over a wide range of variations in operating conditions and manufacturing processes. Thereby shortening the signal settling time and increasing the attainable signaling frequency.

Abstract: A combination heating and cooling apparatus which comprises a compartment into which an item to be heated or cooled may be placed; an electromagnetic wave generator; wherein during a first mode of operation of the apparatus, the electromagnetic waves are directed into the compartment to heat the item; at least one sorber having a housing defining an enclosure; a sorbate/sorbent compound located within the enclosure; a waveguide for coupling electromagnetic waves generated by the electromagnetic wave generator to the sorber; wherein electromagnetic waves transmitted by the electromagnetic wave generator are propagated through the enclosure to desorb the sorbate from the sorbate/sorbent compound; a condenser connected to the sorber; an evaporator connected to both the condenser and the sorber and positioned in heat exchange relation with the compartment; and a controllable valve interposed between the condenser and the evaporator; wherein sorbate which is desorbed in the sorber is condensed in the condenser and

Abstract: An apparatus adjusts the duty cycle of a single-ended clock signal. The single-ended clock signal oscillates between first and second voltages. The apparatus includes an error indication circuit, a duty cycle error measurement circuit and a duty cycle adjuster. The error indication circuit includes a reference circuit and a comparison circuit. The reference circuit is coupled to a first node having the first voltage and a second node having the second voltage to generate a reference signal from the first and second voltages. The reference circuit includes at least one instance of a first electrical characteristic cell. The comparison circuit is coupled to receive a feedback clock signal and to generate a comparison signal therefrom. The comparison circuit includes at least one instance of the first electrical characteristic cell. The duty cycle error measurement circuit is coupled to receive the reference signal and the comparison signal.

Abstract: An access control database has access control objects that collectively store information that specifies access rights by users to specified sets of the managed objects. The specified access rights include access rights to obtain management information from the network. An access control server provides users access to the managed objects in accordance with the access rights specified by the access control database. An information transfer mechanism sends management information from the network to a database management system (DBMS) for storage in a set of database tables. Each database table stores management information for a corresponding class of managed objects. A set of views limits access to the management information stored in the database tables. Each view defines a subset of rows in the database tables that are accessible when using this view.

Abstract: An integrated three-tier application framework with automated class and database table generation. Schema information in the form of metadata structures is used to generate data classes for the client tier and the application tier. Corresponding client tier and application tier data classes implement a common interface that supports generalized access by other system components. Based on the schema information, factory classes are automatically generated for the client tier and application tier which permit instantiation of the generated data classes. Also, database configuration is automated by the generation of database table creation commands from the schema information.

Abstract: A method for controlling a microprocessor to transform data from a signed format to an unsigned format so that the data can be processed by unsigned instructions. In particular, a subtraction between two signed numbers can be transformed into a subtraction between two unsigned numbers.

Abstract: A system allows an administrator to edit, from a client, property files that reside on a server. The client issues a request to the server for property information for an application program. After receiving the property information, the client passes it to a configuration portion of the application program, where the property information is edited by the administrator. The client receives the edited property information and sends it to the server, where it is stored.

Abstract: A testing method in which the stages in a multi-stage counter chain are tested sequentially. A counter chain is composed of two or more stages with the carry-out signal from each stage being coupled to the carry-in signal of a subsequent stage. Various circuit modules may be clocked from intermediate stages in the counter chain. In the test mode, the carry-out signal from a given stage is latched once it is asserted. Thereafter, the subsequent stage counts at a higher rate. In this manner, each stage of the chain is run through a complete count, thus verifying the functionality of each stage. Further, the first stage finishes a complete count cycle before the second stage begins counting at a higher rate. A circuit module which is clocked by the output of the first stage is therefore able to complete an operation before any circuit modules clocked by subsequent stages are triggered.

Abstract: Apparatus, methods, and computer program products are disclosed for providing optimized access to pointer or externally-tagged primitive type data-values. The invention maintains a type identifier external to the variable that contains the data-value. The invention determines the type distribution of data-values stored in the variable and optimizes access to the variable accordingly. Some of these optimizations are targeted towards called routines and the call sites for the called routines. Other optimizations are targeted towards object-oriented programming language implementations. These optimizations generate optimized versions of a class/map. Objects are linked to the optimized versions of the class/map depending on the type configuration of the data-values stored in the object. Thus, the invention optimizes access to variables in the object when the object contains commonly used type configurations.

Abstract: A remote monitoring system automatically communicates system diagnostic information from a monitored computer system to a remote service center at regular intervals. The monitored computer system includes a plurality of monitored computers coupled together by a network. One of the monitored computers is a master and others of the monitored computers are slaves coupled to the master. The monitored computers store system diagnostic information resulting from execution of diagnostic programs. The diagnostic information from the slaves is collected at a memory location accessible by the master before the diagnostic information from all of the monitored computers is communicated to the remote monitoring computer system. The remote monitoring computer system receives the diagnostic information at predetermined intervals and incorporates the diagnostic information into a searchable database.

Abstract: A method and apparatus for providing spanning tree support are provided. According to one aspect of the present invention, a network device includes two or more ports that are part of a trunk. One of the two or more ports are selected for participation in a loop-free topology discovery protocol. Then, the loop-free topology discovery protocol is executed for the selected port. If the loop-free topology discovery protocol indicates the selected port is to be blocked, then all of the ports of the trunk are blocked. According to another aspect of the present invention, a set of states for association with each port of a network device is provided. The set of states includes a "blocked" state in which both learning and forwarding are inhibited, a "learn only" state in which learning is permitted and forwarding remains inhibited, and a "non-blocked" state in which both learning and forwarding are permitted.

Abstract: In accordance with the present invention a process is provided for allocating and deallocating resources in a distributed processing system having a requester platform and a server platform. The process involves receiving a request from the requestor platform referring to a system resource and specifying a requested lease period, permitting shared access to the system resource for a lease period, sending a return call to the requestor platform advising of the lease period, and deallocating the system resource when the lease period expires.