Abstract: A system and method for dynamically calculating margin for a set of computer resources (e.g., processors, disk storage, memory, communications). The headroom of a set of resources is equal to the total capacity of the resources minus a margin. Margin is a portion of the total capacity not to be used, so as to allow for acceptable response times. An initial margin may be selected using a graph plotting total resource utilization level percentage against response time. For a desired or acceptable response time factor, the initial margin is selected as 100% minus the utilization percentage that yields the selected response time factor. Then, as the workload is run, data are collected showing response times for different load levels. A modified curve is generated (e.g., using standard regression) and a new margin selected from that curve.

Abstract: A configuration state of a networked system is automatically adjusted to achieve optimal performance. The networked system is defined by a plurality of data exchange entities having one or more tunable parameters. Networked system performance is monitored and performance metrics are stored to a database. The performance metrics are analyzed along with network and system rules and constraints, and the particular configuration of the networked system. The tunable parameters are automatically adjusted to achieve optimal networked system performance.

Abstract: In one embodiment, a distributed simulation system may include a first node configured to participate in a simulation and a second node configured to transmit a hot pull command designating the first node. The first node does not participate in the simulation responsive to the hot pull command. In another embodiment, A distributed simulation system may include a first node configured to participate in a simulation and a second node configured to transmit a hot plug command designating the first node. The first node does not participate in the simulation prior to the hot plug command. Additionally, the first node begins participation in the simulation responsive to the hot plug command.

Abstract: A serial-write, random-access read, memory addresses applications where the data in the memory may change more frequently than would make a PROM suitable, but that changes much less frequently than would require a RAM. This enables the circuit designer to optimize the memory for fast reads, and enables reads to be pipelined. One embodiment of the present invention provides a system that facilitates a serial-write, random-access read, memory. The system includes a plurality of memory cells and a serial access mechanism for writing data into the plurality of memory cells. The system also includes a parallel random-access mechanism for reading data from the plurality of memory cells.

Abstract: Methods, systems, and articles of manufacture consistent with the present invention improve drawing operations for drawing an object that has object information onto a background image, which has background image information, already displayed on a display device. A sub-region of the object including at least one pixel intersected by a boundary of the object is determined, where the sub-region corresponds to a portion of the background image information. It is determined whether the portion of the background image information corresponding to the sub-region is stored locally with respect to a program or remotely with respect to the program. When it is determined that the portion of the background image information is stored locally, the portion of the background image information is retrieved locally to facilitate generating a redrawn sub-region of the object.

Abstract: A method of tagging a manufactured product with a passive tag includes processing a subset of a plurality of unique combinations of at least two axis ratios, where the subset is determinable by a plurality of parameters that define a portion of a coordinate space, to determine a first particular unique combination of the at least two axis ratios. A gas having the determined particular one unique combination of at least two axis ratios is incorporated into the manufactured product. The product to be tagged may be a first product, characterized by a first particular characteristic, and a second product is characterized by a second particular characteristic different from the first particular characteristic. The unique combination of at least two axis ratios is a first unique combination.

Abstract: An approach for allocating resources to an apparatus based on resource requirements generally involves a resource allocator receiving a request that specifies resource requirements for the apparatus. A resource allocator determines whether resources are available that satisfy the resource requirements. If resources are available that satisfy a resource requirement, the resource allocator indicates that the resource requirement is fulfilled and the resources are allocated to the apparatus. If resources are not available that satisfy a resource requirement, the resource allocator indicates that the resource requirement is not fulfilled and the resources are not allocated to the apparatus. The apparatus is implemented based on the allocated resources. A resource requirement can be optional so that if the optional resource requirement is not fulfilled, the apparatus can still be implemented.

Abstract: Methods and apparatuses are disclosed for transferring a method call from an invoke thread to an event dispatch thread. The invoke thread and the event dispatch thread may execute independent of one another and the event dispatch thread may have an associated queue. The method may include defining a new call on the invoke thread. The new call may include identification of a method, identification of an object, one or more arguments, and a coalescing indicator indicating a type of coalescing for the call. The method may further include sending, during execution of the invoke thread, the new call to the queue, one or more previous calls being stored in the queue, and coalescing the new call with one of the previous calls in the queue according to the type of coalescing indicated by the coalescing indicator.

Abstract: System and method for decentralized entity presence are described. Presence services may collaborate to form a presence service view on the network. A node providing an entity on the network may provide an entity advertisement to a presence service to advertise the entity's presence on the network. The presence information may be indexed locally by a presence service, and the indexes may be shared with one or more other presence services within the presence service view. A presence service may accept queries from nodes for a specific entity, and walk the query within the presence service view to locate the target entity. The query may then be forwarded to the node advertising the presence entity. The node providing the entity may respond directly to the querying node without going through the presence service. A presence contract may then be negotiated between the nodes without going through the presence service.

Abstract: Apparatus and processes, including computer implemented processes, for managing exceptions throwable during execution of methods in one or more classes by a machine. Each method includes an exception handler array defining exception handlers associated with the method. The method includes combining the exception handler arrays for all methods into a single exception handler table.

Abstract: A circuit for accessing an associative cache is provided. The circuit includes data selection circuitry and an outcome parallel processing circuit both in communication with the associative cache. The outcome parallel processing circuit is configured to determine whether an accessing of data from the associative cache is one of a cache hit, a cache miss, or a cache mispredict. The circuit further includes a memory in communication with the data selection circuitry and the outcome parallel processing circuit. The memory is configured to store a bank select table, whereby the bank select table is configured to include entries that define a selection of one of a plurality of banks of the associative cache from which to output data. Methods for accessing the associative cache are also described.

Abstract: A system that suppresses duplicative prefetches for branch target cache lines. During operation, the system fetches a first cache line into in a fetch buffer. The system then prefetches a second cache line, which immediately follows the first cache line, into the fetch buffer. If a control transfer instruction in the first cache line has a target instruction which is located in the second cache line, the system determines if the control transfer instruction is also located at the end of the first cache line so that a corresponding delay slot for the control transfer instruction is located at the beginning of the second cache line. If so, the system suppresses a subsequent prefetch for a target cache line containing the target instruction because the target instruction is located in the second cache line which has already been prefetched.

Abstract: Method and apparatus for the self-organization of nodes into groups in network computing environments. Embodiments may provide the ability to deploy nodes on a network, and to allow the nodes to organize into groups without human intervention. In one embodiment, a node may broadcast a query looking for a master node for the group. If the query produces no responses, the node may self-elect as the master node for the group and the node may broadcast its presence as the master node. If two or more nodes self-elect as master nodes, the nodes may negotiate to determine which node will be the master node. If the master node becomes unavailable, the remaining nodes in the group may elect a new master node. Some embodiments may be implemented on a peer-to-peer platform, such as the JXTA peer-to-peer platform, which may allow the scope of the group to span subnetworks and networks.

Abstract: A mechanism is disclosed for logging system messages in an operating system environment that has been partitioned into a global zone and one or more non-global zones. Each of the zones is associated with a separate log device node. A separate syslogd process executes in association with each zone. Each zone is associated with a separate virtual file system that contains a separate log file. Application processes executing in association with a zone can send messages to the log device node for that zone. The syslogd process executing in association with a zone reads messages from that zone's log device and writes at least some of the messages into that zone's log file. Consequently, the system logging ability is maintained in all of the zones, while isolating the processes and data in each zone from the processes and data in each other non-global zone.

Abstract: A client-server system for downloading a data file from a server to a client with real time verification. The system including a server. The server including a data file, and a verification file. The verification file containing first error detection data associated with the data file. The system also including a client which communicates with the server through a network. The client including a download manager for downloading the data file from the server to the client. When the download manager downloads at least a portion of the data file, the download manager generates second error detection data associated with the data file and compares the first and second error detection data to determine if errors occurred in the data file.

Abstract: Modular multiplication of two elements X(t) and Y(t), over GF(2), where m is a field degree, may utilize field degree to determine, at least in part, the number of iterations. An extra shift operation may be employed when the number of iterations is reduced. Modular multiplication of two elements X(t) and Y(t), over GF(2), may include a shared reduction circuit utilized during multiplication and reduction. In addition, a modular multiplication of binary polynomials X(t) and Y(t), over GF(2), may utilize the Karatsuba algorithm, e.g., by recursively splitting up a multiplication into smaller operands determined according to the Karatsuba algorithm.

Abstract: Embodiments of an encoding circuit to communicate a sequence of words are described. This encoding circuit includes an encoding module that is configured to receive a first sequence of words and to generate a DC-balanced second sequence of words based on the first sequence of words, where communicating the second sequence of words consumes less energy than communicating a third sequence of words that includes words in the first sequence of words alternating with words in the inverse of the first sequence of words. In addition, the second sequence of words includes substantially twice as many words as the first sequence of words.

Abstract: A system and method for detecting and preventing race conditions in a circuit is provided. The system includes a first memory element for receiving a data stream. The system further includes a plurality of additional memory elements for directly receiving an output of the data stream from the first memory element. Delay elements are defined between the first memory element and the plurality of additional memory elements other than a second memory element, so that each delay element between the first memory element and the plurality of additional memory elements other than the second memory element are combined to define a sum delay. A plurality of comparators are connected to the plurality of memory elements such that each comparator being configured to compare an input to the first memory element and an output of each of the plurality of additional memory elements.

Abstract: In one embodiment, a processor comprises a branch prediction array, an index generator coupled to the branch prediction array, and a control unit coupled to the index generator. The branch prediction array is configured to store a plurality of branch predictions for conditional branches. The index generator is configured to generate an index to the branch prediction array responsive to at least a portion of a fetch address corresponding to a fetch request that is at a first pipeline stage of the processor and further responsive to a branch history. The control unit is configured to update the branch history responsive to a first fetch request at the first pipeline stage and to defer the update for a second fetch request to a second pipeline stage subsequent to the first pipeline stage.

Abstract: A method for cooling electronic equipment. The method including propagating air through a first electronic component of the electronic equipment into a first enclosed area, where propagating the air through the first electronic component cools the first electronic component, circulating a refrigerant in a cooling loop, where the cooling loop comprises a heat exchanger, and propagating the air out of the first enclosed area by passing through the heat exchanger into a second enclosed area, where the air is cooled by passing through the heat exchanger.