Patents Assigned to Technologies AG
  • Patent number: 7816198
    Abstract: A semiconductor device and method of manufacturing thereof. The semiconductor device has at least one NMOS device and at least one PMOS device provided on a substrate. An electron channel of the NMOS device is aligned with a first direction. A hole channel of the PMOS device is aligned with a different second direction that forms an acute angle with respect to the first direction.
    Type: Grant
    Filed: July 10, 2007
    Date of Patent: October 19, 2010
    Assignee: Infineon Technologies AG
    Inventors: Martin Ostermayr, Winfried Kamp, Anton Huber
  • Patent number: 7816759
    Abstract: An integrated circuit including a substrate and trench isolation regions. The substrate supports a device. The trench isolation regions are configured to laterally isolate the device. The trench isolation regions extend substantially through the substrate.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: October 19, 2010
    Assignee: Infineon Technologies AG
    Inventor: Armin Tilke
  • Patent number: 7816997
    Abstract: An antenna multiplexer with a pi-network circuit is described, having an inductance connected in series and, on each of the two connection sides of the inductance, a capacitance connected in parallel. The pi-network circuit is used for effecting an impedance mismatch of a signal path of the antenna multiplexer.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: October 19, 2010
    Assignee: Infineon Technologies AG
    Inventors: Hans-Peter Forstner, Bernhard Gebauer, Ngoc-Hoa Huynh
  • Patent number: 7816235
    Abstract: A semiconductor package includes a rewiring substrate and a semiconductor chip. The semiconductor chip includes: a first face with an active surface including integrated circuit devices and chip contact pads, a second face lying in a plane essentially parallel to the first face and side faces. Each side face of the semiconductor chip lies in a plane essentially perpendicular to the first and second faces. At least one edge between two mutually essentially perpendicular faces of the semiconductor chip includes a surface.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: October 19, 2010
    Assignee: Infineon Technologies AG
    Inventors: Kai Chong Chan, Charles Wee Ming Lee, Gerald Ofner
  • Publication number: 20100259857
    Abstract: An integrated circuit including ESD device is disclosed. One embodiment includes a semiconductor region being electrically isolated from adjacent semiconductor regions by an isolating region. Both an ESD device and a device configured to emit radiation are formed within the semiconductor region.
    Type: Application
    Filed: April 9, 2009
    Publication date: October 14, 2010
    Applicant: Infineon Technologies AG
    Inventors: Michael Mayerhofer, Joost Willemen, David Johnsson
  • Patent number: 7812592
    Abstract: The subject matter of the present invention is a method for monitoring a photovoltaic generator (1) for generating current with a number of solar cells connected between two external connections by repeated feeding of a current with a frequency spectrum into the generator current circuit, detecting thereby a respective frequency response in the frequency spectrum with the supplied current as the input variable and an electric variable of the generator as the output variable, and detecting a change in the frequency response for monitoring the photovoltaic generator (1) in the event of a change during repeated feeding.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: October 12, 2010
    Assignee: SMA Solar Technology AG
    Inventors: Oliver Prior, Ralf Juchem, Matthias Victor, Oliver Frank, Juergen Schlabbach
  • Patent number: 7814384
    Abstract: An electrical diagnostic circuit and testing method is disclosed. In one embodiment, the electrical diagnostic circuit for testing an integrated circuit includes a number of external inputs, a plurality of essentially similar, series-connected switching units and a circuit output. The switching units are constructed to be controllable in such a manner that an input signal present at the internal input of the switching unit, in dependence on a control signal of the switching unit, can either be forwarded unchanged to the internal input of the switching unit in each case arranged downstream, or can be combined with the test signal in each case present at the external input.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: October 12, 2010
    Assignee: Infineon Technologies AG
    Inventors: Michael Goessel, Andreas Leininger
  • Patent number: 7812424
    Abstract: Structures and methods of forming moisture barrier capacitor on a semiconductor component are disclosed. The capacitor is located on the periphery of a semiconductor chip and includes an inner plate electrically connected to a voltage node, an outer plate with fins for electrically connecting to a different voltage node.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: October 12, 2010
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Barth, Helmut Horst Tews
  • Patent number: 7814396
    Abstract: Checking an error recognition functionality of a memory circuit including a memory that stores a datum, and a check value circuit that executes the error recognition functionality, is performed by a monitoring circuit. The memory circuit provides the datum to the check value circuit, wherein the check value circuit checks the datum provided thereto for errors and outputs an error signal if an error is present. The monitoring circuit is coupled to the check value circuit and influences the check value circuit, the memory circuit or the datum provided to the check value circuit so that the check value circuit discovers an error in a check in a case of correct execution of the error recognition functionality, and outputs an alarm signal if the check value circuit does not output an error signal upon the influence of the monitoring circuit.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: October 12, 2010
    Assignee: Infineon Technologies AG
    Inventors: Marcus Janke, Peter Laackmann
  • Patent number: 7812427
    Abstract: A semiconductor component includes a semiconductor body and a second semiconductor zone of a first conductivity type that serves as a rear side emitter. The second semiconductor zone is preceded by a plurality of third semiconductor zones of a second conductivity type that is opposite to the first conductivity type. The third semiconductor zones are spaced apart from one another in a lateral direction. In addition, provided within the semiconductor body is a field stop zone spaced apart from the second semiconductor zone, thereby reducing an electric field in the direction toward the second semiconductor zone.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: October 12, 2010
    Assignee: Infineon Technologies AG
    Inventors: Anton Mauder, Hans-Peter Felsl, Manfred Pfaffenlehner, Hans-Joachim Schulze
  • Patent number: 7811862
    Abstract: According to one embodiment, an electronic package includes a semiconductor die, a heat sink and a metallization layer interposed between the semiconductor die and the heat sink. The metallization layer attaches the semiconductor die to the heat sink. The metallization layer has a thickness of about 5 ?m or less and a thermal conductivity of about 60 W/m·K or greater.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: October 12, 2010
    Assignee: Infineon Technologies AG
    Inventors: Anwar A. Mohammad, Soon Ing Chew
  • Patent number: 7812373
    Abstract: A circuit array includes a plurality cells, wherein each cell has at least one group of odd fins. The cells may be arranged in a repeating pattern that includes mirror images of the pattern. A plurality of fin forming regions are provided about which the fins are formed for the dual fin and single fin transistors.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: October 12, 2010
    Assignee: Infineon Technologies AG
    Inventors: Florian Bauer, Klaus von Arnim
  • Patent number: 7811860
    Abstract: A method for producing a device and a device is disclosed. In one embodiment, a component is surrounded by a material. A fluoropolymer-containing compound is produced at a surface of the material. A molding is produced from a material and a fluoropolymer-containing compound is produced at a surface of the molding by a vapor deposition.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: October 12, 2010
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Markus Brunnbauer, Manfred Mengel, Christof Matthias Schilz
  • Patent number: 7813818
    Abstract: An electric power distribution switchboard (1) in which one or more functional units are equipped with a switching device compartment (3) that integrates primary and secondary functions. Within the switching device compartment (3) are included, together with the switching device (37), the current and voltage sensors (36), the position sensors for interlocking, a human machine interface (HMI) and an Intelligent Electronic Device (IED) (4) and the related local configuration point (32) to configure the IED (4). The IED (4) realizes functional unit supervision, control, protection, communication and monitoring and acts as a concentrating point of functional unit information and decisions. The switchboard (1) of the invention further comprises power supply section, an I/O section and a communication system.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: October 12, 2010
    Assignee: ABB Technology AG
    Inventors: Carlo Gemme, Paolo Gritti, Alessandro Colombo, Christian Reuber, Pentti Mahonen, Marty Trivette
  • Patent number: 7813414
    Abstract: A transceiver apparatus and a method comprise detecting means for detecting messages, wherein the detecting means comprises a first detector arranged to operate over a first detection period and which output indicates the beginning of a message with a first detection probability, and a second detector arranged to operate over a second detection period and which output indicates the detection of the beginning of a message with a second detection probability. The second detection probability is higher than the first detection probability and the transceiver apparatus is arranged to receive the message if the second detector indicates detection of the beginning of a message.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: October 12, 2010
    Assignee: Infineon Technologies AG
    Inventor: Michael Lewis
  • Patent number: 7812368
    Abstract: The invention relates to a high-speed diode comprising a semiconductor body (1), in which a heavily n-doped zone (8), a weakly n-doped zone (7) and a weakly p-doped zone (6) are arranged successively in a vertical direction (v), between which a pn load junction (4) is formed. A number of heavily p-doped islands (51-57) spaced apart from one another are arranged in the weakly p-doped zone (6). In this case, it is provided that the cross-sectional area density of the heavily p-doped islands (51-57) is smaller in a first area region (100) near to the edge than in a second area region (200) remote from the edge.
    Type: Grant
    Filed: May 23, 2006
    Date of Patent: October 12, 2010
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Franz-Josef Niedernostheide, Reiner Barthelmess
  • Patent number: 7813289
    Abstract: An electrical idle detection circuit including a full wave rectifier and a first amplifier. The full wave rectifier is configured to receive differential input signals and provide a rectified output signal based on the differential input signals. The first amplifier is configured to receive a first input signal based on the rectified output signal and a second input signal based on a reference signal. The first amplifier is configured to provide an output signal that indicates the differential input signals are one of active and in electrical idle based on the first input signal and the second input signal.
    Type: Grant
    Filed: February 2, 2006
    Date of Patent: October 12, 2010
    Assignee: Infineon Technologies AG
    Inventors: Hamid Partovi, Karthik Gopalakrishnan, Luca Ravezzi
  • Patent number: 7813153
    Abstract: An inverter (1) for feeding electric power into a utility grid (7) or into a load is described. The inverter (1) contains direct voltage inputs (2, 3), one first intermediate circuit (8) connected thereto and comprising two series connected capacitors (C1, C2) that are connected together at a ground terminal (14), two alternating voltage outputs (5, 6) of which one at least is provided with a grid choke (L1) and one bridge section (10).
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: October 12, 2010
    Assignee: SMA Solar Technology AG
    Inventors: Peter Zacharias, Jens Friebe, Felix Blumenstein, Ann-Katrin Gerlach, Jan Scheuermann, Matthias Zin
  • Patent number: 7811639
    Abstract: Apparatus for paint or lacquer coating of a sheet capable of coiling that has precisely one drive, which is assigned in effect to a second coiling mount, wherein essentially no further means of influencing the running characteristics of the sheet are provided for.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: October 12, 2010
    Assignee: Advanced Photonics Technologies AG
    Inventor: Kai K. O. Bär
  • Patent number: 7813097
    Abstract: An error detection apparatus for detecting an error in a power signal output by an external device switchable by a switching signal has a comparing unit for comparing the power signal with a reference signal to yield a comparison signal, a switching unit for providing the switching signal dependent on a control signal with the switching unit being designed to disregard the control signal and to ensure that the external device is switched off upon provision of a triggering signal to the switching unit, and a triggering unit for providing the triggering signal depending on the control signal and the comparison signal. Alternatively, the error detection apparatus has an influencing unit for influencing the power signal, such that the power signal fulfils a predetermined relationship to a reference signal in the case of an occurrence of the error, whereas the relationship is not fulfilled in the absence of the error.
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: October 12, 2010
    Assignee: Infineon Technologies AG
    Inventor: Jing Hu