Patents Assigned to TECHNOLOGIES INC.
  • Patent number: 12314169
    Abstract: A storage device processes deferred unmap operations while maintaining instructions in a write command. A controller in a storage device receives an unmap command and a write command from a host, determines that a logical page in the write command overlaps with a range in the unmap command with deferred unmap operations, and processes the write command. In processing the write command, an L2P translation manager sets a collision bit for the logical page and updates a L2P table. When processing the deferred unmap operations, the controller selects the range and if, based on collision bits in the range the controller determines that there is no overlap between the write command and the range, the controller performs the deferred unmap operations for the range. If the controller determines that there is an overlap, the controller processes the deferred unmap operations to not override the write command.
    Type: Grant
    Filed: September 26, 2023
    Date of Patent: May 27, 2025
    Assignee: SANDISK TECHNOLOGIES INC
    Inventors: Naga Shankar Vadalamani, Nagi Reddy Chodem, Ramdas Jayant Singathiya
  • Patent number: 12316146
    Abstract: A charger prevents charging of a wearable device battery when sweat or another conductive contaminant is present. The charger initially provides a low voltage to detect when the wearable device is engaged. When the wearable device is engaged, a measured current value exceeds a threshold minimum value. If sweat or another conductive contaminant is present, the additional conductive pathway provided by the contaminant will cause the measured value to exceed a threshold maximum, and charging of the battery is prevented. If a contaminant is not present, the measured value will be greater than the threshold minimum and less than the threshold maximum. A higher voltage may then be provided to charge the battery. When the device is removed from the charger, the measured value will decrease below the threshold minimum and the charger may return to providing low voltage to detect engagement of the device.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: May 27, 2025
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Nayana Teja Chiluvuri, Fu-Pang Hsu, Xunwei Yu, Zhao Xu, Ming Feng, Chang Hwa Rob Yang, Shelby Ovrom
  • Patent number: 12317483
    Abstract: Embodiments relate to a semiconductor structure and a method for fabricating. The semiconductor structure includes: a substrate, word lines, bit lines, and word line isolation structures. Active pillars arranged in an array are provided on a surface of the substrate, and the active pillars include channel regions, and a top doped region positioned on an upper side of the channel region and a bottom doped region positioned on a lower side of the channel region. The word lines extend along a first direction and surround the channel regions of a row of the active pillars arranged along the first direction. The bit lines extend along a second direction and are electrically connected to the bottom doped regions of a column of the active pillars arranged along the second direction, and in a direction facing away from the surface of the substrate.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: May 27, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Guangsu Shao, Deyuan Xiao
  • Patent number: 12317484
    Abstract: Embodiments provide a semiconductor structure and a fabrication method. The method includes: providing a semiconductor substrate, the semiconductor substrate being provided with a plurality of first bit lines extending along a first direction; forming a first transistor array on the semiconductor substrate, the first transistor array including a plurality of first semiconductor pillars; forming first word lines, each of the plurality of first semiconductor pillars being connected to a corresponding one of the first word lines and a corresponding one of the plurality of first bit lines; forming a second transistor array on the first transistor array, the second transistor array including a plurality of second semiconductor pillars, and the plurality of first semiconductor pillars being corresponding to the plurality of second semiconductor pillars one to one; and forming second word lines and second bit lines to form a 2T0C semiconductor structure.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: May 27, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Guangsu Shao, Deyuan Xiao
  • Patent number: 12315839
    Abstract: A wafer bonding device includes: a first fixing apparatus fixing a first wafer, on which a first alignment mark is disposed; a second fixing apparatus fixing a second wafer, on which a second alignment mark is disposed, the second fixing apparatus being disposed opposite to the first fixing apparatus; a reflection member between the first and second fixing apparatuses; a mark reader which reads position information about the first and second alignment marks by means of the reflection member, for aligning the first wafer with the second wafer; and a heating apparatus, configured to heat the first wafer or the second wafer to thermally expand the first wafer or the second wafer so that the first alignment mark or the second alignment mark is located at a central position of a field of view of the mark reader. A wafer bonding method also is involved.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: May 27, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Chih-Wei Chang
  • Patent number: 12315090
    Abstract: Devices and techniques are described for augmented reality virtual makeup try-on. In some examples, first image data representing at least a portion of a human face may be received. A selection of a first virtual makeup asset from a first catalog entry may be received. A first color value and a first finish type of the first virtual makeup asset may be determined. The first color value may be predicted from an image of the first virtual makeup asset in the first catalog entry. The first finish type may be predicted from first text data included in the first catalog entry. A first 3D model of an application of the first virtual makeup asset may be generated based on a 3D mesh of at least the portion of the human face. Second image data may be generated based on the first 3D model and the first image data.
    Type: Grant
    Filed: March 23, 2023
    Date of Patent: May 27, 2025
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Rahul Suresh, Amin Banitalebi Dehkordi, Sabiha Mahek Ahmed, Yury Lizunov, Radhika Deodhar, Siliang Liu
  • Patent number: 12317470
    Abstract: The present disclosure provides a semiconductor device, a semiconductor structure and a formation method thereof, and relates to the field of semiconductor technologies. The formation method includes: providing a substrate, and forming a sacrificial layer on the substrate; patterning the sacrificial layer to form trenches and through holes distributed side by side in the sacrificial layer; forming insulating layers covering a sidewall of the trench and a sidewall of the through hole; sequentially forming a conductive layer and a passivation layer in the trench and the through hole to form a bitline structure in the trench; and removing the passivation layer in the through hole to form a capacitor contact structure in the through hole.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: May 27, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Ping-Heng Wu
  • Patent number: 12317503
    Abstract: The present disclosure relates to the technical field of semiconductor manufacturing, and in particular, to a memory device, and a manufacturing method and a driving method thereof. The memory device includes: a substrate; a stacked structure, where the stacked structure includes a first gate layer, a second gate layer, and interlayer isolation layers, one of the interlayer isolation layers is located between the first gate layer and the second gate layer, and another one of the interlayer isolation layers is located between the first gate layer and the substrate; and a memory structure, including a through hole penetrating the stacked structure, and a trench structure filled in the through hole. The present disclosure enables the memory device to be used as nonvolatile memory with different storage modes, thereby realizing versatility of the memory device.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: May 27, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Shuai Guo, Mingguang Zuo, Shijie Bai
  • Publication number: 20250162775
    Abstract: In one aspect, a moisture scavenging film comprises a moisture barrier layer and a sealant layer comprising an active co-continuous polymer material, the sealant layer disposed on the moisture barrier layer. In another aspect, a method for producing flexible packaging film including a moisture scavenging film includes providing a moisture barrier layer and providing a sealant layer comprising an active co-continuous polymer material. The sealant layer is applied onto the moisture barrier layer while maintaining a co-continuous morphology of the active co-continuous polymer material. In yet another aspect, a packaging article formed from a moisture scavenging film is provided.
    Type: Application
    Filed: November 19, 2024
    Publication date: May 22, 2025
    Applicants: PROAMPAC HOLDINGS INC., CSP TECHNOLOGIES, INC.
    Inventors: Samuel J. Kessler, William F. Spano, Jedidiah L. Chubb, Amir Saffar, Seyed Hesamoddin Tabatabaei
  • Publication number: 20250165194
    Abstract: A memory circuit at least includes a plurality of memory banks, where each of the memory banks includes a first memory sub-bank, a second memory sub-bank and a third memory sub-bank sequentially arranged, the second memory sub-bank including a first memory section and a second memory section, the first memory sub-bank and the second memory section being configured to store upper bytes, and the first memory section and the third memory sub-bank being configured to store lower bytes.
    Type: Application
    Filed: January 22, 2025
    Publication date: May 22, 2025
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: SUNGSOO CHI
  • Publication number: 20250168852
    Abstract: A user equipment (UE) is disclosed. The UE includes a receiver and a processor that receive a radio resource control (RRC) signal including uplink (UL) sounding reference signal (SRS) configuration information. The UE also receives a semi-persistent scheduling (SPS) message to activate transmission of UL SRSs The UE may then transmit UL SRSs in a time and frequency pattern based on at least the UL SRS configuration information. A UE method and an eNode-B are also disclosed.
    Type: Application
    Filed: January 17, 2025
    Publication date: May 22, 2025
    Applicant: WIRELESS FUTURE TECHNOLOGIES INC.
    Inventors: Kari Juhani Hooli, AJit Kahaduwe, Timo Erkki Lunttila, Karri Markus Ranta-Aho, Antti Anton Toskala
  • Publication number: 20250165560
    Abstract: In some examples, an apparatus may include analyzing a sample, and analyzing at least one reference sample. A determination may be made as to whether the sample includes a library match score. Based on a determination that the sample includes the library match score, the library match score and a retention time may be analyzed to determine similarity between the sample and the at least one reference sample.
    Type: Application
    Filed: December 26, 2023
    Publication date: May 22, 2025
    Applicant: AGILENT TECHNOLOGIES, INC.
    Inventors: Zhi-Quan YUAN, Dong FANG, Shumin JING, Yunfei LI, Chen ZHENG, Xinyu GUO, Brandon CHUI
  • Publication number: 20250157562
    Abstract: A storage device processes storage-free stuck bits information when writing and reading stored on the memory device. A controller encodes the data with cyclic error-correcting codes to generate a codeword and determines that a location in the memory device where codeword is be stored includes a stuck bit. Rather than storing the stuck bits information, when storing the codeword, the controller generates an encoding mask, adds the encoding mask to the codeword to generate encoded data, and stores the encoded data on the memory device. When reading the encoded data, the controller generates a list of decoding masks including the encoding mask, goes through the lists and adds a decoding mask to the encoded data. The controller decodes the encoded data with the encoding mask from the list and returns the data.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 15, 2025
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: ROBERT MATEESCU, CYRIL GUYOT, IVANA DJURDJEVIC
  • Publication number: 20250157482
    Abstract: Techniques are described for generating parallel data for real-time speech form conversion. In an embodiment, based at least in part on input speech data of an original form, a speech machine learning (ML) model generates parallel speech data. The parallel speech data includes the input speech data of the original form and temporally aligned output speech data of a target form different than the original form. Each frame of the input speech data temporally corresponds to the corresponding output speech frame of the target speech form and contains a same portion of the particular content. The techniques further include training a teacher machine learning model that is offline and is substantially larger than a student machine learning model for converting speech form. Transferring “knowledge” from the trained Teacher model for training the Production Student Model that performs the speech form conversion on an end-user computing device.
    Type: Application
    Filed: January 15, 2025
    Publication date: May 15, 2025
    Applicant: KRISP TECHNOLOGIES, INC.
    Inventors: STEPAN SARGSYAN, ARTUR KOBELYAN, LEVON GALOYAN, KAJIK HAKOBYAN, RIMA SHAHBAZYAN, DANIEL BAGHDASARYAN, RUBEN HASRATYAN, NAIRI HAKOBYAN, HAYK ALEKSANYAN, TIGRAN TONOYAN, ARIS HOVSEPYAN
  • Patent number: 12296160
    Abstract: An electro-therapy device that generates a mixed electrical signal through electrodes, wherein the mixed electrical signal is a combination of at least two different frequencies, a first frequency having a first minimum and maximum microamp range and a second frequency having a different second minimum and maximum microamp range. The higher of the two frequencies is superimposed on the lower frequency, creating a current intensity window as an envelope along a profile of the lower frequency. The mixed electrical signal is automatically applied for a pre-determined period of time, and amplitude and/or duration and/or frequencies is varied according to a pre-set schedule.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: May 13, 2025
    Assignee: FAST TRACK TECHNOLOGIES, INC.
    Inventor: Geoffrey Pfeifer
  • Patent number: 12302555
    Abstract: Provided is a method for forming a bit line contact structure, including: successively disposing a first mask layer, a second mask layer, and a photoresist on a surface of a substrate on which word lines and a protection layer are provided, patterning the photoresist; successively etching the second and the first mask layers with the patterned photoresist to form a first opening; disposing a sacrificial layer on a surface of the second mask layer to form a second opening having an opening width smaller than that of the first opening; etching a surface of the protection layer to form a third opening with the second opening and meanwhile removing the remaining sacrificial layer to expose the first opening; and etching through the protection layer with the first opening and the third opening to form a bit line contact hole at the surface of the substrate.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: May 13, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Xiayu Shi
  • Patent number: 12297132
    Abstract: This specification describes a membrane aerated biofilm reactor (MABR) and processes for nitritation, nitritation-denitritation or deammonification. The supply of oxygen through the gas-transfer membrane is limited to suppress the growth of nitrite oxidizing bacteria (NOB). Exhaust gas from an MABR unit may have an oxygen concentration of 4% or less. The process can optionally include one or more of: intermittent (batch) feed of process air; process air modulation; process air direction reversal; process air recycle; and, process air cascade flow. The process can optionally include adding a seed sludge containing anammox to a reactor, optionally after pre-treatment and selection. The process can optionally include pre-seeding an MABR media.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: May 13, 2025
    Assignee: BL TECHNOLOGIES, INC.
    Inventors: John David Ireland, Zebo Long, Daniel Coutts, Dwight Cornelius Houweling, Jeffrey Gerard Peeters, Moreno Di Pofi, Sven Baumgarten
  • Patent number: 12300280
    Abstract: Methods and apparatus of identifying a substrate suitable for a magnetic medium of a data storage device configured for magnetic recording are described. In an aspect, the method includes determining a roll-off value, a ski-jump value, and a radial-waviness value, each associated with an outer diameter (OD) edge region of a data surface of the substrate, and determining a calculated minimum fly height between a slider of the data storage device and a data surface of the substrate in the OD edge region based on the roll-off value, the ski-jump value, and the radial-waviness value. The method further includes comparing the calculated minimum fly height and a fly height threshold, and determining whether to utilize the substrate for the magnetic medium based on the comparison of the calculated minimum fly height and the fly height threshold.
    Type: Grant
    Filed: June 20, 2024
    Date of Patent: May 13, 2025
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Shoji Suzuki, Tao Wang, Lulu Xiao
  • Patent number: D1074957
    Type: Grant
    Filed: May 8, 2024
    Date of Patent: May 13, 2025
    Assignee: PINNACLE CLIMATE TECHNOLOGIES, INC.
    Inventors: Sukru Erisgen, Jacob Frame
  • Patent number: D1076880
    Type: Grant
    Filed: June 18, 2024
    Date of Patent: May 27, 2025
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventor: Michael Edward James Paterson