Abstract: The receiver of a PCM modem utilizes the V.90 TRN1d training signal for detecting whether any of the six slots of the received signal may be subject to alternating robbed bit signaling (ARBS), and what the alternating robbed bit signaling pattern may be. This is accomplished by accumulating the received level over a plurality of frames for each slot and by comparing the received levels for each slot to an average level for that slot. If the difference between the received levels and the average levels exceeds a threshold, the slot is determined to be subject to ARBS. Where a slot is subject to ARBS, DIL sequence signals for frames of the alternating robbed bit signaling slot having LSB=0 and LSB=1 are accumulated separately (if available) in order to generate two translation tables (TRT0, TRT1) for that slot. Where the DIL sequence is found only in the frames having the alternating robbed bit signaling slot having LSB=0 or having LSB=1, only one translation table can be generated.

Abstract: Short pseudo-random (PR) probing sequences that comply with ITU V.90 digital impairment learning (DIL) descriptors provide DIL probing sequences that yield high performance in severe inter-symbol interference (ISI) channels. The short PR sequences do not require the insertion of extra zero symbols to get rid of ISI. Further, a novel receiving structure corrects for propagation of digital impairment common in conventional equalizers for an ISI free receipt of the probing sequences within the strictly time constrained probing sequence. Based on the reliably received signals, general digital impairment mapping tables, digital pads, regular and strange RBS patterns, and different types of PCM codecs (A-law/&mgr;-law) are identified.

Abstract: An enhanced computer telephony (CT) network design for a private branch exchange (PBX) telephone system network improves the computer telephony interface (CTI) capabilities of the network. Bi-directional data from remote telephone switching nodes of different PBX systems, each using a common software application, is combined into a single data stream by the network to simplify control of the remote PBX systems. Commands to, and events received from, the different PBX switching nodes are combined by use of a gateway to automatically and transparently route digital information for control of the correct remote system node.

Abstract: An communication system such as a host signal processing modem includes a host computer and a device that is coupled to communication lines and a host processor in the host computer. In a normal operating mode, the device generates periodic interrupts that cause the host processor to execute a software portion of the communication system. The software portion communicates with the device and implements protocols required to maintain communications with a remote system via communication lines. In a wait mode of the device, interrupts from the device to the host processor are suspended and selection logic in the device selects a communication signal such as a ring signal from the telephone lines as an interrupt to the host processor. While in wait mode, a power management system can place the system in a sleep mode because the periodic interrupts are suspended and do not indicate system activity that would prevent use of the sleep mode.

Abstract: A method and apparatus for sample rate conversion in an analog to digital converter includes processing that begins by converting an analog input signal into a stream of digital data. The processing continues by determining an up sampling value and a down sampling value based on a sample rate conversion value. The processing continues by computing a moving sum of data of the stream of data based on the up sampling value, the clock rate of the stream of data, and a predetermined filter function. The processing continues by producing a digital output value from the moving sum based on the down sampling value, wherein the digital output value is at a desired output rate.

Abstract: A differential line driver that includes a 1st operational amplifier, a 2nd operational amplifier, an adjustable reference module, a 1st feedback impedance, and a 2nd feedback impedance. First inputs (e.g. the inverting input or non-inverting input) of the 1st and 2nd operational amplifiers are coupled to receive an input signal. The 2nd inputs (e.g. the compliment of the 1st input) of the 1st and 2nd operational amplifiers are operably coupled to receive an adjustable reference voltage from the adjustable reference module. The adjustable reference module provides the adjustable reference voltage based on the common mode of the power source for the 1st and 2nd operational amplifiers (e.g. Vdd, Vss,) and/or the common mode of the input signal. The 1st and 2nd feedback impedances, (e.g. resistors) are coupled from the output of the respective operational amplifiers to either the 1st or 2nd input of the respective operational amplifiers.

Abstract: A method and apparatus for providing data for sample rate conversion includes processing that begins by generating a data request interrupt based on a system clock and a sample rate conversion value. The processing continues by receiving a data ready control signal from a data processor. The processing proceeds to responding to the data request interrupt by providing a read signal to a temporary memory device. Based on the read signal, a 1st word of data is read from the temporary memory device and provided to a sample rate conversion module. The processing resumes by responding to the data ready control signal by providing a light signal to the temporary memory device. In accordance with the write signal, a 2nd word of data is written to the temporary memory device by the data processor.

Abstract: A host signal processing (HSP) modem or transceiver includes a transmit buffer and a receive buffer. The transmit buffer stores multiple blocks of information representing a transmit signal, and the receive buffer includes available space for multiple blocks of information representing a receive signal. Each block of information corresponds to its respective signal for an associated period that spans the time between consecutive interrupts for the HSP modem. When the host computer fails to service one or more interrupts, the hardware portion of the HSP modem uses the reserve of information from the transmit buffer to generate the transmit signal and stores one or more blocks of information representing the receive signal in the receive buffer. Accordingly, the HSP mode maintains the connection and data throughput even when the host computer misses interrupts.

Abstract: A power supply includes a dc voltage source and circuitry which powers a modem data access arrangement (DAA) while preventing dc voltages from being applied to a private line; i.e., the private line is effectively isolated from dc voltages generated by the voltage sources. The circuitry permits ac signals from the modem to travel substantially unhindered over the private line. A first embodiment includes a split winding transformer, and a capacitor coupled across the voltage source. A second embodiment includes a standard transformer, an inductor and a capacitor. A third embodiment includes two capacitors and two inductors. The capacitors are coupled to the inputs of the DAA, while the inductors are coupled between the poles of the voltage source and respective inputs of the DAA.

Abstract: A receiver compensates for DC or baseline wander using a multi-tap filter to predict the shift in each sample of a received signal. The multi-tap filter is adaptive through coefficients updated during operation of the receiver. For each prediction, filter coefficients of the multi-tap filter change according to the error in the preceding prediction so that the changed coefficients would have provided a better prediction of the baseline shift for the preceding sample. The changed filter coefficients generally provide better future predictions.

Abstract: A remote modem control and testing system includes a remote diagnostic unit (RDU) and a control computer linked by telephone lines and control modems. The RDU also includes a test software modem and a reference modem. An operator of the control computer uses remote control software installed on both the control computer and the RDU to operate the RDU, modify or install software on the RDU, test the test modem, and compare performances of the test modem and the reference modem.

Abstract: A convolution operation such as an FIR filter determines sums of products by loading first and second sequences of values into a register file of a processor, each value being in a separate register in the register file. The processor determines a sum of products, for example, by executing a series on multiply-and-accumulate instructions on the previously loaded values from the register file. For a next sum, one or more values is loaded into the register file to replace some or all of the values from the second sequence. The first sequence of values is left intact in the register file for use in calculating the next sum. For an FIR filter, only a single value from the second sequence is replaced, and the next sum uses most of the previously loaded second sequence. This reduces the number of required memory accesses and reduces processing time required for convolution operations. A sequence of sums of products for the FIR filter requires loading of only one new value per filtered value determined.

Abstract: Methods are provided for determining whether any slots of a modem frame are subject to robbed bit signaling (RBS), and whether the robbed bit signaling is &bgr;-codec robbed bit signaling. From an obtained DIL sequence, an ordered table of level values for each slot is generated. In determining whether any slots are RBS slots, distances between adjacent levels of the table for each slot are obtained and are compared to a “zero distance” threshold value in order to determine the number of distances which exceed the “zero distance” value. For each slot, the number of zero distances are compared to a threshold value, and if the number of zero distances exceeds the threshold value, the slot is declared to be a RBS slot. Zero distance thresholds for each slot are generated by finding a function of a maximum distance for that slot among the adjacent levels. In determining whether any RBS slots are &bgr;-codec slots, distances are found between corresponding levels of the ordered tables.

Abstract: A host signal processor (HSP) modem has a software interface between HSP modem hardware and native audio hardware in a host computer. No hard wire connections between modem hardware and audio hardware are required for synchronization. Instead, a software clock recovery system matches a transfer rate of the HSP modem hardware and a transfer rate of the audio hardware by duplicating or deleting samples. The software interface allows the native audio hardware to make audible the handshaking sequence during modem connections which eliminates the need for a speaker and speaker drivers in the modem hardware. The combination of HSP modem hardware, audio hardware, and software executed by the host computer also allows the HSP modem to perform voice communication such as telephone or speakerphone functions.

Abstract: The performance of a computer architecture having cache memory is optimized by reorganizing the structure of information before such information is written into an external memory coupled to a processor. Specifically, loops of repeated processing steps are identified, each loop routine operating upon particular data and in response to particular instructions. The instructions and data for these loop routines are organized into structures of information, each of which comprises all instructions or data for one loop routine. Each structure is stored into external memory and can be brought into cache memory as a single block of information.

Abstract: The voice mail system is embodied on a card (VxC) designed to be inserted into the PBX cabinet and communicate with the PBX processor via the backplane of the system. The VxC card includes a dual port RAM for providing two way communication between the VxC and the PBX. Through the allocation of memory areas, and control commands corresponding to the respective allocated areas, the PBX processor and VxC can communicate via the dual port RAM interface over the PBX backplane. The use of the dual port RAM communication over the PBX backplane eliminates the need for asynchronous RS-232 signaling to establish control and implement voice mail functions to a PBX system.

Abstract: Methods are provided for generating at least one translation table for a modem having a frame having a plurality of slots. DIL sequence information from another modem is used to generate ordered table of levels, and distances between adjacent levels of the ordered table for found for each slot. The distances are used to distinguish between slots subject to robbed bit signaling (RBS) and slots not subject to RBS, and the ordered tables are used to make a determination as to whether the DIL sequence information is A-law or &mgr;-law information. Scaling factors are generated from the A-law/&mgr;-law determination as well as from a PAD estimation, and the scaling factors are utilized in generating translation tables. A PAD estimation function is utilized in finding the PAD estimation.

Abstract: A method in a modem having a frame having a plurality of slots, for determining whether incoming DIL sequence information contains A-law or &mgr;-law information is provided. From the DIL sequence information, an ordered table of levels for each slot is generated. The levels of all non-robbed-bit slots are averaged, and average levels are subjected to an A-law/&mgr;-law separation function.

Abstract: An HSP communication system includes a host computer which executes a software portion of an HSP modem and a device containing a digital-to-analog converter (DAC). In response to interrupts, the host executes an update routine that generates and writes samples to a software circular buffer in memory of the host computer. The samples represent amplitudes of an analog signal complying with a desired communication protocol. A direct transfer moves samples from the software circular buffer to a hardware circular buffer the device, and the DAC converts the samples from the hardware circular buffer into an analog communication signal. In an exemplary embodiment, the hardware portion is coupled to a PCI bus in the host computer, and direct transfers are according to the PCI bus master protocol. In environments such as multi-tasking systems, the host may skip interrupts or otherwise not provide new samples when required.