Abstract: A travelling-wave transistor structure (50) with the input and output transmission lines (54,58) terminated with unmatched impedances (70,72,74;80,82,84) to improve high-frequency response by reflection and phase shift to provide constructive interference is disclosed. Preferred embodiments include a .pi.-gate (52,56) MESFET structure travelling-wave transistor with many periodically spaced gate feeding fingers (56) connecting gate (52) to gate transmission line (54) which parallels gate (52). This provides a compact structure and has large advantages at millimeter wave frequencies. Source (60) may be grounded by vias (61) or may pass over gate transmission line (54) by air bridges to a ground on the same surface as the MESFET.

Abstract: An article holder characterizd by a unitary construction forming a living hinge structure provided by integral sheet portions and sections coupled together across hinge lines to provide ease of mounting an article on and removing the article from the holder and to permit significant reduction in the number of the component members and elements and accordingly the production cost of the article holder.

Abstract: A CMOS output buffer circuit which as improved noise characteristics is disclosed. The circuit has two stages, one having relatively fast response time for causing the output node to make a quick logic transition, and the other stage for providing steady-state drive of the output node. The transistors in the transition-driving stage are driven from power supply and reference supply nodes which are isolated from the power supply and reference supply nodes of the steady-state stage. For a low-to-high transition, the driving transistor in the steady-state stage, being p-channel, drives the output node to a full power supply level, which causes the driving transistor in the transition-driving stage to turn off, isolating the two power supply nodes of the two stages from one another. For a high-to-low transition, a feedback circuit serves to turn off the pull-down transistor of the transition-driving stage in order to isolate the two reference supply nodes of the two stages from one another.

Abstract: An electronic apparatus in which the operator inputs both the textual material and a sequence of pitches which upon synthesization simulates singing qualities. The operator inputs a textual material, typically through a keyboard arrangement, and also a sequence of pitches as the tune of the desired song. The text is broken into syllable components which are matched to each note of the tune. The syllables are used to generate control parameters for the synthesizer from their allophonic components. The invention allows the entry of text and a pitch sequence so as to simulate electronically the singing of a tune.

Abstract: A voice messaging system, wherein linear predictive coding (LPC) parameters, pitch, and preferably other excitation information is derived from a human voice input, encoded, and transmitted and/or stored, to be called up later to provide a speech output which is nearly identical to the original speech input. The invention features adaptive filtering of the residual signal. The residual signal derived from LPC estimation is adaptively filtered, and then is used as the input to a conventional pitch estimation procedure. The adaptive filtering step uses the first reflection coefficient (k.sub.1) to realize a simple filter (e.g., A(z)=(1-k.sub.1 z.sup.-1).sup.-1. This filter removes high frequency noise from the residual signal during voiced periods, but does not remove the high frequency energy which contains important information during the unvoiced periods of speech.

Abstract: A method for scanning a page and locating individual characters on that page so that character recognition can be performed is disclosed. A page containing characters to be read is scanned with successive scan lines from top to bottom and the data contained in each scan line is transmitted to a buffer memory for temporary storage. An additional set of data which represents the significant amount of character information within a scan line is also generated and stored in a separate memory. When the microprocessor is ready to begin recognizing characters the set of data which indicates those scan lines containing significant character data is accessed and read. The microprocessor then accesses a different set of data which represents the significant character information as arranged in vertical pixel lines.

Abstract: A connector for mounting and electrically connecting a chip carrier unit in an electrical circuit has a plurality of electrical contacts secured in openings in the bottom of an electrically insulating body to permit cantilever spring deflection of the contacts in accommodating a chip carrier unit within the connector between the contacts. The contacts comprise wire members of round cross section each having an opposite end bent to be slidable along a narrow line of engagement with an inclined ramp surface on an adjacent side wall of the connector body. Each contact has a bowed portion intermediate the contact ends which is bowed away from the adjacent ramp surface to slidably engage terminals on the chip carrier unit as the unit is inserted into the connector.

Abstract: A computer system has a plurality of processors sharing a bus. Bus arbitration circuitry is located on each processor for determining bus access. The identity of the processor which is responsible for arbitrating bus access changes from time to time. Each processor has a plurality of possible arbitration states, which are controllable through execution of software by the processor.

Abstract: A device for changing the organization of an array of memory cells formed on a semiconductor ship using external control signals which includes a storage device for storing an external enable/disable command signal on the chip, a divider for dividing the array into blocks of memory cells in response to a stored enable command and a pass gate assembly for permitting access to selected ones of the blocks in response to corresponding toggle input signals when an enable command is stored.

Abstract: A temperature sensitive probe plug in which connector wires are crimped to the terminals of the plug. The power lead wires can be attached to the connector wires by crimping connectors, the base of the plug beneath the crimping connectors being shaped as anvil portions so that it is merely necessary to insert the wires into the crimping connectors and the application of a crimping tool will crimp the connectors about the wires by the reaction of the tool against the anvil.

Abstract: An emitter location system includes a single carrier based first and second short baseline interferometers, and a long baseline interferometer operatively connected to a computing means. The computing means includes a three level processor. The short baseline interferometers provide phase measurements for level one combination into total phase measurements and estimates of the angle of incidence of the incoming electromagnetic energy. After test for acceptance, the estimated angle of incidence is passed for level two processing which includes the simultaneous processing of the estimated incident angle with the phase measurement of the long baseline interferometer for error correction to provide an improved estimated incident angle. After test for acceptance, the improved angle of incidence measurement is passed for determining the angle of the incident wave for level three processing.

Abstract: Optical systems for imaging activated pixels of a linear cantilever beam light valve (14) on a receptor or screen (24) are disclosed. The systems include a light source (12), a condenser lens (16) and pupil mask (26) forming a beam (32) from the output of the light source (12), a relay lens (18) for the beam (32) to image the pupil mask (26) onto the linear cantilever beam light valve (14), and an imaging lens (22) with an optional iris diaphragm (50) for imaging the portion of the beam (32) reflected from activated pixels of the light valve (14) onto the receptor or screen (24) while blocking the portion of the beam (32) reflected or diffracted from the remainder of the light valve (14).

Abstract: A method for fabricating a metal insulator semiconductor includes first forming a substrate (10) having an array of switching elements formed therein. A plurality of deformable Indium pads (16) and (18) are then formed on the surface of the substrate and in contact with each of the switching elements. A superstrate is formed from a layer of mercury cadmium telluride (32) and a layer of dielectric insulating material (34). The superstrate is pressed down adjacent the substrate (10) with the upper surface of the conductive gates (16) and (18) contracting the lower surface of the dielectric layer (34). The deformable pads (16) and (18) conform to the lower surface of the dielectric layer (34). Epoxy (36) is then disposed in the interstices of the device to provide an adhesive force between the substrate (10) and the superstrate.

Abstract: A dual dielectric gate system utilizes a dual dielectric system with a first silicon dioxide dielectric film or layer at the monocrystalline substrate surface, or termination. The substrate is of silicon optionally counterdoped with germanium. The dual dielectric system includes a dielectric film at the substrate surface of thicknesses of from 200.ANG. to 1000.ANG. (or greater). A layer of undoped amorphous silicon and a second layer of silicon dioxide, respectively overlie the first layer silicon dioxide, and an aluminum gate metal layer overlies the second silicon dioxide layer. The structure can be patterned by selectively patterning photoresist and a dry or a dry/wet etch processes. The structure is patterned and etched as desired.

Abstract: A programmable memory includes a memory matrix (34) with a row decode circuit (36) and a column decode circuit (48) operable in the program mode to select one of the memory elements in the memory matrix (34). A current boost circuit (50) is operable to provide increased current to the selected cell such that selection of the cell opens the fuse associated therewith to change the logic state. The pins associated with the column and row addresses have multiple mode functions such that in the normal operating mode they can be assigned other tasks and in the programming mode are utilized primarily for addressing of the memory cells.

Abstract: A shock absorbing mechanism has a fluid filled pressure chamber with a piston mounted therein along with a restrictive orifice leading to an outer chamber. When shock is transmitted by the piston, fluid is forced through the opening against compressed gas contained in the outer chamber. The opening is formed in a movably mounted valve element normally biased against a valve seat but which is forced away from the valve seat by the fluid which had previously passed through the orifice after the force caused by the shock is abated. The size of the orifice in the valve element is controlled by a thermostatic coil mounted on the valve element. The coil is connected to a pin which pivots as the coil expands or contracts due to changes in temperature causing a flag mounted on the pin to slide over the surface of the valve element in which the orifice is formed.

Abstract: An electronic system automatically detects significant events in a seismic trace. The seismic trace is defined as a series of consecutive points, equally spaced in time. The system provides for taking the Nth derivative of the trace at each of the points. The system has the capability of identifying the time of the zero-crossings of the Nth derivative and of establishing the amplitude of the trace at the time of the zero-crossing of the Nth derivative. Memory is provided for storing the amplitude of the trace and the times of the zero crossings in the Nth derivative. Finally, displays are provided for displaying the traces and the zero-crossings in the Nth derivative as a hard copy of visual display.

Abstract: A method of passivation of HG.sub.1-x Cd.sub.x Te by anodic selenidization is disclosed; in preferred embodiments the selenidization is by anodic growing of the selenides in an electrolyte solution of sodium selenide in water and ethylene glycol or in a solution of sodium selenide plus sodium hydroxide in water and ethylene glycol. Also, infrared detectors incorporating such selenide passivated Hg.sub.1-x Cd.sub.x Te are disclosed.

Abstract: A complimentary output pair (10) having a P-channel transistor (12) and an N-channel transistor (14) prevents output voltage spikes due to rapid changes in current with respect to time at the V.sub.cc power supply and ground (32) nodes by using a "graded turn-on." Both the P-channel transistor (12) and the N-channel (14) utilize a serpentine polysilicon gate (16), (24), in order to sequentially turn on the sub-transistors in response to a changing input. Pull-up (36) and pull-down (40) transistors are used to turn the sub-transistors (21a-j, 29a-f) off simultaneously.

Abstract: Disclosed is an area actuated switch which can be used, by way of example, in a keyboard for a calculator, learning aid or the like. An area actuated switch array is formed using two insulating sheets made of polyester or polycarbonate; the insulating sheets overlie one another such that one side of each sheet faces one another. Groups of spaced conductors formed on each of the facing sides also overlie one another, and selected conductors traverse the periphery of the keyboard. A plurality of raised, insulating spacer areas or points are positioned on the facing sides and are in registration and contact with each other. An insulating substrate is formed over the conductors traversing the periphery and this insulating substrate has substantially the same thickness as the spacer points such that the spacer points and the insulating substrate prevent the spaced conductors from making electrical contact.