Abstract: A HgCdTe film is produced on a CdTe substrate, by depositing HgTe on a CdTe substrate, and then illuminating the substrate from the underside with infrared light at a wavelength longer than the desired operating wavelength (band-gap-equivalent wavelength) of the device. Since CdTe is transparent in the infrared, the light will reach the HgTe/CdTe interface. Since HgTe is an absorber in the infrared, most of the infrared radiation will be absorbed near the interface, which will cause intense localized heating and thus accelerate the interdiffusion of HgTe and CdTe. This interdiffusion will have the effect of moving the interface away from the original location, and toward the film/air interface. Since the desired end-product HgCdTe composition will be transparent to the infrared radiation applied, the process is inherently self-limiting.

Abstract: A transparent intelligent communication network having nodes and communication links between the nodes and providing improved system input features by including the sampling of customer inputs at different rates according to their output rates of data at the exit node or at faster rates if there is a spare channel capacity available.

Abstract: In the manufacture of a CMOS device, oxide is etched away from polysilicon gate-level interconnects, and from source or drain regions of either conductivity type to which the polysilicon gate-level interconnect is desired to be connected. A metal is then deposited, and silicide is formed to connect the gate-level interconnect to the respective source and drain regions. To ensure continuity of the silicide connection, the gate oxide beneath the gate level interconnect is slightly undercut by a wet etching process, additional polysilicon is deposited conformally overall, and the additional polysilicon is anistropically etched so that it is removed from all areas except those within the undercut region beneath the gate-level interconnect thus a continuous surface of silicon, from which a continuous layer of silicide is then grown, exists between the polysilicon gate-level interconnect and the respective source and drain regions. Thus, self-aligned contacts are created, and no unwanted pn junctions are created.

Abstract: An improved method of making a semiconductor device such as an N-channel, double level poly, MOS read only memory or ROM array is provided; the array is of very dense structure and may be electrically programmable by floating gates which are interposed between the gate oxide and control gates formed by polycrystalline silicon or metal row address lines. The electrical programming of the cells is accomplished by applying selected voltages to the source, drain, control gate and substrate. The very dense array results from a simplified manufacturing process generally compatible with standard N-channel silicon gate technology. Parallel strips of gate oxide, polycrystalline silicon, and nitride (functioning as an oxidation mask) are created in one mask step before field oxide is grown, then a perpendicular pattern of conductive strips is etched using a second mask step.

Abstract: A color video signal generator includes means for selectively generating either color difference information or logic levels from the same output pins. The color video signal generator is employed in a video system which outputs either the internally generated video signal or an externally generated video signal depending on whether the color difference information or the logic levels are generated. This invention has application to video terminals and small computing systems which employ video displays to enable selective display of internally generated pictures or externally generated pictures or selective overlap of such pictures. This invention also has application to integrated circuit pin minimization by enabling an analog and a digital signal to be multiplexed on the same pin.

Abstract: Seismic exploration method in arctic regions involving the generation of a seismic disturbance in the water beneath the ice in areas where conventional marine and land exploration methods are functionally inadequate. Seismic disturbances are generated by an air gun assembly which automatically executes lowering air guns through apertures in the ice and retrieving them while carrying out preventive measures against freeze-ups. Seismic sensing and recording equipment are positioned within an appropriate range to detect seismic data in the form of reflective or diffractive signals generated in response to the seismic disturbance after actuating the air gun array, wherein the seismic data is indicative of sub-surface structural formations existing below the body of water.

Abstract: A semiconductor read-only-memory (ROM) device having an array of punch-through devices as memory cells. The cells are formed at the crossing points of two pluralities of parallel elongated regions, the two pluralities being perpendicular to each other. One plurality is located in subsurface regions of a semiconductor body and is of a conductivity type opposite that of the surrounding body. The other plurality is located at a surface of the semiconductor body and is of the same conductivity type as the subsurface plurality. The device is programmed by implanting impurities of the same conductivity type as the semiconductor body between selected crossing points. No contacts exists in the array.

Abstract: A method for preparing semiconductor material for integrated circuit device fabrication. A retaining wall is formed around islands of semiconductor material that are to include the active devices, and the islands are then subjected to transient radiation annealing. The retaining wall holds the shape of the islands during annealing, and promotes uniform crystal alignment in the material.

Abstract: Semiconductor read only memory (ROM) or electrically programmable memory (EPROM) devices are constructed using a metal-to-silicon contact arrangement which provides small cell size. An intervening polysilicon segment allows the silicon region underlying a metal contact area to be much smaller than in prior cells. The layout and cell structure provides a high density array. The use of the polysilicon segment also prevents the occurance of problems with spiking of metal through shallow implanted N+ regions.

Abstract: A camera detects which of a number of operating modes is dialed into a flash unit by sensing the current level produced by a source. In response to dialing of a daylight EE mode, the camera measures the brightness of the object to be photographed and conforms the diaphragm aperture to a preselected shutter speed. In one flash mode the flash unit transmits desired aperture and shutter speed data suitable for flash and the camera automatically responds. In another mode, the shutter speed is set into the camera and the camera automatically controls the diaphragm aperture on the basis of data transmitted by the flash unit.

Abstract: Integrated circuit resistor elements ideally suited for load devices in static MOS RAM cells are made in second-level polycrystalline silicon by an ion implant step compatible with a self-aligned N-channel silicon-gate process. The second-level polysilicon is insulated from first-level polysilicon by multi-layer insulation; first, a thermal oxide layer provides better edge breakdown characteristics for transistors, then secondly a layer of doped deposited oxide provides improved step coverage, and finally an undoped deposited oxide is used to prevent out diffusion from doped oxide to second level polysilicon which would change the characteristics of the resistors.

Abstract: A random access read/write MOS memory device consisting of an array of rows and columns of one-transistor memory cells employs a bistable sense amplifier circuit at the center of each column. The sense amplifier is of the dynamic type in that coupling transistors connect the column line halves to the cross-coupled driver transistors. The sources of the driver transistors are connected to ground through a sequentially timed, three step grounding arrangement employing two transistors, one having a dual channel implanted to provide two different threshold voltages. Active load devices connected to the column line halves provide pull-up of the voltage on the one-going column line half to a full Vdd level.

Abstract: A semiconductor switch device suitable for a.c. power control includes three 4-layer switch components in parallel in a single body of semiconductor material. First and second components are of the same polarity and of opposite polarity to the third component. One end connection of the second component is taken out as a secondary gate connection separate from the corresponding connections of the first and third components. In a preferred mode of use, the secondary gate connection is maintained at a d.c. potential relative to the corresponding connections of the first and third components so as to enable the second component to be conducting during the zero crossings of the a.c. supply and able to maintain the internal voltages required for conduction of either or both of the other components.

Abstract: An oscillator circuit which demonstrates stable operation over a wide range of supply voltages and process variations. A latch circuit is controlled utilizing a timing capacitor. A constant current source is applied alternately to opposite sides of the timing capacitor through a series of switching gates which bootstrap the voltage across the timing capacitor, with the switching gates being controlled by the output of the latch circuit.

Abstract: A system and method for driving a multiplexed liquid crystal display (LCD) of duty cycle 1/N is described. The drive system includes M number of segment conductors and N number of drive conductors arranged in a matrix array, the intersection of a drive conductor with a respective segment conductor representing one segment of the display. A signal generator is provided for generating first and second electrical signals having respective first and second predetermined frequencies, the second frequency being substantially greater than the first frequency. A first logic circuit applies the second signal to the drive conductors one-at-a-time in a predetermined sequence and applies the first signal during the remainder of the cycle. Similarly, a second logic circuit responsive to data signals indicative of the information to be displayed applies segment signals representing the ON/OFF states of each segment to the respective segment conductors.

Abstract: A method for the fabrication of a cured polyamic acid film having apertures therein selectively etched to provide sidewalls sloped at a controlled angle. Such films are used in the fabrication of integrated circuits having two or more levels of metallization, to provide electrical insulation between metal levels. The apertures therein are required to have sloped sidewalls in order to enhance the yields of circuits having reliable contact between metal levels.

Abstract: An improved CMOS frequency divider circuit is disclosed which has override logic for forcing the circuit to exit from a forbidden state to a valid state.

Abstract: A structure for compressing an acoustic surface wave into a symmetric higher energy density output surface acoustic wave. Conductive strips are placed in parallel upon a piezoelectric surface. When a symmetric input is generated at one side of the multistrip coupler, the energy of the input wave is compressed into the center channel and is presented at the output in a single moded symmetric form.

Abstract: A charge-coupled device (CCD) imager has an output shift register having a number of bits equal to at least a multiple (N), where N is an integer greater than 1, times the number of columns of pixels in the imager. Appropriately spaced in the output shift register are N groups of N outputs each for non-destructive, simultaneous readout of N.times.N bits. The N.times.N bits are then available for pre-processing or display without the requirement for having previously stored each bit, digitally represented, in a computer memory.

Abstract: A photoluminescent dye is suspended in a transparent medium. When exposed to light, the dye re-emits light in a narrow frequency range. Photovoltaic cells responsive to the re-emitted light are arranged around the sides of the collector medium, and are electrically connected to a low power demand device, such as a calculator. A reflective surface is placed next to the collector medium and kept a slight distance away such that an air gap is formed between the collector and the reflective surface. This gap increases the efficiency of the collector to the point that the collector will operate a small calculator even though exposed to low light levels such as are normal in an office environment.