Abstract: A sense transistor is placed in a current path between a reference voltage source and ground. The base terminal of the sense transistor is coupled to the base terminal of an amplifying transistor. Thus, current in the sense transistor corresponds to signal power output by the amplifying transistor. The sense current causes a sense voltage at the collector terminal of the sense transistor. This sense voltage is applied to one input of an error amplifier. The other error amplifier input receives a power control voltage. The error amplifier output is routed back to the base terminal of the amplifying transistor in a negative feedback loop, thereby keeping the power of the signal output by the amplifying transistor at a constant level. In some embodiments the error amplifier output is made independent of changes in the reference voltage. Multiple pairs of corresponding amplifying and sense transistors can be used.

Abstract: A method for controlling tuning current values provided to a multichannel laser source. For each operating laser channel, a desired slope value of laser power as a function of tuning current is stored. The slope values of laser power as a function of tuning current is then measured. The tuning current is then adjusted until a slope value substantially close to said desired slope value is measured. The operating tuning current is set for the laser source that corresponds to the measured slope value.

Abstract: An improved amplifier circuit is disclosed. In one embodiment, the amplifier circuit includes an amplifier transistor that has a base terminal connected to receive an input signal. The amplifier circuit also includes a reference voltage source that generates a reference voltage at a reference voltage output node. A local bias circuit provides a bias voltage to the base terminal of the amplifier transistor. The local bias circuit includes a first transistor that has an emitter terminal coupled to the reference voltage output node, a collector terminal coupled to a supply voltage node, and a base terminal connected to the collector terminal. The local bias circuit also includes a second transistor that has a base terminal coupled to the base terminal of the first transistor, a collector terminal coupled to the supply voltage node, and an emitter terminal coupled to the base terminal of the amplifier transistor.

Abstract: A set of clamping diodes between terminals of a transistor acting as a power amplifier is configured to allow overvoltage at the output terminal of the transistor to travel through those clamping diodes to provide feedback used by the transistor for gain control.

Abstract: A novel bias voltage generating circuit and method are disclosed. In one embodiment, the bias voltage generating circuit includes a first transistor with a base terminal coupled to the output node and an emitter terminal coupled to ground. The circuit also includes a resistor with a first terminal coupled to a supply voltage node and a second terminal coupled to a collector terminal of the first transistor. A second transistor has an emitter terminal coupled to the collector terminal of the first transistor and a base terminal connected to the collector terminal of the second transistor. A second resistance has a first terminal coupled to the supply voltage node and a second terminal coupled to a collector terminal of the second transistor. A third transistor has a base terminal coupled to the base terminal of the second transistor, a collector terminal coupled to the supply voltage node, and an emitter terminal coupled to the output node.

Abstract: A buffer includes two pairs of push-pull configured transistors as output drivers. One transistor in the first push-pull pair is controlled by an input signal and the second transistor in the first push-pull pair is controlled via a current mirror by a complement of the input signal. Similarly, one transistor in the second push-pull pair is controlled by the complement of the input signal and the second transistor in the second push-pull pair is controlled via another current mirror by the input signal.

Abstract: A three-level semiconductor balun is disclosed. In one embodiment, the balun includes a first spiral-shaped transmission line overlying a substrate. The first transmission line has first and second ends. A second spiral-shaped transmission line is substantially vertically aligned with the first transmission line. The second transmission line has a first end electrically connected to the second end of the first transmission line. A third spiral-shaped transmission line is substantially vertically aligned with the first and second transmission lines. The third transmission line has a first end electrically connected to a second end of the second transmission line. The balun may be integrated on the same chip with other RF circuit components, and is suitable for use at higher frequencies than most conventional baluns.

Abstract: A novel broadside-coupled transmission line element is disclosed. The element includes a first metallization layer that has a first spiral-shaped transmission line and at least one bridge segment formed therein. The element also includes a second metallization layer that has a second spiral-shaped transmission line and connector segments formed therein. The connector segments provide respective electrical conduction paths between the inner area of the first and second transmission lines and the outer area of the first and second transmission lines. A first one of the connector segments is electrically connected to the inner terminus of the second transmission line. The second transmission line has a gap at each intersection with the connector segments. A dielectric layer lies between the first and second metallization layers.

Abstract: A source-coupled oscillator contains two main MESFETs which supply current to respective loads and which have sources connected through a capacitor. Each of the main MESFETs is supplied with a constant current which can be adjusted to vary the frequency of the oscillator. The output signals are derived from the voltage across the loads. The oscillator also contains two differential pairs of MESFETs that change state as the main MESFETs are turned on and off and are connected so as to switch current into one or the other of the loads. Each of the differential pairs is supplied with a constant current. The currents supplied by the differential pairs act as compensating currents and are adjusted so that when the currents through the two main MESFETs are changed to vary the frequency of the oscillator, the total current through the loads remains constant.

Abstract: A multiplexer includes a first input device that receives a first input signal and a first select signal. When the first select signal has a first state, the first input device generates a first voltage at a first node in response to the first input signal. When the first select signal has a second state, the first input device generates a first reference voltage at the first node. A second input device receives a second input signal and a second select signal related to the first select signal. When the second select signal has a first state, the second input device generates a second voltage at a second node in response to the second input signal. When the second select signal has a second state, the second input device generates a second reference voltage at the second node. A first output buffer has an input terminal coupled to the first node and an output terminal coupled to an output node.

Abstract: An electrostatic discharge protection device for reducing electrostatic discharge spikes on a signal line is disclosed. The electrostatic discharge protection device includes first and second contact regions formed in a semiconductor material such as a compound semiconductor substrate. A first terminal is electrically coupled between the signal line and the first contact region. A second terminal is electrically coupled between the second contact region and a sink such as ground. An isolation region is formed in the semiconductor material between the first and second contact regions. The isolation region may be an implant-damaged region of the semiconductor material. The electrostatic discharge protection device provides protection against electrostatic discharges for integrated circuit components, while adding only a small amount of parasitic capacitance to I/O lines, which is particularly important in RF signal processing circuitry.

Abstract: An RF power amplifier with variable bias current is disclosed. The RF amplifier includes a peak detector that detects the peak level of the amplifier input signal. The peak detector generates an output signal in response to the peak level of the amplifier input signal. A bias voltage level setting circuit coupled to the peak detector receives the peak detector output signal and generates a bias voltage in response to the peak detector output signal. An amplifier circuit coupled to the bias voltage level setting circuit receives the bias voltage and the amplifier input signal, and generates an output signal in response to the bias voltage and the amplifier input signal. The disclosed RF amplifier allows amplification of RF signals with high linearity and high efficiency at varying power levels, and extends the maximum power capability of the amplifier.

Abstract: An operating voltage applied to a transmitter's power amplifier in a mobile wireless transceiver is dynamically controlled so as to improve the efficiency of the transmitter at all output power levels. In one embodiment, the bias current levels within the transmitter are also varied to optimize the efficiency of the transmitter at all output power levels. In a preferred embodiment, a highly efficient switching regulator is controlled by a control circuit to adjust the operating voltage and/or bias current for the power amplifier in the transmitter. The control circuit has as its input any of a variety of signals which reflect the actual output power of the transmitter, the desired output power, or the output voltage swing of the transmitter.

Abstract: A logic circuit output stage includes a first transistor with a first terminal that receives the first logic output signal and a third terminal coupled to a first output node. A second transistor has a first terminal coupled to the first terminal of the first transistor. A third transistor has a first terminal that receives the second logic output signal and a third terminal coupled to a second output node. A fourth transistor has a first terminal coupled to a third terminal of the second transistor and a second terminal coupled to the second output node. An impedance is connected between the third terminal of the second transistor and the first output node. In this output stage, the second transistor provides a transient signal to the first terminal of the fourth transistor in response to a transition in the first logic output signal. The fourth transistor provides a temporary change in the current flowing through the second output node in response to the transient signal received from the second transistor.

Abstract: A method is disclosed for attaching a device package to a circuit board with a chip mount area that has a set of elongated pads located near the perimeter of a chip mount area. In accordance with this method, a mask is formed on the circuit board. A plurality of openings are formed in the mask, including a plurality of openings over at least one of the pads. A plurality of adhesive masses area attached to a surface of the device package, each adhesive mass being aligned with an electrical contact area on the surface of the device package. The device package is positioned over the circuit board to align the adhesive masses with the openings in the mask, and the device package is attached to the circuit board. In one embodiment, the mask openings are formed in a staggered formation. An advantage of this method is that a less expensive chip of the ball grid array type may be used on a circuit board design for gull-wing-leaded chip packages without a substantial redesign of the circuit board.

Abstract: A minority carrier device includes at least one junction of at least two dissimilar materials, at least one of which is a semiconductor, and a passivating layer on at least one surface of the device. The passivating layer includes a Group 13 element and a chalcogenide component. Embodiments of the minority carrier device include, for example, laser diodes, light emitting diodes, heterojunction bipolar transistors, and solar cells.

Abstract: This is a method of fabricating a heterojunction bipolar transistor on a wafer. The method can comprise: forming a doped subcollector layer 31 on a semiconducting substrate 30; forming a doped collector layer 32 on top of the collector layer, the collector layer doped same conductivity type as the subcollector layer; forming a doped base epilayer 34 on top of the collector layer, the base epilayer doped conductivity type opposite of the collector layer; forming a doped emitter epilayer 36, the emitter epilayer doped conductivity type opposite of the base layer to form the bipolar transistor; forming a doped emitter cap layer 37 on top of the emitter epilayer, the emitter cap layer doped same conductivity as the emitter epilayer; forming an emitter contact 38 on top of the emitter cap layer; forming a base contact on top of the base layer; forming a collector contact on top of the collector layer; and selective etching the collector layer to produce an undercut 45 beneath the base layer.

Abstract: A majority carrier device includes a bulk active region and a thin-film passivating layer on the bulk active region. The thin-film passivating layer includes a Group 13 element and a chalcogenide component. In one embodiment, the majority carrier device is a metal, passivating layer, semiconductor, field-effect transistor. The transistor includes an active layer and thin-film passivating layer on the active layer. The thin-film passivating layer includes a Group 13 element and a chalcogenide component. Source and drain contacts are disposed on the active layer or the passivating layer. A gate contact is disposed on the passivating layer between the source contact and the drain contact.

Abstract: A chemical composition consists essentially ((t-amyl)GaS).sub.4. The chemical composition can be employed as a liquid precursor for metal organic chemical vapor deposition to thereby form a cubic-phase passivating/buffer film, such as gallium sulphide.

Abstract: A state machine is configured with a phase-locked loop clock signal generator which can operate at a rate faster than an externally generated reference clock signal applied to the phase-locked loop. The output of the phase-locked loop is used to trigger registers coupled to the state machine at a selected rate to enable signals at output terminals of the state machine to be updated at a rate different than the rate of the externally generated reference clock signal.