Patents Assigned to Ultratech
  • Patent number: 8309474
    Abstract: Systems and methods for performing ultrafast laser annealing in a manner that reduces pattern density effects in integrated circuit manufacturing are disclosed. The method includes scanning at least one first laser beam over the patterned surface of a substrate. The at least one first laser beam is configured to heat the patterned surface to a non-melt temperature Tnonmelt that is within about 400° C. of the melt temperature Tmelt. The method also includes scanning at least one second laser beam over the patterned surface and relative to the first laser beam. The at least one second laser beam is pulsed and is configured to heat the patterned surface from the non-melt temperature provided by the at least one first laser beam up to the melt temperature.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: November 13, 2012
    Assignee: Ultratech, Inc.
    Inventors: Yun Wang, Andrew M. Hawryluk
  • Patent number: 8299446
    Abstract: Sub-field enhanced global alignment (SEGA) methods for aligning reconstituted wafers in a lithography process are disclosed. The SEGA methods provide the ability to accommodate chip placement errors for chips supported by a reconstituted wafer when performing a lithographic process having an overlay requirement. The SEGA methods include measuring chip locations to determine sub-fields of the reconstituted wafer over which enhanced global alignment (EGA) can be performed on the chips therein to within the overlay requirement. The SEGA methods further included individually performing EGA over the respective sub-fields. The SEGA methods take advantage of the benefits of both EGA and site-by-site alignment and are particularly applicable to wafer-level packing lithographic processes such as fan-out wafer-level packaging.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: October 30, 2012
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Emily True, Manish Ranjan, Warren Flack, Detlef Fuchs
  • Publication number: 20120223062
    Abstract: Apparatuses and methods are provided for processing a surface of a substrate. The substrate may have a surface pattern that exhibits directionally and/or orientationally different reflectivities relative to radiation of a selected wavelength and polarization. The apparatus may include a radiation source that emits a photonic beam of the selected wavelength and polarization directed toward the surface at orientation angle and incidence angle selected to substantially minimize substrate surface reflectivity variations and/or minimize the maximum substrate surface reflectivity during scanning. Also provided are methods and apparatuses for selecting an optimal orientation and/or incidence angle for processing a surface of a substrate.
    Type: Application
    Filed: May 15, 2012
    Publication date: September 6, 2012
    Applicant: Ultratech, Inc.
    Inventor: Andrew M. Hawryluk
  • Publication number: 20120111838
    Abstract: Provided are apparatuses and method for the thermal processing of a substrate surface, e.g., controlled laser thermal annealing (LTA) of substrates. The invention typically involves irradiating the substrate surface with first and second images to process regions of the substrate surface at a substantially uniform peak processing temperature along a scan path. A first image may serve to effect spike annealing of the substrates while another may be used to provide auxiliary heat treatment to the substrates before and/or after the spike annealing. Control over the temperature profile of the prespike and/or postspike may also reduce stresses and strains generated in the wafers. Also provided are microelectronic devices formed using the inventive apparatuses and methods.
    Type: Application
    Filed: January 10, 2012
    Publication date: May 10, 2012
    Applicant: Ultratech, Inc.
    Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk, James T. McWhirter, Serguei G. Anikitchev
  • Patent number: 8153930
    Abstract: Methods and apparatuses are provided for improving the intensity profile of a beam image used to process a semiconductor substrate. At least one photonic beam may be generated and manipulated to form an image having an intensity profile with an extended uniform region useful for thermally processing the surface of the substrate. The image may be scanned across the surface to heat at least a portion of the substrate surface to achieve a desired temperature within a predetermined dwell time. Such processing may achieve a high efficiency due to the large proportion of energy contained in the uniform portion of the beam.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: April 10, 2012
    Assignee: Ultratech, Inc.
    Inventors: Andrew M Hawryluk, Boris Grek, David A Markle
  • Publication number: 20120071007
    Abstract: Provided are systems and methods for processing the surface of substrates that scan a laser beam at one or more selected orientation angles. The orientation angle or angles may be selected to reduce substrate warpage. When the substrates are semiconductor wafers having microelectronic devices, the orientation angles may be selected to produce controlled strain and to improve electronic performance of the devices.
    Type: Application
    Filed: September 26, 2011
    Publication date: March 22, 2012
    Applicant: Ultratech, Inc.
    Inventors: Yun Wang, Shaoyin Chen
  • Patent number: 8088633
    Abstract: A method of aligning a wafer when lithographically fabricating a light-emitting diode (LED). The method includes forming on the wafer at least one roughened alignment mark having a root-mean-square (RMS) surface roughness ?S. The roughened alignment mark is formed as a consequence of forming a plasma etch to roughen a LED surface on which the wafer alignment mark resides. The method also includes imaging the at least one roughened wafer alignment mark with alignment light having a wavelength ?A that is in the range from about 2?S to about 8?S. The method also includes comparing the detected image to an alignment reference to establish wafer alignment. Once wafer alignment is established, p-contacts and n-contacts can be formed on the LED upper surface in their proper locations.
    Type: Grant
    Filed: December 2, 2009
    Date of Patent: January 3, 2012
    Assignee: Ultratech, Inc.
    Inventors: Robert L. Hsieh, Khiem Nguyen, Warren W. Flack, Andrew M. Hawryluk
  • Publication number: 20110298093
    Abstract: Provided are apparatuses and method for the thermal processing of a substrate surface, e.g., controlled laser thermal annealing (LTA) of substrates. The invention typically involves irradiating the substrate surface with first and second images to process regions of the substrate surface at a substantially uniform peak processing temperature along a scan path. A first image may serve to effect spike annealing of the substrates while another may be used to provide auxiliary heat treatment to the substrates before and/or after the spike annealing. Control over the temperature profile of the prespike and/or postspike may also reduce stresses and strains generated in the wafers. Also provided are microelectronic devices formed using the inventive apparatuses and methods.
    Type: Application
    Filed: August 15, 2011
    Publication date: December 8, 2011
    Applicant: ULTRATECH, INC.
    Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk, James T. McWhirter, Serguei G. Anikitchev
  • Patent number: 8071908
    Abstract: Apparatuses and methods are provide thermally processing of the central portion of a substrate surface using a scanned photonic beam. Such thermal processing is carried out using a shield to block the beam from illuminating the side wall or peripheral portion of the substrate. The shield has characteristics, e.g., diffractive characteristics, effective to maintain the intensity of any unblocked portion of beam suitable for processing the central portion of the substrate surface.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: December 6, 2011
    Assignee: Ultratech, Inc.
    Inventor: Serguei G. Anikitchev
  • Patent number: 8067305
    Abstract: Provided are methods for forming an electrically conductive structure of a desired three-dimensional shape on a substantially planar surface of a substrate, e.g., a semiconductor wafer. Typically, the particulate matter is deposited in a layer-by-layer manner and adhered to selected regions on the substrate surface. The particulate matter may be deposited to produce a mold for forming the structure and/or to produce the structure itself. A three-dimensional printer with associated electronic data may be used without the need of a lithographic mask or reticle.
    Type: Grant
    Filed: September 3, 2008
    Date of Patent: November 29, 2011
    Assignee: Ultratech, Inc.
    Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk
  • Publication number: 20110249071
    Abstract: Apparatuses and methods are provided for processing a substrate having an upper surface that includes a central region, a peripheral region, and an edge adjacent to the peripheral region. An image having an intensity sufficient to effect thermal processing of the substrate is scanned across the upper surface of the substrate. The image scanning geometry allows processing the central region of the substrate at a substantially uniform temperature without damaging the outer edge. In some instances, the image may be formed from a beam traveling over at least a portion of the central region so that no portion thereof directly illuminates any portion of the edge when the image is scanned across the periphery region. The substrate may be rotated 180° or the beam direction may be switched after part of the scanning operation has been completed.
    Type: Application
    Filed: June 20, 2011
    Publication date: October 13, 2011
    Applicant: ULTRATECH, INC.
    Inventors: Boris Grek, David A. Markle
  • Patent number: 8026519
    Abstract: Systems and methods for forming a time-averaged line image having a relatively high amount of intensity uniformity along its length is disclosed. The method includes forming at an image plane a line image having a first amount of intensity non-uniformity in a long-axis direction and forming a secondary image that at least partially overlaps the primary image. The method also includes scanning the secondary image over at least a portion of the primary image and in the long-axis direction according to a scan profile to form a time-average modified line image having a second amount of intensity non-uniformity in the long-axis direction that is less than the first amount. For laser annealing a semiconductor wafer, the amount of line-image overlap for adjacent scans of a wafer scan path is substantially reduced, thereby increasing wafer throughput.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: September 27, 2011
    Assignee: Ultratech, Inc.
    Inventors: Serguei Anikitchev, James T. McWhirter, Joseph E. Gortych
  • Patent number: 8017424
    Abstract: An apparatus for measuring the relative positions of frontside and backside alignment marks located on opposite sides of a substrate is disclosed. The apparatus includes upper and lower optical systems that allow for simultaneous imaging of frontside and backside alignment marks. The frontside and backside alignment mark images are processed to determine the relative position of the marks, as a measurement of the alignment and/or overlay performance of the tool that formed the marks on the substrate.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: September 13, 2011
    Assignee: Ultratech, Inc.
    Inventors: Albert J Crespin, Jim Woodruff, Ray Ellis, Scott Kulas, Joe Jamello, Emily True
  • Patent number: 8014427
    Abstract: The line imaging system includes a laser, first and second cylindrical optical systems with a first spatial filter disposed therebetween, a knife-edge aperture, a cylindrical relay system, and a cylindrical focusing lens. The first spatial filter is configured to truncate a line focus within the central lobe to form a first light beam. The second cylindrical lens system is arranged in the far field and is configured to perform spatial filtering to pass central intensity lobes of the first light beam while blocking outlying intensity lobes. The resultant twice-filtered light beam is has a relatively flat-top intensity distribution associated with the long direction of the line image so that subsequent truncation by the knife-edge aperture transmits more light than conventional line imaging systems. A laser annealing system that employs the line imaging system is also disclosed.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: September 6, 2011
    Assignee: Ultratech, Inc.
    Inventor: Serguei Anikitchev
  • Patent number: 7947968
    Abstract: Provided are apparatuses for processing a surface of a substrate using direct and recycled radiation reflected from the substrate. The apparatus includes a radiation source positioned to direct a radiation beam toward a beam image forming system that forms a beam image on the substrate surface and a recycling system. The recycling system collects radiation reflected from the substrate surface and redirects it back toward the beam image on the substrate in a +1× manner. As a result, radiation incident on and reflected from the substrate is recycled through multiple cycles. This improves the uniformity of the radiation absorbed by the substrate in instances where the thin film patterns on the substrate would otherwise result in non-uniform absorption and uneven heating. Exemplary recycling systems suitable for use with the invention include Offner and Dyson relay systems as well as variants thereof.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: May 24, 2011
    Assignee: Ultratech, Inc.
    Inventors: David A. Markle, Shiyu Zhang
  • Publication number: 20110089523
    Abstract: Provided are systems and processes for forming a three-dimensional circuit on a substrate. A radiation source produces a beam that is directed at a substrate having an isolating layer interposed between circuit layers. The circuit layers communicate with reach other via a seed region exhibiting a crystalline surface. At least one circuit layer has an initial microstructure that exhibits electronic properties unsuitable for forming circuit features therein. After being controllably heat treated, the initial microstructure of the circuit layer having unsuitable properties is transformed into one that exhibits electronic properties suitable for forming circuit feature therein. Also provided are three-dimensional circuit structures optionally formed by the inventive systems and/or processes.
    Type: Application
    Filed: December 21, 2010
    Publication date: April 21, 2011
    Applicant: ULTRATECH, INC.
    Inventors: Arthur W. Zafiropoulo, Yun Wang, Andrew M. Hawryluk
  • Publication number: 20110058731
    Abstract: An apparatus for measuring the relative positions of frontside and backside alignment marks located on opposite sides of a substrate is disclosed. The apparatus includes upper and lower optical systems that allow for simultaneous imaging of frontside and backside alignment marks. The frontside and backside alignment mark images are processed to determine the relative position of the marks, as a measurement of the alignment and/or overlay performance of the tool that formed the marks on the substrate.
    Type: Application
    Filed: November 11, 2010
    Publication date: March 10, 2011
    Applicant: Ultratech, Inc.
    Inventors: Albert J. Crespin, Jim Woodruff, Ray Ellis, Scott Kulas, Joe Jamello, Emily True
  • Patent number: 7902040
    Abstract: An apparatus for measuring the relative positions of frontside and backside alignment marks located on opposite sides of a substrate is disclosed. The apparatus includes upper and lower optical systems that allow for simultaneous imaging of frontside and backside alignment marks. The frontside and backside alignment mark images are processed to determine the relative position of the marks, as a measurement of the alignment and/or overlay performance of the tool that formed the marks on the substrate.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: March 8, 2011
    Assignee: Ultratech, Inc.
    Inventors: Albert J. Crespin, Jim Woodruff, Ray Ellis, Scott Kulas, Joe Jamello, Emily True
  • Publication number: 20110028003
    Abstract: Provided are systems and methods for processing the surface of substrates that scan a laser beam at one or more selected orientation angles. The orientation angle or angles may be selected to reduce substrate warpage. When the substrates are semiconductor wafers having microelectronic devices; the orientation angles may be selected to produce controlled strain and to improve electronic performance of the devices.
    Type: Application
    Filed: September 1, 2010
    Publication date: February 3, 2011
    Applicant: Ultratech, Inc.
    Inventors: Yun Wang, Shaoyin Chen
  • Patent number: 7879741
    Abstract: Apparatus and method for performing laser thermal annealing (LTA) of a substrate using an annealing radiation beam that is not substantially absorbed in the substrate at room temperature. The method takes advantage of the fact that the absorption of long wavelength radiation (1 micron or greater) in some substrates, such as undoped silicon substrates, is a strong function of temperature. The method includes heating the substrate to a critical temperature where the absorption of long-wavelength annealing radiation is substantial, and then irradiating the substrate with the annealing radiation to generate a temperature capable of annealing the substrate.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: February 1, 2011
    Assignee: Ultratech, Inc.
    Inventors: Somit Talwar, Michael O. Thompson, Boris Grek, David A. Markle