Abstract: The present invention relates to a system and method for dynamically altering the speed of a bus based on utilization of the bus. The system will monitor a bus for a predetermined number of clock cycles. The system will then lower the frequency that the bus runs at if the bus is underutilized, or the system will increase the frequency that the bus runs at if the bus is at or nearing saturation.

Abstract: A system for film thickness sample assisted surface profilometry. The sample assisted surface profilometry system of the present invention is utilized to determine an absolute topography variation of a surface of a layer of an integrated circuit with respect to the surface of an underlying layer of known height orientation. The present invention is comprised of a thickness measurement tool for measuring a thickness of the layer at sample points. The thickness measurement tool measures a thickness sample, wherein the thickness sample characterizes the thickness of the layer over the known layer. A surface profilometry tool is coupled to the thickness measurement tool to receive the thickness measurements of the sample points. The surface profilometry tool is utilized to measure relative topography variations of the surface of the layer.

Abstract: Power is conserved in a computing system by detecting when a user's hands are not placed over a keyboard for the computing system. When it is detected that the user's hand are not placed over the keyboard power to a display for the computing system is reduced. For example, the hands are detected by generating and detecting ultrasound waves. In one embodiment of the present invention, the ultrasound waves are generated and detected from positions on a case of the computing system so that when the user's hands are placed on the keyboard, the user's hands block a portion of the ultrasound waves from being detected. In another embodiment, the ultrasound waves are generated and detected from positions on a case of the computing system so that when the user's hands are placed on the keyboard, the user's hands reflect a portion of the ultrasound waves so that the portion of the ultrasound waves are detected.

Abstract: A Gray Code counter includes first translator logic, binary incrementing/decrementing logic, second translator logic, and a clocked storage device. The first translator logic receives at an input a Gray Code number, I.sub.gray ?n:0! which the first translator translates into a binary number, I.sub.bin ?n:0!. The binary incrementing/decrementing logic either increments or decrements the binary number I.sub.bin ?n:0! to produce an incremented/decremented binary number, Z.sub.bin ?n:0!. The second translator logic translates the incremented/decremented binary number Z.sub.bin ?n:0! into an incremented/decremented Gray Code number, Z.sub.gray ?n:0!. The clocked storage device stores the incremented/decremented Gray Code number, Z.sub.gray ?n:0!. The clocked storage device also feeds the incremented/decremented Gray Code number, Z.sub.gray ?n:0!, to the input of the first translator logic.

Abstract: A method for maximizing the performance versus the power consumption of a computer system. The method uses a CPU which has the ability to select an optimum external to internal clock frequency ratio. By changing the external to internal clock frequency ratio, the computer system is able to decrease the internal clock frequency in order to conserve power, while allowing the external clock frequency to be at an optimum level in order to maintain maximum system performance.

Abstract: Disclosed is a method for programming an antifuse structure. The antifuse structure is programmed by applying an alternating current having alternating current pulses between a bottom and a top electrode to generate a conduction path through an antifuse material sandwiched between the electrodes. The conduction path is formed incrementally due to an electron flow produced as a result of each alternating current pulse thereby defining the conduction path at a substantially centered portion of the antifuse material.

Abstract: Disclosed is a method for making a shallow trench structure in a semiconductor substrate. The method includes: (a) forming a mask over a semiconductor substrate, the mask being provided with an aperture extending therethrough which exposes a region of the semiconductor substrate, the aperture having substantially vertical sidewalls; (b) depositing a blanket of silicon over the mask and within the aperture; (c) anisotropically etching the deposited silicon to form temporary spacers having curved profiles at the sidewalls of the aperture, the temporary spacers transferring the curved profiles to a mouth of a shallow trench being etched at the region of the semiconductor substrate as the temporary spacers are etched away; (d) whereby a shallow trench structure is formed where the mouth has a curved profile.

Abstract: A metastableproof flip-flop receives an input value on a flip-flop input. The flip-flop holds an output value on a flip-flop output. In response to a transition of a clock signal, a transition in the output value occurs. The new output value is the input value formerly received by the flip-flop. In order to make the flip-flop metastableproof, the transition in the output value is delayed when the input value is in a metastable state. When the input value is no longer in the metastable state, then the transition in the output value is allowed to complete.

Abstract: A joystick system is designed to provide a modified digital representation of the setting of a joystick potentiometer. The system operates to compensate for non-linearities and offsets in the joystick response, or may be used to enhance or vary the joystick response to a non-linear form. This is accomplished by supplying the output voltage of the joystick to an analog-to-digital converter, the output of which then is supplied to a lookup table. The lookup table output is provided to a counter. In one mode of operation, the counter counts down to zero at some multiple of a sample rate. When the counter reaches a zero count, the time interval representative of the joystick position is indicated; and the corrected or enhanced position is indicated by this output.

Abstract: A computer aided design system converts system level timing constraints to the minimum number of path-based timing constraints necessary to represent the same timing constraints as the system level timing constraints. Using a data structure for each node of the circuit, signal arrival times and required arrival times for each node are generated for each high level timing constraint, and the worst slack time is identified for each node. Then, a node with a worst slack time is selected, the constraint associated with that worst slack time is identified, and then a worst case path from a start node of the identified constraint through the selected node to an end node of the identified constraint is determined. The start and required signal arrival times associated with the identified constraint's start and end nodes in the determined path are also identified.

Abstract: An integrated circuit test apparatus employs a main test circuit load board which has a circular array of relay card mounts located on it. Auxiliary relays, operated in conjunction with the load board, are mounted in groups on individual relay circuit cards, each card including several relays. The relay circuit cards have connectors on first and second edges thereof; and the connectors on the first edges interconnect with the corresponding receptacles on the relay card mounts. A customized configuration board load ring for the particular integrated circuit device under test (DUT) then is placed over the second edges of the relay circuit cards to interconnect with spring-loaded connectors on these edges to effect the configuration for the operation of the particular DUT which is undergoing test at any given time.

Abstract: The present invention relates to an apparatus and method for supporting DMA I/O devices on a PCI bus. A DMA I/O device is coupled to a DMA controller via a serial link and two signal lines. The serial link is used by the DMA I/O device to request a DMA transfer. When the DMA controller receives the serialized DMA request, it sends a signal to an arbiter and waits for the PCI bus to be granted to the DMA controller for use during the DMA transfer. When granted the PCI bus, the DMA controller signals the DMA I/O device. The DMA I/O device asserts a signal in response to the one asserted by the DMA controller. The DMA controller recognizes the signal asserted by the DMA I/O device and continues with the DMA transfer. The transfer continues for as long as the DMA I/O device continues to assert the signal or for as long as the DMA controller is programmed.

Abstract: A cache memory system operates without requiring valid bits in the external cache tag RAM by employing a system controller as a writeback cache controller for control of the cache data/tag memory and the system main memory. The system controller receives signaling information from a CPU through a host bus to indicate when to pre-load the cache memory or to flush (disable) the cache memory while maintaining memory coherencey by causing the cache controller to write back all modified lines in the cache memory to the main memory.

Abstract: A circuit for producing a buffered output includes a power source, a ground, a circuit input, a circuit output, a voltage reference source, a current control pre-driver and an output driver. The circuit input receives an input signal. The circuit output produces an output signal. The voltage reference source generates a reference voltage. The current control pre-driver includes a first current source, a second current source, and control logic. The first current source is connected to the power source and has a first control input. The second current source is connected to the ground and has a second control input. The control logic is connected to the circuit input, to the voltage reference source, to the first control input of the first current source and to the second control input of the second current source. In response to a first voltage value of the input signal on the circuit input, the control logic turns off the second current source and turns on the first current source.

Abstract: The present invention relates to a system and method for securing sensitive data on mass storage devices. The system and method use an encryption device to encrypt sensitive data that is to be stored on the mass storage devices. A plurality of cryptographic keys are provided to ensure that only authorized personnel have the ability to access the encrypted data.

Abstract: Titanium is deposited using a low-pressure chemical-vapor deposition to provide good step coverage over an underlying integrated circuit structure. A rapid thermal anneal is performed using an ambient including diborane. The rapid thermal anneal causes the titanium to interact with underlying silicon to form titanium silicide. Concurrently, the diborane reacts with the titanium to form titanium boride. A composite barrier layer results. Aluminum is deposited and then patterned together with the composite barrier layer to define a first level metalization. Subsequent intermetal dielectrics, metalization, and passivation layers can be added to form a multi-level metal interconnect structure. The titanium boride prevents the aluminum from migrating into the silicon, while the titanium silicide lowers the contact resistivity associated with the barrier layer. The relatively close match of the thermal coefficients of expansion for titanium boride and silicon provides high thermal stability.

Abstract: A digital phase shifter phase shifts an input signal by a predetermined phase angle. A length of a cycle of the input signal is determined. Then an output signal is generated which is phase delayed from the input signal by a phase amount. The phase amount is approximately equal to the length of the cycle of the input signal multiplied by the predetermined phase angle.

Abstract: A liquid level monitor uses a tube to confine a float to a vertical path with a canister containing a lower liquid and an upper liquid which meet at a liquid boundary, the level of which is to be monitored. Light from a light-emitting diode is conveyed to a vertical position of the tube by an optical fiber. A second optical fiber is arranged in a diametrically opposed position of the tube to detect light transmitted across the tube from the first optical fiber. The float is more transmissive than either liquid. When the level of the boundary falls to the level of the optical fibers, received light increases. The second optical fiber conveys this return light to a photodetector, the output of which can be used to trigger an alarm indicating that the boundary level is low.

Abstract: A printed circuit board layout is provided for minimizing signal delays caused by mismatch in length of the inner leads of a package lead frame. This is accomplished by the provision of a unique conductive trace pattern formed preferably on the top surface or else on a lower surface of an electrically-insulated, heat-conducting printed circuit board. The conductive trace pattern includes a plurality of U-shaped metallized traces. Each of the plurality of U-shaped traces have a varying length so that certain ones adjacent the inner leads at the center of the package lead frame are longer than certain ones adjacent the inner leads at the corners of the package lead frame. The conductive trace pattern and the outer leads of the package lead frame also serve to transfer heat away from a molded-plastic body encapsulating an integrated-circuit die and the package lead frame and distribute the same on the printed circuit board.

Abstract: A system is provided for digitizing the setting of a potentiometer of the type used in an analog joystick for computer games. The analog output of the potentiometer is applied to one of two inputs of a voltage comparator. When a readout of the joystick position is desired, a "write" input is applied to a counter to permit it to commence counting at a predetermined frequency from an initial or zero count. The digital outputs of the counter are coupled to the inputs of a digital-to-analog converter, the output of which is coupled to the second input of the voltage comparator. When the count in the counter produces a voltage at the output of the digital-to-analog converter corresponding to the voltage setting of the potentiometer, the comparator provides an output signal. The time delay from the time the write pulse occurs until this signal is obtained is representative of the potentiometer setting.