Patents Assigned to Volterra Semiconductor Corporation
  • Patent number: 7888222
    Abstract: A method of monolithically fabricating an LDMOS transistor with a fabrication process that is compatible with a sub-micron CMOS fabrication process. The specification further describes an LDMOS transistor. The LDMOS transistor is implemented in a first impurity region on a substrate. The LDMOS transistor has a source that includes a second impurity region. The second impurity region is implanted into the surface of the substrate within the first impurity region. Additionally, the LDMOS transistor has a drain that includes a third impurity region. The third impurity region is implanted into the surface of the substrate within the first impurity region. The third impurity region is spaced a predetermined distance away from a gate of the LDMOS transistor. The drain of the LDMOS transistor further includes a fourth impurity region within the third impurity region. The fourth impurity region provides an ohmic contact for the drain.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: February 15, 2011
    Assignee: Volterra Semiconductor Corporation
    Inventors: Budong You, Marco A. Zuniga
  • Patent number: 7868378
    Abstract: An LDMOS transistor includes a gate including a conductive material over an insulator material, a source including a first impurity region and a second impurity region, a third impurity region, and a drain including a fourth impurity region and a fifth impurity region. The first impurity region is of a first type, and the second impurity region is of an opposite second type. The third impurity region extends from the source region under the gate and is of the first type. The fourth impurity region is of the second type, the fifth impurity region is of the second type, and the fourth impurity region impinges the third impurity region.
    Type: Grant
    Filed: July 17, 2006
    Date of Patent: January 11, 2011
    Assignee: Volterra Semiconductor Corporation
    Inventors: Marco A. Zuniga, Budong You, Yang Lu
  • Patent number: 7864016
    Abstract: Methods and structures for constructing a magnetic core of a coupled inductor. The method provides for constructing N-phase coupled inductors as both single and scalable magnetic structures, where N is an integer greater than 1. The method additionally describes how such a construction of the magnetic core may enhance the benefits of using the scalable N-phase coupled inductor. The first and second magnetic cores may be formed into shapes that, when coupled together, may form a single scalable magnetic core. For example, the cores can be fashioned into shapes such as a U, an I, an H, a ring, a rectangle, and a comb, that cooperatively form the single magnetic core.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: January 4, 2011
    Assignee: Volterra Semiconductor Corporation
    Inventors: Jieli Li, Charles R. Sullivan, Angel Gentchev Gentchev
  • Patent number: 7859238
    Abstract: A multi-phase, coupled-inductor, DC-DC voltage converter operates in discontinuous conduction mode (DCM) when the system is operated at low output power demand. An embodiment of the converter switches to operating in continuous conduction mode (CCM) when the system is operated at high output power demand. Operation in single-drive and rotating phase DCM operation at low power are described. An alternative embodiment operates in a multiple-drive, rotating-phase, discontinuous conduction mode during at least one condition of output power demand.
    Type: Grant
    Filed: May 18, 2009
    Date of Patent: December 28, 2010
    Assignee: Volterra Semiconductor Corporation
    Inventors: Anthony Stratakos, Jieli Li, Biljana Beronja, David Lidsky, Michael McJimsey, Aaron Schultz, Charles R. Sullivan, Charles Nickel
  • Patent number: 7830688
    Abstract: A voltage regulator coupled to an unregulated DC input voltage source by an input terminal, and to a load by an output terminal is disclosed. The voltage regulator converts an input voltage at the input terminal to an output voltage at the output terminal. The voltage regulator includes one or more slaves, and each slave includes a switching circuit. During each switching period of the switching circuit, the current for the slave is checked; namely, after the beginning of a low-side conduction period, and before the beginning of a high-side conduction period.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: November 9, 2010
    Assignee: Volterra Semiconductor Corporation
    Inventors: Aaron M. Schultz, Andy Burstein, Biljana Beronja
  • Patent number: 7825643
    Abstract: A voltage regulator coupled to an unregulated DC input voltage source by an input terminal, and to a load by an output terminal is disclosed. The voltage regulator converts an input voltage at the input terminal to an output voltage at the output terminal. The voltage regulator includes a master controller and one or more slaves, and the master controller and each slave can communicate using a ring communication scheme. A command generated by the master controller can be passed from the master controller to the subsequent slaves.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: November 2, 2010
    Assignee: Volterra Semiconductor Corporation
    Inventors: Andy Burstein, Michael Christenson
  • Patent number: 7795850
    Abstract: A voltage regulator coupled to an unregulated DC input voltage source by an input terminal, and to a load by an output terminal is disclosed. The voltage regulator converts an input voltage at the input terminal to an output voltage at the output terminal. The voltage regulator includes one or more slaves, and each slave includes a switching circuit which serves as a power switch for alternately coupling and decoupling the input terminal to an intermediate node. Each slave can include a high-side power transistor having a drain connected to the input terminal and a source connected to the intermediate node, and a low-side power transistor having a source connected to ground and a drain connected to the intermediate node. Each slave can act as a switching circuit to alternate between coupling the intermediate node to the input terminal and between the intermediate node to a ground.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: September 14, 2010
    Assignee: Volterra Semiconductor Corporation
    Inventors: Andy Burstein, Jeremy M. Flasck
  • Patent number: 7772955
    Abstract: Methods and structures for constructing a magnetic core of a coupled inductor. The method provides for constructing N-phase coupled inductors as both single and scalable magnetic structures, where N is an integer greater than 1. The method additionally describes how such a construction of the magnetic core may enhance the benefits of using the scalable N-phase coupled inductor. The first and second magnetic cores may be formed into shapes that, when coupled together, may form a single scalable magnetic core. For example, the cores can be fashioned into shapes such as a U, an I, an H, a ring, a rectangle, and a comb, that cooperatively form the single magnetic core.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: August 10, 2010
    Assignee: Volterra Semiconductor Corporation
    Inventors: Jieli Li, Charles R. Sullivan, Angel Gentchev
  • Patent number: 7746209
    Abstract: Methods and structures for constructing a magnetic core of a coupled inductor. The method provides for constructing N-phase coupled inductors as both single and scalable magnetic structures, where N is an integer greater than 1. The method additionally describes how such a construction of the magnetic core may enhance the benefits of using the scalable N-phase coupled inductor. The first and second magnetic cores may be formed into shapes that, when coupled together, may form a single scalable magnetic core. For example, the cores can be fashioned into shapes such as a U, an I, an H, a ring, a rectangle, and a comb, that cooperatively form the single magnetic core.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: June 29, 2010
    Assignee: Volterra Semiconductor Corporation
    Inventors: Jieli Li, Charles R. Sullivan, Angel Gentchev
  • Patent number: 7688607
    Abstract: A voltage regulator coupled to an unregulated DC input voltage source by an input terminal, and to a load by an output terminal is disclosed. The voltage regulator converts an input voltage at the input terminal to an output voltage at the output terminal. The voltage regulator includes one or more slaves, and each slave includes a switching circuit which serves as a power switch for alternately coupling and decoupling the input terminal to an intermediate node. The voltage regulator also includes a filter coupled to the slaves, the filter including one or more inductor banks each of which having a predetermined number of inductors.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: March 30, 2010
    Assignee: Volterra Semiconductor Corporation
    Inventor: Aaron M. Schultz
  • Patent number: 7671411
    Abstract: Methods and systems for monolithically fabricating a lateral double-diffused MOSFET (LDMOS) transistor having a source, drain, and a gate on a substrate, with a process flow that is compatible with a CMOS process flow are described.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: March 2, 2010
    Assignee: Volterra Semiconductor Corporation
    Inventors: Budong You, Marco A. Zuniga
  • Patent number: 7666731
    Abstract: A method of fabricating an LDMOS transistor and a conventional CMOS transistor together on a substrate. A P-body is implanted into a source region of the LDMOS transistor. A gate oxide for the conventional CMOS transistor is formed after implanting the P-body into the source region of the LDMOS transistor. A fixed thermal cycle associated with forming the gate oxide of the conventional CMOS transistor is not substantially affected by the implanting of the P-body into the source region of the LDMOS transistor.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: February 23, 2010
    Assignee: Volterra Semiconductor Corporation
    Inventors: Budong You, Marco A. Zuniga
  • Patent number: 7616463
    Abstract: A voltage regulator coupled to an unregulated DC input voltage source by an input terminal, and to a load by an output terminal is disclosed. The voltage regulator converts an input voltage at the input terminal to an output voltage at the output terminal. The voltage regulator includes a master controller and one or more slaves, and each slave includes a switching circuit which serves as a power switch for alternately coupling and decoupling the input terminal to an intermediate terminal, and an internal controller which sends a same control signal to each slave. Each internal controller includes a phase-locked loop which offsets the control signal so that each slave is phase-offset relative to the other slaves.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: November 10, 2009
    Assignee: Volterra Semiconductor Corporation
    Inventor: Andy Burstein
  • Patent number: 7615822
    Abstract: A transistor has a source that includes a first impurity region with a first volume and a first surface area on a surface of the transistor. The transistor also has a drain that includes a second impurity region with a second volume and a second surface area on a surface of the transistor, a third impurity region with a third volume that overlaps and extends deeper than the second volume of the second impurity region, and a fourth impurity region with a fourth volume and a third surface area. The third surface area is located in the second surface area of the second impurity region. Additionally, the second and third impurity regions have a lower concentration of impurities than the fourth impurity region. The transistor also has a gate to control a depletion region between the source and the drain.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: November 10, 2009
    Assignee: Volterra Semiconductor Corporation
    Inventor: Marco A. Zuniga
  • Publication number: 20090189576
    Abstract: A voltage regulator coupled to an unregulated DC input voltage source by an input terminal, and to a load by an output terminal is disclosed. The voltage regulator converts an input voltage at the input terminal to an output voltage at the output terminal. The voltage regulator includes a master controller and one or more slaves, and the master controller and each slave can communicate using a ring communication scheme. A command generated by the master controller can be passed from the master controller to the subsequent slaves.
    Type: Application
    Filed: April 6, 2009
    Publication date: July 30, 2009
    Applicant: VOLTERRA SEMICONDUCTOR CORPORATION
    Inventors: Andy Burstein, Michael Christenson
  • Publication number: 20090179723
    Abstract: An M phase coupled inductor includes a magnetic core including a first end magnetic element, a second end magnetic element, and M legs disposed between and connecting the first and second end magnetic elements. M is an integer greater than one. The coupled inductor further includes M windings, where each winding has a substantially rectangular cross section. Each one of the M windings is at least partially wound about a respective leg.
    Type: Application
    Filed: November 14, 2008
    Publication date: July 16, 2009
    Applicant: VOLTERRA SEMICONDUCTOR CORPORATION
    Inventors: Alexandr Ikriannikov, Anthony Stratakos, Charles R. Sullivan, Aaron M. Schultz, Jieli Li
  • Patent number: 7548046
    Abstract: A multi-phase, coupled-inductor, DC-DC voltage converter operates in discontinuous conduction mode (DCM) when the system is operated at low output power demand. An embodiment of the converter switches to operating in continuous conduction mode (CCM) when the system is operated at high output power demand. Operation in single-drive and rotating phase DCM operation at low power are described. An alternative embodiment operates in a multiple-drive, rotating-phase, discontinuous conduction mode during at least one condition of output power demand.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: June 16, 2009
    Assignee: Volterra Semiconductor Corporation
    Inventors: Anthony Stratakos, Jieli Li, Biljana Beronja, David Lidsky, Michael McJimsey, Aaron Schultz, Charles R. Sullivan, Charles Nickel
  • Patent number: 7525408
    Abstract: Methods and structures for constructing a magnetic core of a coupled inductor. The method provides for constructing N-phase coupled inductors as both single and scalable magnetic structures, where N is an integer greater than 1. The method additionally describes how such a construction of the magnetic core may enhance the benefits of using the scalable N-phase coupled inductor. The first and second magnetic cores may be formed into shapes that, when coupled together, may form a single scalable magnetic core. For example, the cores can be fashioned into shapes such as a U, an I, an H, a ring, a rectangle, and a comb, that cooperatively form the single magnetic core.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: April 28, 2009
    Assignee: Volterra Semiconductor Corporation
    Inventors: Jieli Li, Charles R. Sullivan, Angel Gentchev
  • Patent number: 7522436
    Abstract: A voltage regulator coupled to an unregulated DC input voltage source by an input terminal, and to a load by an output terminal is disclosed. The voltage regulator converts an input voltage at the input terminal to an output voltage at the output terminal. The voltage regulator includes one or more slaves, and each slave includes a switching circuit. During each switching period of the switching circuit, the current for the slave is checked; namely, after the beginning of a low-side conduction period, and before the beginning of a high-side conduction period.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: April 21, 2009
    Assignee: Volterra Semiconductor Corporation
    Inventors: Aaron M. Schultz, Andy Burstein, Biljana Beronja
  • Patent number: 7498920
    Abstract: Methods and structures for constructing a magnetic core of a coupled inductor. The method provides for constructing N-phase coupled inductors as both single and scalable magnetic structures, where N is an integer greater than 1. The method additionally describes how such a construction of the magnetic core may enhance the benefits of using the scalable N-phase coupled inductor. The first and second magnetic cores may be formed into shapes that, when coupled together, may form a single scalable magnetic core. For example, the cores can be fashioned into shapes such as a U, an I, an H, a ring, a rectangle, and a comb, that cooperatively form the single magnetic core.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: March 3, 2009
    Assignee: Volterra Semiconductor Corporation
    Inventors: Charles R. Sullivan, Aaron M. Schultz, Anthony Stratakos, Jieli Li