Patents Assigned to Western Digital
  • Publication number: 20240144964
    Abstract: The present disclosure is generally related to a magnetic recording device comprising a magnetic recording head having a first current flow in a cross-track direction through a trailing shield. In one or more embodiments, a second current flows in a cross-track direction around the main pole. The magnetic recording device comprises a main pole disposed between a trailing shield, a leading shield, and side shields. A trailing gap is disposed between the side shields and the trailing shield. A high moment seed layer is disposed between the main pole and the trailing shield. A first insulation layer is disposed within the trailing shield and directs the first current through the trailing shield, guided to the proximity of the main pole. A second insulation layer, disposed below the trailing shield, directs the second current through the trailing shield, or alternatively through the side shields and around the main pole.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Alexander GONCHAROV, Muhammad ASIF BASHIR, Petrus Antonius VAN DER HEIJDEN, Yunfei DING, Zhigang BAI, James Terrence OLSON
  • Publication number: 20240143227
    Abstract: A data storage device has a cache and a non-volatile memory. Instead of flushing the entire cache to the non-volatile memory in response to a command from a host, the data storage device flushes only the cached data that is associated with an identifier provided by the host. This allows the cached data associated with the identifier to be flushed more quickly. The data storage device can also prioritize queued commands that are associated with the identifier.
    Type: Application
    Filed: July 12, 2023
    Publication date: May 2, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Rotem Sela, Meytal Soffer, Asher Druck
  • Publication number: 20240144966
    Abstract: The present disclosure generally relates to a dual free layer two dimensional magnetic recording read head. The read head comprises a first lower shield, a first sensor disposed over the first lower shield, a first upper shield disposed over the first sensor, a read separation gap (RSG) disposed on the first upper shield, a second lower shield disposed over the RSG, a second sensor disposed over the second lower shield, and a second upper shield disposed over the second sensor. In some embodiments, the second lower shield comprises a CoFeHf layer. In another embodiment, the second lower shield is a synthetic antiferromagnetic multilayer comprising a first shield layer, a second shield layer, and a CoFe/Ru/CoFe anti-ferromagnetic coupling layer or a Ru layer disposed therebetween, the first and second shield layers comprising NiFe and CoFe. In yet another embodiment, the second lower shield comprises layers of Ru, IrMn, and NiFe.
    Type: Application
    Filed: July 26, 2023
    Publication date: May 2, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Ming MAO, Chen-Jung CHIEN, Goncalo Marcos BAIÃO DE ALBUQUERQUE, Chih-Ching HU, Yung-Hung WANG, Ming JIANG
  • Publication number: 20240144961
    Abstract: Embodiments of the present disclosure relate to magnetic recording heads (e.g., magnetic write heads) for magnetic recording devices (e.g., hard disk drives (HDD's)). A magnetic recording head includes, in a gap between a write pole and a trailing shield: a spin polarization layer (SPL), a free layer, and a spacer layer between the SPL and free layer. A spin torque layer (STL) is additionally included, and is separated from the free layer by a barrier layer that reduces or eliminates spin torque between the free layer and the STL. In one or more embodiments, to enable a thinner barrier layer, one or more dusting layers are inserted between the write pole and the trailing shield, and the one or more dusting layers are each formed of iron-chromium (FeCr). This helps maintain a thinner or narrower material stack in the gap and enhances writer performance.
    Type: Application
    Filed: July 12, 2023
    Publication date: May 2, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Muhammad ASIF BASHIR, Alexander GONCHAROV, Petrus Antonius VAN DER HEIJDEN
  • Publication number: 20240143509
    Abstract: Zoned memory typically requires write commands to be sent from a host to a data storage device in logical block address (LBA) sequential order. Instead of rejecting out-of-order write commands, the data storage device can execute those commands and internally deal with the out-of-order problem. For example, the data storage device can use a special zone logical-to-physical address table, use a temporary zone data buffer, and/or store a data's LBA in a header for later matching.
    Type: Application
    Filed: July 14, 2023
    Publication date: May 2, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Rotem Sela, Hadas Oshinsky, Einav Zilberstein
  • Publication number: 20240144996
    Abstract: Technology is disclosed herein compensating for neighbor memory cell interference on a target memory cell when reading the target memory cell. The voltage that is applied to the bit line associated with the target memory cell may have a magnitude that depends on the data state of the neighbor memory cell. The magnitude of the voltage on the bit line may impact the amount of drain-induced barrier lowering (DIBL) experienced by the target memory cell. The amount of DIBL may be used to provide a desired amount of compensation for the neighbor memory cell interference. A higher bit line voltage may be used to create a greater amount of DIBL and therefore greater amount of compensation for neighbor memory cell interference.
    Type: Application
    Filed: July 21, 2023
    Publication date: May 2, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Xuan Tian, Liang Li
  • Publication number: 20240144960
    Abstract: The present disclosure generally relates to a two dimensional magnetic recording (TDMR) spin-orbit torque (SOT) read head comprising bismuth antimony (BiSb) layers. The read head comprises a lower reader comprising a first SOT stack and an upper reader comprising a second SOT stack. The first SOT stack and the second SOT stack each individually comprise a BiSb layer recessed from a media facing surface (MFS) and a free layer exposed at the MFS. The BiSb layers of each SOT stack are recessed from the MFS a distance of about 5 nm to about 20 nm, the distance being less than a length of the free layers. In one embodiment, the lower reader and the upper reader share a current path. In another embodiment, the lower reader and the upper reader have separate current paths.
    Type: Application
    Filed: July 26, 2023
    Publication date: May 2, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Rohan Babu NAGABHIRAVA, Xiaoyong LIU, Brian R. YORK, Son T. LE, Cherngye HWANG, Kuok San HO, Hisashi TAKANO
  • Patent number: 11972151
    Abstract: The present disclosure generally relates to efficiently relocating data within a data storage device. By implementing an error correction code (ECC) module in a complementary metal oxide semiconductor (CMOS) chip for each memory die within a memory array of a memory device, the data can be relocated more efficiently. The ECC decodes the codewords at the memory die. The metadata is then extracted from the decoded codewords and transferred to a controller of the data storage device. A flash translation layer (FTL) module at the controller then checks whether the data is valid by comparing the received metadata to FTL tables. If the metadata indicates the data is valid, then the data is relocated.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: April 30, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Uri Peltz, Karin Inbar
  • Patent number: 11972118
    Abstract: A mobile data storage device (DSD) incorporating a mobile data storage device (DSD), the mobile DSD comprising a non-volatile storage medium configured to store user data, a data path configured to transmit at least data between the mobile DSD and a host computer system, a housing having a machine readable optical code and a controller. The controller is configured to receive, from the data path, a request to restore the mobile DSD to factory settings. The controller also receives, from the data path, a unique access passcode derived from the machine readable optical code. The controller validates the unique access passcode, and, in response to determining that the unique access passcode is valid, restores the mobile DSD to factory settings.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: April 30, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Alexander Lemberg, Rotem Sela, Noam Even-Chen, Asher Druck
  • Patent number: 11972148
    Abstract: Example storage systems, storage devices, and methods provide proactive management of storage operations using thermal states. Host storage requests are received and used to determine storage commands for a data storage device. For each storage command, a temperature index value corresponding to an estimated change in thermal state for executing the storage command may be determined. The storage commands are allocated to command queues based on the thermal index values and then executed from the command queues by the data storage device without triggering thermal throttling of storage commands.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: April 30, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventor: Ramanathan Muthiah
  • Patent number: 11971771
    Abstract: Systems and methods for peer data storage device messaging over a control bus for power management are disclosed. Storage devices may include a host interface configured to connect to a host system and a control bus interface to connect to a control bus. Peer data storage devices may establish peer communication through the control bus interface, determine a power state, receive a power change indicator from a peer data storage device, and initiate a change in their power state. The peer data storage devices may manage their collective power as a power pool and increase or decrease power use without host intervention.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: April 30, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Eran Moshe, Danny Berler
  • Patent number: 11972035
    Abstract: Aspects of a storage device including a memory and a controller are provided. The controller can receive a data stream from a host device, the data stream indicating a plurality of encryption keys associated with the data stream, and segregate the data stream into a plurality of data stream portions based on the plurality of encryption keys. The controller can encode the plurality of data stream portions into a plurality of encoded data stream portions with the plurality of encryption keys. The controller also can generate a mapping indicating an association between each of the plurality of encryption keys with a respective one of the plurality of encoded data stream portions. Thus, the controller may store the plurality of encoded data stream portions and the plurality of encryption keys in the memory based on the mapping, thereby improving security access to data stored in the storage device.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: April 30, 2024
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: Ramanathan Muthiah
  • Patent number: 11972149
    Abstract: A storage system is provided that performs a defragmentation operation or proactive garbage collection in its memory based on a command from a host. The command specifies which blocks in the memory should take part in the defragmentation operation by specifying a maximum amount of valid data that a block can have to qualify for defragmentation. That way, the storage system only performs defragmentation on those blocks that meet the validity criteria provided by the host. This can help improve performance of the storage system while reducing the degree of negative tradeoffs that may come with defragmentation or proactive garbage collection.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: April 30, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Einav Zilberstein, Nadav Sober, Omer Katz
  • Patent number: 11971775
    Abstract: Various processes for efficiently and effectively determining or predicting whether data stored in a non-volatile storage device is unreadable and/or unrecoverable during a read-retry process. To make the determination, different dynamic read threshold (DRT) entries of a dynamic read threshold (DRT) table are applied, in parallel, across different planes of the non-volatile storage device to determine whether the data is unreadable and/or unrecoverable.
    Type: Grant
    Filed: September 16, 2022
    Date of Patent: April 30, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Yogendra Singh Sikarwar, Prateek Kumar TR
  • Publication number: 20240135966
    Abstract: The present disclosure is generally related to a magnetic recording device comprising a magnetic recording head. The magnetic recording head comprises a main pole (MP), a shield, and a spintronic device disposed between the MP and the shield. The spintronic device comprises a MP notch disposed on the MP, a first spin torque layer (STL), a second STL, a spin kill layer disposed between the first and second STLs, and a shield notch. The spin kill layer prevents spin torque from being transferred between the first STL and the second STL. In a forward stack where electrons flow from the MP to the shield, the MP notch comprises FeCr and the shield notch comprises CoFe. In a reverse stack where electrons flow from the shield to the MP, the MP notch comprises CoFe and the shield notch comprises FeCr.
    Type: Application
    Filed: July 24, 2023
    Publication date: April 25, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Muhammad ASIF BASHIR, Alexander GONCHAROV, Yaguang WEI
  • Publication number: 20240134537
    Abstract: A data storage device and method for reducing read disturbs when reading redundantly-stored data are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The memory is configured to redundantly store a plurality of copies of data, wherein the plurality of copies of the data comprise a primary copy of the data and at least one secondary copy of the data. The controller is configured to randomly select one of the plurality of copies of the data instead of selecting the primary copy of the data as a default; and read, from the memory, the randomly-selected one of the plurality of copies of the data. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
    Type: Application
    Filed: July 11, 2023
    Publication date: April 25, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Eran Moshe, Gadi Vishne
  • Patent number: 11966618
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The memory device is arranged into at least a first super device and a second super device, each of the super devices having a plurality of active zones. The controller is configured to determine that each of the super devices includes both cold zones and hot zones, where a cold zone is a zone that is overwritten less than a hot zone. The controller is further configured to move cold zones from one super device to another super device upon determining that the another super device is below a threshold limit, where the threshold limit is a minimum free space to be maintained in a super device. The controller is further configured to move cold zones between super devices, such that the cold zones are concentrated in at least one super device.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: April 23, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ravishankar Surianarayanan, Matias Bjorling
  • Patent number: 11966631
    Abstract: A method and system for maintaining command queue order are disclosed. According to certain embodiments, commands are read from a host, storing command queue IDs in an array that will keep the queue IDs in order. After having the queue IDs stored in the array, the commands are processed in the data storage device (DSD). After processing, the commands are provided to a completion order adjustment module that will order the commands in queue ID order for sequential commands to be returned to the host. In certain embodiments, for a sequential command, other commands of the same sequence are searched for the array and ordered with the sequential command. If a particular command of the sequence is not found, the completion order adjustment module will wait to transfer the sequence until each command of the sequence is found. For commands not part of a sequence, these commands are transferred to the host.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: April 23, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Sang Yun Jung, Min Woo Lee, Min Young Kim
  • Patent number: 11966626
    Abstract: In one example, a flash storage device includes a flash memory and a controller. The flash memory includes non-volatile memory cells organized into blocks. The blocks are switchable between multi-bit mode and single-bit mode for storing data. The blocks in single-bit mode have a lower storage density and a higher write endurance than the blocks in multi-bit mode. The controller is configured to receive a write request from a host, and to determine whether a trigger event has occurred to switch one or more of the blocks from multi-bit mode to single-bit mode. Based on the controller determining that the trigger event has occurred, the controller is further configured to switch the one or more blocks from multi-bit mode to single bit mode, and to store, in single-bit mode, data for the write request in the one or more blocks at the lower data storage density.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: April 23, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ratan Singh Rathore, Ajay Shyam Manwani
  • Patent number: 11966630
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to segment a key to physical (K2P) table into two or more segments, wherein each segment of the two or more segments corresponds to a caching priority of key value (KV) pair data, organize the K2P table by storing and relocating one or more K2P table entries into a respective segment of the two or more segments, wherein the storing and relocating comprises moving a K2P table entry based on the caching priority of the KV pair data into the respective segment having the caching priority, and utilize the K2P table to manage KV pair data stored in the memory device, wherein utilizing the K2P table comprises applying a same management operation, such as prefetching, to each K2P table entry of a same segment.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: April 23, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ran Zamir, Alexander Bazarsky, David Avraham