Abstract: Methods and apparatus for processing data in a distributed inference scheme based on sparse inputs. An example method includes receiving an input at a first node. A first sparsified input is generated for a second node based on a set of features associated with the second node, which are identified based on a weight mask having non-zero values for weights associated with features upon which processing by the second node depends and zeroed values for weights associated with other features. The first sparsified input is transmitted to the second node for generating an output of the second node. A second sparsified input is received from the second node and combined into a combined input. The combined input is processed into an output of the first node. The neural network is configured to generate an inference based on processing the outputs of the first node and the second node.

Abstract: A data storage device includes a host interface for coupling the data storage device to a host system. The data storage device also includes a device memory for storing or providing data in response to commands receive from the host system. The data storage device also includes a controller comprising a storage subsystem and a security subsystem. The storage subsystem is configured to receive a host command from the host interface, and process the host command for the device memory. The security subsystem includes a device recovery circuit configured to monitor the storage subsystem for an exception state, and reinitialize pending operations for the storage subsystem after the exception state. Methods and systems are also disclosed.

Abstract: A data storage device includes a controller. The controller includes a controller memory buffer (CMB). The controller is configured to associate both the CMB and a host memory buffer (HMB) of a host device as a single buffer pool with a plurality of CMB buffers and a plurality of HMB buffers. The controller is further configured to allocate either a CMB buffer or a HMB buffer based on a tradeoff between latency and performance between using the CMB or using the HMB to store data. By leveraging the benefits of both the CMB and the HMB to store data, the overall performance of the data storage device may be improved.

Abstract: A data storage device comprising a non-volatile storage medium configured to store data, a data port configured to receive and transmit data between a host computer system and the data storage device and a controller. The controller is configured to receive, via the data port, a first command data structure comprising a status reporting activation and receive, via the data port, a second command data structure. In response to receiving the second command data structure, the controller is configured to, determine a response information associated with the second command data structure, and in response to the status reporting activation, determine a status information, and transmit, via the data port, a response data structure comprising the response information and the status information.

Abstract: The present disclosure generally relates partial speed changes to improve in-order data transfer. Rather than determining an ECC decoder on a first available decoder basis, the ECC decoder may be based on the ECC decoder level. A memory device will have at least one FMU that has a syndrome weight (SW). The disclosure proposes assigning FMU's based on the SW rate. At the time the command is read, the data storage device determines which level of decoder will be assigned to the FMU. The determination will then be checked according to different system environment parameters to maintain performance or reduce power consumption. The arrangement allows a more flexible system design that can adapt according to the current system status.

Abstract: The present disclosure generally relates to improving space efficiency when storing logical to physical (L2P) entries. Rather than writing a physical block address (PBA) spanning multiple entries, the PBA is split between a first portion stored in the buffer with the remaining bits of the PBA added to the metadata buffer. The metadata buffer is sub-optimal due to the small size of the metadata relative to the entry and therefore, adding extra bits to the metadata buffer will make the metadata buffer more optimal. In this scheme, the alignment is preserved, the system becomes more optimal in terms of DRAM access, and the metadata buffer can be easily optimized and adapted.

Abstract: A data storage device includes interfaces for coupling the data storage device to a host system and a server system. The data storage device also includes a device memory for storing or providing data. The data storage device also includes a controller comprising a storage subsystem and a security subsystem. The storage subsystem is configured to receive a host command, receive a probe request for an exception state, generate and transmit, to the security subsystem, a report for the exception state. In response to receiving an update from the security subsystem, the storage subsystem restarts at least a portion of the controller. The security subsystem is configured to monitor and transmit a probe request to the storage subsystem, transmit the report to the server system, receive the update from the server system, and transmit the update to the storage subsystem. Methods and systems are also disclosed.

Abstract: A data storage device including, in one implementation, a non-volatile memory device having a memory block including a number of memory dies, and a controller coupled to the non-volatile memory device. The controller is configured to monitor a temperature of the data storage device and determine whether the monitored temperature exceeds a first temperature threshold. The controller is also configured to perform a default thermal throttling operation based on the monitored temperature exceeding the first temperature threshold, determine whether the monitored temperature exceeds a second temperature threshold, and perform a customized thermal throttling operation based on the monitored temperature exceeding the second temperature threshold.

Abstract: The present disclosure generally relates to a multi-disk drive comprising a plurality of media surfaces and a plurality of heads, wherein a head of the plurality of heads is configured to be actuated over each surface of the plurality of media surfaces. The multi-disk drive further comprises control circuitry configured to write data to a first media surface of the plurality of media surfaces using a first head of the plurality of heads, and after all of an available memory of the first media surface has been filled, write data to a second media surface of the plurality of media surfaces using a second head of the plurality of heads. The control circuitry is further configured to permanently disable write access to one or more media surfaces of the plurality of media surfaces, while continuing to permit read access to the plurality of media surfaces.

Abstract: Aspects of a storage device including a memory and a controller are provided. The controller may convert unaligned write commands into aligned write commands and generate unaligned information associated with the unaligned write commands. In some aspects, the unaligned information indicates offset information for each unaligned write command. The controller may accumulate a threshold size of aligned write command transfer sizes in an aggregation command queue and fetch pre-pad or post-pad data for each unaligned write command in parallel based on the aggregation command queue having accumulated the threshold size of aligned write command transfer sizes. The controller may transfer host data for each unaligned write command to a data buffer at a corresponding offset within the data buffer based on the unaligned information. The controller may generate aligned data using the pre-pad or post-pad data combined with the host data and program the aligned data into a memory die.

Abstract: Aspects of a storage device are provided that handle pairing and atomic processing of fused commands received from submission queues based on data structures such as a linked lists which the controller respectively associates with each submission queue. A memory of the storage device includes a plurality of data structures each associated with a different submission queue. A controller of the storage device receives a first command for a fused operation from a submission queue, stores the first command in a data structure, receives a second command for the fused operation from the submission queue, determines whether the second command corresponds to the fused operation, stores the second command in the data structure in response to the determination, and performs the fused operation in response to storing the second command. As a result, fused command handling may be achieved with minimal impact to queue arbitration logic and command latency.

Abstract: Aspects of a storage device are provided that provide power control and power loss handling in a RAID system. The storage device may include a memory, a controller coupled to the memory, a power management circuit coupled to the memory and the controller, and a rechargeable battery coupled to the power management circuit. The controller may receive power supplied by a RAID controller, receive a notification of a loss in power supplied to another storage device, and cause the power management circuit to detect a charge of the rechargeable battery in response to the notification. The power management circuit may also detect another loss in power supplied by the RAID controller, cause the controller to send a message to the RAID controller indicating the loss in power, and receive power from the RAID controller in response to the message. As a result, UGSDs in RAID may be detected and addressed.

Abstract: Aspects of a storage device provide an optimized data relocation scanning process which significantly reduces a number of page reads performed during a block relocation scan by consolidating logical addresses for multiple FMUs in a single FMU. The storage device includes a memory comprising a block including pages and FMUs, and a controller that is configured to store, in one of the FMUs, logical addresses for multiple FMUs. The controller is further configured, in response to a data relocation command, to read the logical addresses from the FMU, to determine at least one of the read logical addresses is mapped to a current FMU in a L2P mapping table, and to relocate data stored at the valid logical addresses in response to the determination. As a result, latency and power consumption associated with data relocation may be significantly reduced and storage device performance may thus be improved.

Abstract: Embodiments described herein provide a linked XOR flash data protection scheme for data storage devices. In particular, the embodiments described herein provide a data storage controller with a memory space efficient XOR-based flash data protection/recovery algorithm with minimal flash block space overhead and support of recovery from full plane failure with neighbor planes disturb (NPD) in a single word line. Additionally, the embodiments described herein provide a reduced flash block space dedicated for XOR parity buffers storage by a factor of a number of planes per die without losing the capability to recover from NPD.

Abstract: The present disclosure is generally related to a tape drive comprising a tape head and a controller coupled to the tape head. The tape head comprises one or more modules, each module comprising a plurality of write heads aligned in a first row, a plurality of read heads aligned in a second row parallel to the first row, and at least four first servo heads aligned in the second row. Two or more first servo heads of the at least four first servo heads are configured to concurrently read first servo data from a first servo track. The controller is configured to concurrently process the first servo data, to compute the position of the tape head based on a known spacing between the at least two servo heads, and to dynamically adjust a position of the tape head based on the processed first servo data.

Abstract: The present disclosure generally relates to data storage devices, such as solid state drives (SSDs), specifically utilizing the data storage device memory in the execution of host commands. A controller is configured to receive a command pointer or a data chunk from a host device, mark a destination used for the command pointer or the data chunk, determine whether a last chunk of the command pointer or the data chunk has been received, and determine whether the command pointer or the data chunk uses an illegal combination of locations after determining that the last chunk of the command pointer has been received. The controller is further configured to return an error message to the host device upon determining that the command pointer or the data chunk uses an illegal combination of locations.

Abstract: A disk clamp for a hard disk drive, configured to clamp disk media to a spindle, includes multiple protrusions extending from a surface of a bottom side and configured to contact a disk medium at multiple contact positions in response to application of a clamping load. The protrusions may be annular protrusions circumscribing a disk clamp hub, where the height of an inner protrusion may be less than the height of an outer protrusion to inhibit coning of the top disk medium, and the protrusions may be positioned so that an equivalent contact radius corresponding to contact radii of the inner and outer annular protrusions is at a position halfway between the inner and outer diameters of the disk spacers to inhibit coning of the middle disk media.

Abstract: The present disclosure generally relates to a tape drive. The tape drive comprises a first tape head and a second tape head linearly aligned with one another, where the first tape head and the second tape head are configured to concurrently operate. The first tape head and the second tape head each comprise a plurality of write transducers, a plurality of read transducers, and a plurality of servo transducers. The tape drive further comprises a first actuator coupled to the first tape head and a second actuator coupled to the second tape head. The first and second actuators are configured to independently tilt and move the first and second tape heads, respectively. Tilting and moving the first and second tape heads individually enables the tape drive to compensate for non-linear tape dimensional stability effects.

Abstract: Various devices, such as storage devices or systems are configured to efficiently manage and determine control table sets. Such a device may include a processor, a memory array including a plurality of memory devices which include a plurality of control table sets stored in a plurality of regions, and a control table set determination logic configured to: receive a command from a host device associated with logical to physical address mapping updates, determine a control table set of the plurality of control table sets associated with the command, determine a region of the plurality of regions associated with the determined control table set, determine a position in the control table set in the determined region associated with the command, generate additional control table sets upon a first determination that the position is not vacant, and store the command in the generated additional control table sets.

Abstract: Disclosed herein are improved methods and systems for sequencing nucleic acid that exploit the temperature-dependence of the emitted intensity of fluorescent dyes. The temperature of the sequencing reaction is adjusted during each sequencing cycle, and the emission, or lack of emission, of light meeting or exceeding a threshold by the fluorescent dyes at different temperatures, or within different temperature ranges, is used to detect the fluorescent labels of the incorporated dNTPs and thereby sequence the nucleic acid. The disclosed methods enable a determination of the dNTP incorporated at any given site with a reasonable number of chemistry steps without the complex optics necessary for prior-art systems.