Abstract: A noise cancellation system is provided, for generating a noise cancellation signal to be added to a wanted signal to mitigate the effects of ambient noise. The system comprises: an input, for receiving an input signal representing ambient noise; a detector, for detecting a magnitude of said input signal; and a voice activity detector, for determining voiceless periods when said input signal does not contain a signal representing a voice. The detector is adapted to detect the magnitude of said input signal during said voiceless periods, and the system is adapted to operate in a first mode when said input signal is above a threshold value, and a second mode when said input signal is below the threshold value. The first mode comprises generating a noise cancellation signal with a first magnitude for at least partially cancelling the ambient noise. The second mode comprises generating a noise cancellation signal with a second magnitude that is less than the first magnitude.

Abstract: A regulator circuit comprising an input for receiving an input voltage; an output stage, configured to switch between said input voltage and a reference voltage to generate an output voltage, in dependence on a modulated signal; a controller, configured to receive an error signal (VERROR) on a control input and to provide the modulated signal to said output stage; an error amplifier, for providing the error signal to the controller in dependence on the output voltage; and presetting circuitry, configured to estimate the error signal in dependence on at least the input voltage, and for presetting the control input with the estimated error signal.

Abstract: A digital circuit arrangement for an ambient noise-reduction system affording a higher degree of noise reduction than has hitherto been possible. The arrangement converts the analog signals into N-bit digital signals at sample rate f0, and then subjects the converted signals to digital filtering. The value of N in some embodiments is 1 but, in any event, is no greater than 8, and f0 may be 64 times the Nyquist sampling rate but, in any event, is substantially greater than the Nyquist sampling rate. This permits digital processing to be used without incurring group delay problems that rule out the use of conventional digital processing in this context. Furthermore, adjustment of the group delay can readily be achieved, in units of a fraction of a micro-second, providing the ability to fine tune the group delay for feed forward applications.

Abstract: An apparatus and method for DC offset compensation. An amplifier receives an input signal (AIN) and provides an amplified output signal (SOUT) and a feedback path provides DC offset compensation. The feedback path comprises at least one voltage controlled oscillator (VCO) and a counter. The VCO provides, over time, a first VCO output signal based on said amplified output signal and a second VCO output signal based on a reference signal (VREF). The counter generates first pulse counts based upon the first VCO output signal and second pulse counts based upon the second VCO output signal and provides a compensation signal based on a comparison of the first and second pulse counts. One voltage controlled oscillator may sequentially receive a signal based on said amplifier output signal and the reference signal from a multiplexer so as to sequentially produce the first and second VCO output signals.

Abstract: A noise cancellation signal is generated by generating an ambient noise signal, representing ambient noise, and generating a noise cancellation signal, by applying the ambient noise signal to an feedforward filter, where the feedforward filter comprises a high-pass filter having an adjustable cut-off frequency, and by applying a controllable gain. The noise cancellation signal is then applied to a loudspeaker, to generate a sound to at least partially cancel the ambient noise. An error signal is generated, representing unwanted sound in the region of the loudspeaker. The phase of the ambient noise signal is compared to a phase of the error signal, and the gain is controlled on the basis of a result of the comparison, taking account of a phase shift introduced by the high-pass filter when performing the comparison.

Abstract: An apparatus comprising a capacitive transducer, for example a MEMS microphone. A first voltage generator is connected to receive a first voltage (VDD*) and generate a second voltage (VCP) for biasing the capacitive transducer. A control circuit is adapted to, in use, control the first voltage (VDD*) based on a calibration value, wherein a different calibration value would lead to a different first voltage level and the calibration value is set such that an input signal of known amplitude produces an output signal of predetermined amplitude.

Abstract: A method of fabricating a micro-electrical-mechanical system (MEMS) transducer comprises the steps of forming a membrane on a substrate, and forming a back-volume in the substrate. The step of forming a back-volume in the substrate comprises the steps of forming a first back-volume portion and a second back-volume portion, the first back-volume portion being separated from the second back-volume portion by a step in a sidewall of the back-volume. The cross-sectional area of the second back-volume portion can be made greater than the cross-sectional area of the membrane, thereby enabling the back-volume to be increased without being constrained by the cross-sectional area of the membrane. The back-volume may comprise a third back-volume portion. The third back-volume portion enables the effective diameter of the membrane to be formed more accurately.

Abstract: An amplifier circuit comprises an input, for receiving an input signal to be amplified; a preamplifier, for amplifying the input signal based on a variable gain; a power amplifier for amplifying the signal output from the preamplifier, and a variable voltage power supply for supplying one or more supply voltages to the power amplifier. The supply voltages are adjusted based on the variable gain or the input digital signal. According to other aspects of the invention, a power supply of an amplifier circuit is clocked using a clock signal, whereby the clock signal has a frequency that varies in accordance with a volume signal or an input signal.

Abstract: A MEMS capacitive transducer with increased robustness and resilience to acoustic shock. The transducer structure includes a flexible membrane supported between a first volume and a second volume, and at least one variable vent structure in communication with at least one of the first and second volumes. The variable vent structure includes at least one moveable portion which is moveable in response to a pressure differential across the moveable portion so as to vary the size of a flow path through the vent structure. The variable vent may be formed through the membrane and the moveable portion may be a part of the membrane, defined by one or more channels, that is deflectable away from the surface of the membrane. The variable vent is preferably closed in the normal range of pressure differentials but opens at high pressure differentials to provide more rapid equalisation of the air volumes above and below the membrane.

Abstract: A noise cancellation system for an audio system such as a mobile phone handset, or a wireless phone headset has a first input for receiving a first audio signal from one or more microphone positioned to receive ambient noise, and a second input for receiving a second audio signal from a microphone positioned to detect the user's speech, as well as a third input for receiving a third audio signal for example representing the speech of a person to whom the user is talking. A first noise cancellation block receives the first audio signal and generates a first noise cancellation signal, and this is combined with the third audio signal to form a first audio output signal. A second noise cancellation block receives at least a part of the first audio signal and said second audio signal and applying noise cancellation to generate a second audio output signal.

Abstract: There is provided a method of controlling a noise cancellation system, the noise cancellation system being for use in a device comprising a speaker for receiving a wanted signal and generating a sound signal therefrom, and the noise cancellation system comprising: a digital filter, for generating a noise cancellation signal from an input signal representative of ambient noise; and an output for applying the noise cancellation signal to the speaker in addition to the wanted signal to generate a sound signal from which the ambient noise has been at least partially cancelled. The method comprises: determining a resonant frequency of the speaker; based on the determined resonant frequency, selecting a set of filter coefficients; and applying the selected set of filter coefficients to the digital filter.

Abstract: A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.

Abstract: An infinite impulse response (IIR) filter is provided for receiving an input signal and outputting a filtered signal. The filter comprises feedback circuitry for feeding back said filtered signal, the feedback circuitry comprising a first delay element for delaying said filtered signal; and a sub-unit, for receiving said delayed filtered signal, for outputting a summed signal which is the difference between said delayed filtered signal and a further-delayed filtered signal, and for outputting a multiplied signal which is an inverted further-delayed filtered signal multiplied by a first filter coefficient. At least said input signal, said delayed filtered signal, said multiplied signal, and said summed signal are employed to generate said filtered signal.

Abstract: A method of testing a capacitive transducer circuit, for example a MEMS capacitive transducer, by applying a test signal via one or more capacitors provided in the transducer circuit.

Abstract: A digital circuit arrangement for an ambient noise-reduction system affording a higher degree of noise reduction than has hitherto been possible. The arrangement converts the analog signals into N-bit digital signals at sample rate f0, and then subjects the converted signals to digital filtering. The value of N in some embodiments is 1 but, in any event, is no greater than 8, and f0 may be 64 times the Nyquist sampling rate but, in any event, is substantially greater than the Nyquist sampling rate. This permits digital processing to be used without incurring group delay problems that rule out the use of conventional digital processing in this context. Furthermore, adjustment of the group delay can readily be achieved, in units of a fraction of a micro-second, providing the ability to fine tune the group delay for feed forward applications.

Abstract: A micro-electrical-mechanical device comprises: a transducer arrangement having at least a membrane being mounted with respect to a substrate; and electrical interface means for relating electrical signals to movement of the membrane; in which the transducer arrangement comprises stress alleviating formations which at least partially decouple the membrane from expansion or contraction of the substrate.

Abstract: A level-shift circuit, comprising: an input, for receiving a first voltage; an output, for outputting a second voltage; a resistor array comprising one or more resistors connected in series to the input; a current sink for providing a current that is independent of the first voltage; a switch arrangement comprising a plurality of switch connections for establishing a selected one from a plurality of force paths between the current sink and the input, the selected force path comprising a selected number of the one or more resistors of said resistor array; and at least one connection between the output and the resistor array that provides a sense path between the resistor array and the output that does not comprise any of the switch connections used to establish each of the plurality of force paths.

Abstract: An apparatus and method for DC offset compensation. An amplifier receives an input signal (AIN) and provides an amplified output signal (SOUT) and a feedback path provides DC offset compensation. The feedback path comprises at least one voltage controlled oscillator (VCO) and a counter. The VCO provides, over time, a first VCO output signal based on said amplified output signal and a second VCO output signal based on a reference signal (VREF). The counter generates first pulse counts based upon the first VCO output signal and second pulse counts based upon the second VCO output signal and provides a compensation signal based on a comparison of the first and second pulse counts. One voltage controlled oscillator may sequentially receive a signal based on said amplifier output signal and the reference signal from a multiplexer so as to sequentially produce the first and second VCO output signals.

Abstract: Power management integrated circuits (PMICs) and related methods. In one aspect a PMIC which is operable to provide a plurality of PMIC power states is arranged to provide a predetermined delay before a power state transition. The delay is applied after receipt by the PMIC control circuitry of a power state transition command. Applying a delay allows time for the system powered by the PMIC to perform any necessary shut-down procedures and terminate active processes before power is removed, preventing corruption of the system. The delay is preferably configurable. The PMIC may also be arranged to control power converters which are external to the PMIC. In another aspect the PMIC has translation circuitry for providing the control settings of one power block, e.g. power converter, with any necessary modifications to be used by another power block. This means that only one set of control settings needs to be updated to change the output of both power blocks simultaneously.

Abstract: Apparatus and method for power management and especially to power management integrated circuits (PMICs). In one aspect, the invention relates to a PMIC having an internal non-volatile memory (NVM) for storing boot settings for the PMIC. The PMIC also has control circuitry for detecting whether a source of boot settings is available, such as an NVM external to the PMIC, and, if so, using any settings stored in the external source in preference to the relevant settings stored in the internal NVM. The external settings can thus override any internal settings, which is useful for fault diagnosis and/or development. In one aspect the PMIC may have programming circuitry for automatically programming boot settings from an external source into the internal NVM.