Abstract: A circuit for receiving an input signal having a first frequency and generating an output signal having a second frequency. The circuit comprises a forward branch for receiving the input signal and generating the output signal and a return branch for generating a feedback signal from the output signal. The forward branch comprises a frequency detector for receiving the input signal and the feedback signal and outputting a value based on a ratio of a frequency of the feedback signal to the first frequency; a word length reduction block for receiving a fractional component of a first division factor and generating a modulated output; an adder for forming a sum of an integer component of the first division factor and the modulated output of the word length reduction block; a subtracting element for subtracting the output value of the frequency detector from the sum; and an oscillator controlled by an output from the subtracting element.

Abstract: Electrical power from an input voltage supply is converted to first and second output voltages of opposite polarities using a single inductor (L) and only four principal switches (S1, S2, S4, S6). In contrast to known circuits, none of the switches is exposed to voltages greater than the input voltage (V1). In a first type of charging cycle (FIG. 5(a)-(c)), the first output voltage (V2+) is obtained from the input voltage supply through the inductor. In a second type of charging cycle (FIG. 5 (d)-(f)), the second output voltage (V2?) is obtained from the first output voltage via the intermediate step of storing energy in the same inductor as is used in the first type of charging cycle. Auxiliary switches (S7a, S7b) can be operated in wait states between cycles of the first and second type.

Abstract: A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.

Abstract: The invention provides improved ambient noise reduction for ear-worn devices, such as earphones and headphones and for other devices worn upon or used in close proximity to the ear, such as cellular telephone handsets, and it provides, in particular, improvements to “feed-forward” ambient noise-reduction systems. Most feed-forward noise-reduction systems available hitherto purport to operate only below about 1 kHz and, even then, provide only relatively modest amounts of noise reduction. In accordance with this invention, predetermined filter parameters, such as the gain and cut-off frequency of a selected filter stage used in the noise-reduction processing, are mathematically modelled and the model is adjusted in real-time, in response to user-interpretation of a graphical display of a predicted residual noise amplitude spectrum.

Abstract: A real time clock comprises a counter which stores a count value, the count value representing a time signal. The counter may be written, for example by a host processor (not shown), such that the time signal can be set to any desired value. The real time clock comprises a check register that stores a check value. The content of the check register (i.e. the check value) is modified each time a write operation is performed on the counter. For example, the content of the check register can be updated by a control signal each time a write operation is performed on the counter. The check value stored in the check register is used for determining whether a write operation performed on the counter is an authorized write operation or an unauthorized write operation. The check value may be incremented each time a write operation is performed, replaced with a new random number each time a write operation is performed, or a combination of both.

Abstract: A method and associated apparatus for enabling a plurality of functions of an integrated circuit to be controlled on a single pin of the circuit. The method includes the steps of providing each of the functions with a designated periodically recurring sampling instance during which time the status of a signal on the single pin will be considered to relate to the function designated to that sampling instance, and controlling each of the functions according to the status of the signal on the single pin during each of the plurality of functions' corresponding designated sampling instance.

Abstract: A circuit for receiving an input signal and generating an output signal, the input signal having a first frequency, the output signal having a second frequency. The circuit comprises a forward branch for generating the output signal and a return branch for feeding back the output signal. The return branch comprises a frequency divider for receiving the output signal, for dividing the frequency of the output signal by a factor, and for outputting a modified output signal. The forward branch comprises a detector for comparing the input signal and the modified output signal and outputting a comparison signal indicative of the comparison; a word-length reduction circuit for reducing the number of bits of the comparison signal, thereby generating a reduced-length comparison signal; a digital-to-analog converter for converting the reduced-length comparison signal to analog, thereby generating an analog signal; and an oscillator, controlled by said analog signal.

Abstract: A calibration circuit and method suitable for black level calibration in image processing, the circuit comprising an analogue gain amplifier, an analogue to digital converter; a correction circuit for receiving a digital signal and providing a digital offset signal; and a digital to analogue converter for receiving said digital offset signal and feeding a corresponding analogue offset signal back to the input of said gain amplifier. The calibration circuit is arranged such that the correction circuit and said digital to analogue converter form a feedback loop applying an offset to said input signal and said correction circuit includes an inverse gain circuit for applying an inverse gain to a signal within said correction circuit prior to said digital to analogue converter. Preferably the inverse gain applied is such that the total loop gain does not deviate too far from unity.

Abstract: A reliable start-up circuit for starting a bandgap type voltage reference generator which ensures that the bandgap reference cell will operate at a stable operating point before the start-up circuit is disabled.

Abstract: A dual mode charge-pump circuit and associated method and apparatuses for providing a plurality of output voltages, using a single flying capacitor, the circuit including a network of switches that is operable in a number of different states and a controller for operating said switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage and centered on the voltage at the common terminal, in a first mode and positive and negative output voltages each up to substantially the input voltage in a second mode.

Abstract: A charge pump circuit and associated method and apparatuses for providing a plurality of output voltages using a single flying capacitor. The circuit includes a network of switches that are operable in a number of different states and a controller for operating the switches in a sequence of states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage and centered on the voltage at the common terminal.

Abstract: A current-mode switching regulator including at least: an inductor; a main switch for controlling the current flow through the inductor; and a feedback control circuit for operating the main switch cyclically and to vary a duty cycle of the main switch so as to substantially maintain an output voltage of the regulator at a desired level. The feedback control circuit further includes slope compensation circuitry adding slope compensation to a signal representing the inductor current prior to the slope compensated signal being compared to the fed-back output error voltage.

Abstract: A clock synchronizer, for generating a local clock signal synchronized to a received clock signal, is described and claimed, along with a corresponding clock synchronization method. The clock synchronizer incorporates a reference oscillator providing a reference signal, and a synthesizer circuit arranged to synthesize a local clock signal from the reference signal. The synthesizer circuit comprises a phase-locked-loop circuit, including a phase detector receiving the reference signal, and a controllable divider arranged in a feedback path from a controlled oscillator to the phase detector, the divider being controllable to set a frequency division value N along the path to determine a ratio of the local clock frequency to the reference frequency. The clock synchronizer also incorporates a clock comparison circuit adapted to generate a digital signal indicative of an asynchronism between the local and remote clock signals. A control link is arranged to link the clock comparison circuit to the divider.

Abstract: A circuit for debouncing a signal from a switch or other input. The invention provides an arrangement which receives an input signal and which monitors the input to provide an output which switches after a predetermined time from the input signal changing from one state to another. However, the output changes back to its original state in a much shorter time if said input changes back to its original state.

Abstract: The present invention provides a self-contained power management device, such as a power management IC or an IC including power management functions, which allow sequenced start up of power supplies without the need for an external sequencer and with a simple user configurable arrangement.

Abstract: A digital-to-analog converter having an input for receiving a digital input signal during each time period. A plurality of elements are each adapted to produce an analog output in response to an input, and an encoder selects a number of the elements and applies inputs to the selected elements. An analog output signal is then formed by summing outputs of the plurality of elements. The encoder selects the number of elements based on a value of the digital input signal, and selects the elements in a predetermined order from the plurality of elements, starting from an element determined by the elements selected in an immediately preceding time period, and excluding a temporarily omitted one of the plurality of elements.

Abstract: In a dynamic element matching stage of a digital-to-analogue converter, in which a pair of quantizer outputs are generated, and are constrained such that their sum is equal to the parity of a received bit value, steps are taken to improve baseband noise performance. Each of the quantizers has a feedback loop associated with it, and the performance is improved by determining the quantizer outputs based on these loop values, in order to reduce the overall quantization noise. However, during time periods when these loop values are equal, there are two possible pairs of quantizer outputs that could be chosen, without adversely impacting on the overall quantization noise. the quantizer outputs are monitored during such time periods, and steps are taken to control the quantizer outputs during such time periods, in order to ensure that the two possible pairs of quantizer outputs are chosen with equal probability.

Abstract: The invention provides a digital circuit arrangement for an ambient noise-reduction system affording a higher degree of noise reduction than has hitherto been possible, through the use of a low latency signal processing chain consisting of analogue-to-digital conversion, digital processing and digital-to-analogue conversion. The arrangement converts the analogue signals into N-bit digital signals at sample rate f0, and then subjects the converted signals to digital filtering. The value of N in some embodiments is 1 but, in any event, is no greater than 8, and f0 may be 64 times the Nyquist sampling rate but, in any event, is substantially greater than the Nyquist sampling rate. This permits digital processing to be used without incurring group delay problems that rule out the use of conventional digital processing in this context.

Abstract: The present invention relates to audio signal processing such as equalisation and spatial enhancement functions. The present invention provides an audio signal processing circuit arrangement for two audio channels, and which combines spatial enhancement or acoustic mixing (crosstalk) cancelling with graphic equalisation functions. This is achieved with a circuit structure having a reduced filter count compared with known cascaded circuits dedicated to each function. The circuit structure processes the sum and difference signals through separate filters and then recombines them to recover the separate channels (adding and subtracting respectively).

Abstract: The present invention relates to battery power peripheral devices such as MP3 players which are also periodically connected to another power source such as a mains wall socket or USB cable power bus. In particular, but not exclusively, the present invention relates to regulation of these voltage sources. In general terms the present invention provides a multiple supply rail for the load regulators of a power supply circuit for a battery powered device. One supply rail is coupled to the battery, and another is coupled to a non-battery source such as an external mains regulated source and/or a bus power wire from a USB cable or similar. The regulators have multiple inputs, each for taking their input voltage from one of these supply rails.