Patents Assigned to Zarlink Semiconductor Limited
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Patent number: 6747512Abstract: An amplifier which is suitable for use as a radio frequency low noise amplifier comprises first, second and third transconductance stages. The amplifier input is connected to the inputs of the first and third stages, whose outputs are connected together in anti-phase so as to provide feedforward error correction. The second stage has inputs connected to the outputs of the first stage and outputs connected across a resistor to current feedback inputs of the first stage so as to provide negative feedback. The first and third stages provide feedforward distortion cancelling so as to improve the linearity of the amplifier. The negative feedback provided by the second stage further improves the linearity without substantially increasing the noise figure of the amplifier.Type: GrantFiled: March 7, 2003Date of Patent: June 8, 2004Assignee: Zarlink Semiconductor LimitedInventor: Arshad Madni
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Publication number: 20040085963Abstract: A data buffer is disclosed which organizes data packets received from a data link. Each data packet has an associated index number indicating both the order in which the data packet was sent and the order in which that data packet is to be read out from the buffer. The data buffer is made up of plural memory areas, each area being capable of storing a single data packet at a time. Each received data packet is stored in one of the memory areas in accordance with the index number associated with the data packet. The data buffer may be used in conjunction with a data transmitter and a data processor that processes the data packets in real time.Type: ApplicationFiled: May 23, 2003Publication date: May 6, 2004Applicant: ZARLINK SEMICONDUCTOR LIMITEDInventor: Thomas Man Yin Ying
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Patent number: 6727746Abstract: A radio frequency amplifier including a long tail pair of transistors provided with a tail current source. The bases of the transistors are driven by emitter follower transistor provided with collector load resistors. Feedback capacitors ensure stability and feedback resistors bias the amplifier without degrading noise performance. The amplifier may be driven unbalanced while retaining good second harmonic distortion performance.Type: GrantFiled: August 22, 2002Date of Patent: April 27, 2004Assignee: Zarlink Semiconductor LimitedInventors: Arshad Madni, Franco Lauria, Mark Stephen John Mudd, Lance Rhys Trodd, Nicholas Paul Cowley
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Patent number: 6725292Abstract: A method of transferring a block of data from a first to a second circular buffer of a computer system. The method comprises notifying the DMA controller of the source and destination addresses for the transfer, the sizes of the circular buffers, and the size of the data block to be transferred. At the DMA controller, respective base and rollover addresses of the circular buffers are identified. Data is read from the first circular buffer starting at the source address, continuing until the rollover address is reached, and continuing from said buffer base address until the end of the block is reached. Data is written to the second circular buffer starting at the destination address, continuing until the rollover address is reached, and continuing from said buffer base address until the end of the block is reached.Type: GrantFiled: January 25, 2002Date of Patent: April 20, 2004Assignee: Zarlink Semiconductor LimitedInventors: Anthony Mark Walker, Matthew Charles Buckley, Maison Lloyd Worroll, Jonathan Evered, Daniel Fisher, David Aldridge, Andrew Watkins
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Patent number: 6714263Abstract: A multiple conversion tuner comprises a plurality of cascade-connected frequency changers, each of which comprises a mixer and a local oscillator. The tuner also comprises a local oscillator frequency selecting circuit which controls the frequencies of the local oscillators. The frequencies are controlled so that the final mixer converts a desired signal to the final intermediate frequency and so that the frequency band occupied by the desired signal at the output of each mixer is within the passband of the following intermediate frequency part of the tuner.Type: GrantFiled: August 22, 2001Date of Patent: March 30, 2004Assignee: Zarlink Semiconductor LimitedInventor: Nicholas Paul Cowley
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Patent number: 6708316Abstract: A system and method are provided for designing and manufacturing a semiconductor device, such as part of an integrated circuit. A template comprising a basic circuit diagram of a discrete circuit block and corresponding design equations are selected from a library. Desired performance parameters are selected and the value of one or more components of the circuit block are determined to allow the block to achieve the desired performance parameters.Type: GrantFiled: February 21, 2001Date of Patent: March 16, 2004Assignee: Zarlink Semiconductor LimitedInventors: Arshad Madni, Keith Strickland, Lance Trodd, Chris Powell
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Publication number: 20040034677Abstract: In a method for performing a fast-fourier transform (FFT), input data samples are written to a storage instance in a data input step, then subjected to a processing step in which the stored input samples are read out of the storage instance and processed in accordance with a transformation algorithm. The resulting output data samples are written back to the storage instance and, in a transformed data output step, read out of the storage instance, successively received batches of the input data samples being fed cyclically to a plurality of such multiple-function storage instances. Each batch is fed to a respective storage instance such that, at any given time during performance of the method, the input, processing and output steps are being performed simultaneously in respect of different batches using different respective storage instances.Type: ApplicationFiled: November 8, 2002Publication date: February 19, 2004Applicant: ZARLINK SEMICONDUCTOR LIMITED.Inventors: Stephen W. Davey, Maamoun Abouseido, Kevin W. Forrest
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Publication number: 20040022393Abstract: A sound transmission system comprises-a microphone, an amplifier, a low-pass filter, an ADC, a digital signal processor (DSP), a digital interface, a buffer, and a transport medium interface. The low-pass filter removes unwanted out-of-band signals, and the ADC converts the filtered analog signal to digital form. The DSP receives the digital data from the ADC and performs gain and filtering operations in the digital domain. The digital interface operates on the data and places it on the buffer where the data is stored prior to being transmitted over some channel via the transport medium interface. By powering down one or more particular components of the sound transmission system, most notably the ADC, the DSP and the digital interface, when the received signal falls below a predetermined level, power consumption is reduced.Type: ApplicationFiled: June 12, 2003Publication date: February 5, 2004Applicant: Zarlink Semiconductor LimitedInventor: Marcus Richard Jones
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Patent number: 6686100Abstract: A method of carrying out optical proximity correction in the design of a reticle for exposing a photoresist of a wafer in photolithography using a lens having a focal plane, the method including generating a dense-isolated offset focus/exposure matrix, containing dense-isolated offset values, being the difference between values of linewidth for dense and isolated lines, as a function of focal plane position, for each of a plurality of different exposures, selecting from among the contours of the dense-isolated offset focus/exposure matrix for each different exposure, the flattest contour, and carrying out optical proximity correction on the basis that the exposure will be the exposure corresponding to said flattest contour.Type: GrantFiled: October 12, 2001Date of Patent: February 3, 2004Assignee: Zarlink Semiconductor LimitedInventors: Brian Martin, Christine Wallace
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Patent number: 6683509Abstract: A frequency synthesiser comprises a voltage controlled oscillator, VCO, having means for fine tuning the oscillator frequency and switchable capacitive elements for coarse tuning the oscillator frequency. First comparison means are provided for comparing the frequency and phase of the output of the VCO or a signal derived therefrom with that of a reference frequency signal to provide an error signal, the error signal being provided to said means for fine tuning the oscillator frequency. Second comparison means are provided for comparing the error signal against one or more reference values and a control means receives the result of the comparison from the second comparison means and switches said switchable capacitive elements on and off in dependence upon the result so as to coarse tune the oscillator frequency.Type: GrantFiled: August 20, 2002Date of Patent: January 27, 2004Assignee: Zarlink Semiconductor LimitedInventors: Richard Albon, David John Johnston
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Patent number: 6683511Abstract: A controllable attenuator has an input and an output, and comprises a first resistive element, a first capacitor connected in series between the input and the output, a first controllable shunting transistor connected between the output and a supply terminal via a second resistive element, and a controllable bypass transistor connected between the input and the output. The controllable attenuator may form part of a radio receiver circuit, the attenuator being positioned between a matching circuit and a low-noise amplifier.Type: GrantFiled: August 28, 2002Date of Patent: January 27, 2004Assignee: Zarlink Semiconductor LimitedInventors: Viatcheslav Igorevich Souetinov, Serguei Vedenine
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Publication number: 20040003311Abstract: A communications system comprises a PDA and a Bluetooth peripheral device. The Bluetooth peripheral device is connected to the PDA by a data channel. The Bluetooth peripheral device enables the PDA to communicate with remote data networks using the Bluetooth wireless protocol. The system is configured to operate according to an algorithm that enables the Bluetooth peripheral device to enter an ultra-low power mode in which a receiver associated with data transfer can be disabled when no data is required to be transmitted. Data loss is prevented through the use of a hardware handshake mechanism that stops the PDA from sending data while the Bluetooth peripheral device is in the low power mode. Latency in the PDA responding to a change in handshake signals is provided.Type: ApplicationFiled: March 21, 2003Publication date: January 1, 2004Applicant: Zarlink Semiconductor LimitedInventor: Marcus Richard Jones
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Publication number: 20030231127Abstract: A data processing system is disclosed including a data processor for operating on data samples received from a data source, a digital to analog converter arranged to receive the data samples from the data processor and to convert the received data samples into an analog signal, and a controller arranged to monitor the magnitude of the data samples received from the data source and disable one or both of the data processor means and the digital to analog converter when the magnitude of one or more received data samples falls within a predetermined magnitude range. Such a system is able to operate in a low-power mode that may be advantageous for battery-powered device or other applications where power conservation is important.Type: ApplicationFiled: June 12, 2003Publication date: December 18, 2003Applicant: Zarlink Semiconductor LimitedInventor: Marcus Richard Jones
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Patent number: 6664824Abstract: A frequency doubler circuit arrangement comprises a full wave rectifier circuit having an input and a first terminal, the first terminal being connected to a first supply terminal via a first current source, and the input forming an input of the frequency doubler circuit arrangement. A biased transistor circuit is also provided, having a first terminal connected to the first supply terminal via a second current source and being connected to the first terminal of the rectifier circuit. Output terminals of the rectifier circuit and the biased transistor circuit form differential output terminals of the frequency doubler circuit arrangement. The respective outputs of the rectifier circuit and the biased transistor circuit may be connected to a second supply terminal via either an active filter load or a passive filter load, such as an inductance-capacitance-resistance filter.Type: GrantFiled: July 24, 2002Date of Patent: December 16, 2003Assignee: Zarlink Semiconductor LimitedInventor: Peter Graham Laws
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Publication number: 20030227331Abstract: A frequency modulation system is disclosed which includes a voltage-controlled oscillator (VCO) 43 and a phase detector 47 configured to receive an output signal from the VCO. The phase detector is arranged to output an error signal representing the phase difference between the signal from the VCO and a reference signal. The system also includes control means 62 arranged to monitor the error signal to derive an indication of the frequency deviation of the VCO, and, in accordance with this derivation, to maintain the frequency deviation of the VCO substantially constant.Type: ApplicationFiled: May 30, 2003Publication date: December 11, 2003Applicant: Zarlink Semiconductor LimitedInventor: Peter Edward Chadwick
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Publication number: 20030219128Abstract: A communication system includes a Voice over Internet Protocol (VoIP) subscriber unit coupled via a modem to a broadcast environment such as an Internet Protocol (IP) network, which may be the Internet. The VoIP subscriber unit has an input and output interface for connection to the network, the unit being arranged to transmit and receive voice signals to and from the network system via the interface as digital data packets. The VoIP subscriber unit includes a voice encoder/decoder arranged to convert analog voice signals to digital data packets and vice-versa, an encryptor/decryptor coupled to the encoder/decoder and to the interface and arranged to encrypt data packets received from the encoder/decoder and to decrypt digital data packets received from the interface in real time, and a storage medium. Encryption and decryption is performed using an encryption key stored in the storage medium. A semiconductor device for incorporation in the VoIP subscriber unit is also disclosed.Type: ApplicationFiled: February 21, 2003Publication date: November 27, 2003Applicant: Zarlink Semiconductor LimitedInventor: Thomas Luby
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Publication number: 20030200490Abstract: A data and clock recovery circuit is provided for generating a recovered version of a transmitted data stream. The data and clock recovery circuit comprises three main circuit modules, namely a data recovery circuit, a clock recovery circuit, and a detector circuit. The data recovery circuit is arranged to receive a data stream, and to generate therefrom an estimate of the signal levels for each bit-period of the originally transmitted data stream. The estimates of the signal levels are stored within the data recovery circuit and are sampled by the clock recovery circuit so that the original data stream is recovered. The data recovery circuit is also arranged to generate a so-called “word metric” which is a quality factor representing the accuracy of the estimated signal levels. The clock recovery circuit is arranged to use both the received data stream, and the word metric generated in the data recovery circuit, to determine whether or not the current sampling time is optimal.Type: ApplicationFiled: February 21, 2003Publication date: October 23, 2003Applicant: Zarlink Semiconductor LimitedInventor: Alistair Goudie
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Patent number: 6617223Abstract: A method of forming an electrical isolation trench in a silicon-on-insulator (SOI) structure. The method comprises forming a first oxide layer on top of the upper silicon layer of the SOI structure, forming a polysilicon layer on top of said oxide layer, forming a second oxide layer on top of said polysilicon layer, patterning the first oxide layer, polysilicon layer, and second oxide layer to provide an etch mask, etching the upper silicon layer of the SOI structure to form said trench, and removing said second oxide layer and said polysilicon layer.Type: GrantFiled: February 21, 2002Date of Patent: September 9, 2003Assignee: Zarlink Semiconductor LimitedInventors: Martin Clive Wilson, Simon Lloyd Thomas
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Publication number: 20030146795Abstract: A voltage controlled oscillator (VCO) is provided which comprises:Type: ApplicationFiled: February 5, 2003Publication date: August 7, 2003Applicant: Zarlink Semiconductor LimitedInventors: Richard Albon, Nicholas Tingle
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Publication number: 20030142839Abstract: Apparatus and method for transmitting and reproducing stereophonic audio signals are disclosed. The method comprises splitting first and second channels into two frequency bands, combining the lower frequency band signals of the two channels, and transmitting the combined signals of the two channels or signals representative thereof. The apparatus comprises: a splitter for splitting each of the two channels into two frequency bands, a combiner, for combining the lower frequency band signals of the two channels, and a transmitter for transmitting the combined signals, or signals representative thereof, and the higher frequency band signals of the two channels, or signals representative thereof.Type: ApplicationFiled: January 10, 2003Publication date: July 31, 2003Applicant: Zarlink Semiconductor LimitedInventors: Marcus Richard Jones, Terence Christopher Aliwell