Patents Examined by A Owens
  • Patent number: 11863741
    Abstract: An encoder includes processing circuitry and a memory coupled to the processing circuitry. Using the memory, the processing circuitry is configured to: change values of pixels in a first block and a second block to filter a boundary between the first block and the second block. The pixels include type one pixels and type two pixels different from the type one pixels. The first set of filter coefficients applied to the type one pixels in the first block and the second set of filter coefficients applied to the type one pixels in the second block are selected to be asymmetrical with respect to the boundary based on block sizes of the first block and the second block.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: January 2, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma
  • Patent number: 11863742
    Abstract: The present disclosure provides a video data processing method. The method includes: receiving a bitstream; decoding a first index from the bitstream; determining a maximum number of an adaptive loop filter (ALF) for a component of a picture based on the first index; and processing pixels in the picture with the ALF.
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: January 2, 2024
    Assignee: Alibaba Group Holding Limited
    Inventors: Jie Chen, Ru-Ling Liao, Xinwei Li, Yan Ye
  • Patent number: 11860522
    Abstract: A light source apparatus includes a light source configured to emit first light, a wavelength converter configured to convert the first light into second light, an optical element disposed in an optical path of the first light to be incident on the wavelength converter, a light collector configured to collect the first light emitted from the optical element toward the wavelength converter, and a driver configured to rotate the optical element and the light collector around a rotation axis parallel to a first optical axis of the first light. The optical element has a first surface on which the first light is incident and a second surface via which the first light exits. The first light emitted from the light collector is incident on the wavelength converter along the second optical axis. The first optical axis and the second optical axis are shifted from each other.
    Type: Grant
    Filed: March 17, 2022
    Date of Patent: January 2, 2024
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Kunihiko Takagi
  • Patent number: 11860364
    Abstract: The present application discloses a head-mounted augmented reality (AR) apparatus, including: a head gear for being worn on a user's head; an optical module configured to provide AR display, connected to the head gear, and movable relative to the head gear; and a limit mechanism acting between the head gear and the optical module to enable the optical module to be selectively lockable in a first position or a second position relative to the head gear, in which in the first position the user when wearing the head gear is able to observe the outside scenery only through the optical module, and in the second position the user when wearing the head gear is able to observe the outside scenery completely not through the optical module. The present application also discloses a pair of AR eyeglasses similarly configured and an AR device for installation on the eyeglasses. Using the inventive technical means, the user is able to observe the real-world scene clearly and conveniently at any time.
    Type: Grant
    Filed: May 27, 2019
    Date of Patent: January 2, 2024
    Assignee: Matrixed Reality Technology Co., Ltd.
    Inventors: Bing Xiao, Yue He, Jingxian Zhao, Chi Xu
  • Patent number: 11862593
    Abstract: A cryogenic under bump metallization (UBM) stack includes an adhesion and barrier layer and a conductive pillar on the adhesion and barrier layer. The conductive pillar functions as a solder wetting layer of the UBM stack and has a thickness. An indium superconducting solder bump is on the conductive pillar. The thickness of the conductive pillar is sufficient to prevent intermetallic regions, which form in the conductive pillar at room temperature due to interdiffusion, from extending through the entire thickness of the conductive pillar to maintain the structural integrity of the UBM stack. The indium (In) solder bump may be formed through electroplating, with the conductive pillar being copper (Cu) and the adhesion and barrier layer being titanium tungsten (TiW) and a thin seed layer of copper (Cu), or a layer of titanium (Ti).
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: January 2, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Christopher Cantaloube, Richard P. Rouse
  • Patent number: 11860523
    Abstract: A wavelength conversion apparatus according to an aspect of the present disclosure includes a wavelength conversion layer that converts excitation light in terms of wavelength and an optical array layer formed of a plurality of cells each having a first surface on which light as a result of the wavelength conversion performed by the wavelength conversion layer is incident and a second surface via which the light exits. The optical array layer has a reflection surface that extends from the first surface to the second surface, is located at an interface between the cells adjacent to each other, and reflects the light.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: January 2, 2024
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Tomohiro Yokoo
  • Patent number: 11860527
    Abstract: An illumination system including an excitation light source array, a multi-region dichroic device, a color sequence generator, and a wavelength converter is provided. The excitation light source array emits excitation light beams. The multi-region dichroic device has first dichroic regions and non-dichroic regions that are alternately arranged in stripe shapes. The first dichroic regions are respectively disposed on transmission paths of the excitation light beams. The excitation light beams from the excitation light source array are transmitted to the color sequence generator through the first dichroic regions of the multi-region dichroic device, and at least one second dichroic region of the color sequence generator respectively reflects the excitation light beams to the non-dichroic regions of the multi-region dichroic device. The excitation light beams from the color sequence generator are transmitted to the wavelength converter through the non-dichroic regions of the multi-region dichroic device.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: January 2, 2024
    Assignee: Coretronic Corporation
    Inventors: Haw-Woei Pan, Jo-Han Hsu, Kuan-Ta Huang, Chi-Tang Hsieh
  • Patent number: 11855032
    Abstract: The disclosed semiconductor structure includes a semiconductor substrate, a metal pad, a bump, a first solder layer, a barrier layer, and a second solder layer. The metal pad is disposed on the semiconductor substrate; the bump is arranged on the metal pad; the barrier layer is configured on the side of the bump away from the metal pad. The barrier layer includes a first surface and a second surface. The first solder layer is arranged between the bump and the first surface of the barrier layer. The second solder layer is configured on the second surface of the barrier layer. Since the first solder layer and the second solder layer are formed by reflowed and melt solder at a high temperature and can be stretched, the height of the second solder can be adjusted automatically, which reduces the non-wetting problem caused by the package substrate deformation after reflow.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: December 26, 2023
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Ling-Yi Chuang
  • Patent number: 11855214
    Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a first semiconductor channel member and a second semiconductor channel member over the first semiconductor channel member and a porous dielectric feature that includes silicon and nitrogen. In the semiconductor device, the porous dielectric feature is sandwiched between the first and second semiconductor channel members and a density of the porous dielectric feature is smaller than a density of silicon nitride.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD.
    Inventors: Yu-Yun Peng, Fu-Ting Yen, Ting-Ting Chen, Keng-Chu Lin, Tsu-Hsiu Perng
  • Patent number: 11856153
    Abstract: An intra prediction method and device and a computer-readable storage medium, the method comprising: configuring actual angle modes indicated by relative angle numbers, wherein the relative angle numbers are successively represented within a prediction direction range corresponding to a preset width and height relationship; starting from a starting angle, using a corresponding actual angle mode after sampling preset angle sample points, said starting angle being determined according to the width and height relationship of processing blocks and the prediction direction range corresponding to the preset width and height relationship, and actual angles having a one-to-one correspondence with the actual angle modes.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: December 26, 2023
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventors: Junyan Huo, Yanzhuo Ma, Shuai Wan, Fuzheng Yang, Jinkun Guo
  • Patent number: 11855017
    Abstract: Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a first under-bump metallurgy (UBM) structure over and electrically coupled to the first redistribution line, the first UBM structure extending through the first passivation layer, a top surface of the first UBM structure being concave; and a second UBM structure over and electrically coupled to the second redistribution line, the second UBM structure extending through the first passivation layer, a top surface of the second UBM structure being flat or convex.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ting-Li Yang, Po-Hao Tsai, Ming-Da Cheng, Yung-Han Chuang, Hsueh-Sheng Wang
  • Patent number: 11852836
    Abstract: A directional illuminator includes a light source, a pupil-replicating lightguide, and a tiltable reflector coupling the light source to the pupil-replicating lightguide. The exit beam angle of the light outputted by the pupil-replicating lightguide follows the in-coupling angle, and accordingly depends on the tilting angle of the tiltable reflector. The directional illuminator with steered light beam may be used to illuminate a display panel. Steering the illuminating light by the tiltable reflector enables one to steer the exit pupil of the display device to match the user's eye location(s).
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: December 26, 2023
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Jacques Gollier, Fenglin Peng, Ying Geng, Anqi Ji
  • Patent number: 11852793
    Abstract: An imaging microscope (12) for generating an image of a sample (10) comprises a beam source (14) that emits a temporally coherent illumination beam (20), the illumination beam (20) including a plurality of rays that are directed at the sample (10); an image sensor (18) that converts an optical image into an array of electronic signals; and an imaging lens assembly (16) that receives rays from the beam source (14) that are transmitted through the sample (10) and forms an image on the image sensor (18). The imaging lens assembly (16) can further receive rays from the beam source (14) that are reflected off of the sample (10) and form a second image on the image sensor (18). The imaging lens assembly (16) receives the rays from the sample (10) and forms the image on the image sensor (18) without splitting and recombining the rays.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: December 26, 2023
    Assignee: DAYLIGHT SOLUTIONS, INC.
    Inventors: Miles James Weida, Timothy Day
  • Patent number: 11855038
    Abstract: A method for assembling components includes assembling a first component including solder bumps with a second component including connectors. The assembly of the components is preceded by pre-treating the first and second components wherein the solder bumps are contacted with a pre-treatment liquid configured to at least partially remove an oxide layer initially present on the solder. The pre-treatment liquid is an aqueous solution containing carboxylic acids or polycarboxylic acids. The assembly of the components is carried out after the pre-treatment in the absence of liquid or gas flux.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: December 26, 2023
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Olivier Castany, Nohora-Lizeth Caicedo Panqueva, Nadia Miloud-Ali, Yezouma-dieudonne Zonou
  • Patent number: 11855116
    Abstract: A first conductive portion includes a first pad surrounded by a first insulator film in a plane perpendicular to a first direction, and a first via connected to the first pad so that the first via is positioned between the first pad and a first semiconductor layer in the first direction. A second conductive portion includes a second pad surrounded by a second insulator film in a plane perpendicular to the first direction, and a second via connected to the second pad so that the second via is positioned between the second pad and a second semiconductor layer in the first direction. The first and the second conductive portions are different in dimension.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: December 26, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tsutomu Tange, Takumi Ogino, Hiroaki Kobayashi
  • Patent number: 11855015
    Abstract: A structure includes a controlled polyimide profile. A method for forming such a structure includes depositing, on a substrate, a photoresist containing polyimide and performing a first anneal at a first temperature. The method further includes exposing the photoresist to a radiation source through a photomask having a pattern associated with a shape of a polyimide opening. The method further includes performing a second anneal at a second temperature and removing a portion of the photoresist to form the polyimide opening. The method further includes performing a third anneal at a third temperature and cleaning the polyimide opening by ashing.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chen-Chi Huang, Chang-Yao Huang, Po-Cheng Chen
  • Patent number: 11856802
    Abstract: A first photoelectric conversion element according to an embodiment of the present disclosure incudes: a first electrode; a second electrode disposed to be opposed to the first electrode; and a photoelectric conversion layer provided between the first electrode and the second electrode and including a chromophore, fullerene or a fullerene derivative, and a hole-transporting material, in which the chromophore and the fullerene or the fullerene derivative are bonded to each other at least partially via a crosslinking group in the photoelectric conversion layer.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: December 26, 2023
    Assignees: Sony Corporation, Sony Semiconductor Solutions Corporation
    Inventors: Yosuke Saito, Sae Miyaji, Masato Kanno, Yasuharu Ujiie, Yuta Hasegawa, Osamu Enoki, Yuki Negishi
  • Patent number: 11849132
    Abstract: An image encoding/decoding method and apparatus of the present invention may derive motion information of a current block, and perform motion compensation for the current block on the basis of the motion information. The motion information of the current block is derived on the basis of an inter-mode predefined in an encoding/decoding apparatus, and the predefined inter-mode may include at least one of a merge mode, an AMVP mode, an affine mode, or an intra block copy (IBC) mode.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: December 19, 2023
    Assignee: B1 INSTITUTE OF IMAGE TECHNOLOGY, INC.
    Inventor: Ki Baek Kim
  • Patent number: 11846765
    Abstract: A process is provided for imaging a surface of a specimen with an imaging system that employs a BD objective having a darkfield channel and a bright field channel, the BD objective having a circumference. The specimen is obliquely illuminated through the darkfield channel with a first arced illuminating light that obliquely illuminates the specimen through a first arc of the circumference. The first arced illuminating light reflecting off of the surface of the specimen is recorded as a first image of the specimen from the first arced illuminating light reflecting off the surface of the specimen, and a processor generates a 3D topography of the specimen by processing the first image through a topographical imaging technique. Imaging apparatus is also provided as are further process steps for other embodiments.
    Type: Grant
    Filed: January 23, 2023
    Date of Patent: December 19, 2023
    Assignee: Nanotronics Imaging, Inc.
    Inventors: Matthew C. Putman, John B. Putman, Julie A. Orlando, Jospeh G. Bulman
  • Patent number: 11848292
    Abstract: Embodiments described herein provide techniques for forming an interconnect structure that includes micro features formed therein. Such embodiments can assist with improving interconnect joint reliability when compared to conventional pads that have a flat surface. An interconnect structure may comprise: a metal pad over a substrate (e.g., a semiconductor package, a PCB, an interposer, etc.). Micro features may be formed in an edge of the metal pad or away from the edge of the metal pad. The micro features can assist with: (i) increasing the contact area between solder used to form an interconnect joint and the metal pad; and (ii) improving adherence of solder used to form an interconnect joint to the metal pad. These benefits can improve interconnect joint reliability by, among others, improving the interconnect joint's ability to absorb stress from substrates having differing coefficients of thermal expansion.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: December 19, 2023
    Assignee: Intel Corporation
    Inventors: Sireesha Gogineni, Yi Xu, Yuhong Cai