Patents Examined by A Owens
  • Patent number: 11828950
    Abstract: A light source module includes a first light-splitting element, a second light-splitting element, a first light source, a second light source and a third light source. The first light source is configured to emit first light having a first wavelength to the first light-splitting element in a first optical path direction. The second light source is configured to emit second light having the first wavelength to the second light-splitting element in a second optical path direction opposite to the second optical path direction. The third light source is configured to emit third light having a second wavelength in a third optical path direction substantially perpendicular to the first optical path direction. The first light source includes a first reflective layer, the second light source includes a second reflective layer, wherein the first reflective layer and the second reflective layer are configured to reflect light having the first wavelength.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: November 28, 2023
    Assignee: Qisda Corporation
    Inventors: Chih-Shiung Chien, Ming-Kuen Lin, Yi-Ling Lo, Tsung-Hsun Wu
  • Patent number: 11830945
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, a second electrode, a gate electrode, second semiconductor regions of a second conductivity type, third semiconductor regions of the first conductivity type, and a third electrode. The second electrode is provided in a plurality in second and third directions. Each second electrode opposes a portion of the first semiconductor region in the second and third directions with an insulating layer interposed. The gate electrode is provided around each second electrode. The first semiconductor region includes first regions provided respectively around the second electrodes and the second region provided around the first regions in the second and third directions. Impurity concentration of the first conductivity type in each of the first regions is higher than impurity concentration of the first conductivity type in the second region.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: November 28, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kentaro Ichinoseki, Tatsuya Nishiwaki, Shingo Sato
  • Patent number: 11830833
    Abstract: An electronic substrate and an electronic device are provided. The electronic substrate includes a base, a protruding portion, and a bonding pad. The protruding portion and the bonding pad are disposed on the base. The bonding pad is not overlapped with a boundary of the protruding portion.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: November 28, 2023
    Assignee: Innolux Corporation
    Inventors: Chueh Yuan Nien, Chao-Chin Sung, Chia-Hung Hsieh, Mei Cheng Liu
  • Patent number: 11825084
    Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: November 21, 2023
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11825728
    Abstract: The present disclosure describes an organic-inorganic metal-halide-based semiconducting material that melts at lower temperatures compared to conventional inorganic semiconductors. The hybrid material is structurally engineered to easily access both crystalline and amorphous glassy states, with each state offering distinct physical properties.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: November 21, 2023
    Assignee: Duke University
    Inventors: Akash Singh, Manoj Jana, David B. Mitzi
  • Patent number: 11821092
    Abstract: An etchant capable of selectively etching copper and a copper alloy while suppressing dissolution of nickel, tin, gold, and an alloy thereof. The etchant contains: (A) 5-10.5% by mass of hydrogen peroxide with respect to the total mass of the etchant; (B) 0.3-6% by mass of nitric acid with respect to the total mass of the etchant; (C) at least one nitrogen-containing 5-membered ring compound selected from triazoles and tetrazoles, which may have at least one substituent selected from a C1-6 alkyl group, an amino group, and a substituted amino group having a substituent selected from a C1-6 alkyl group and a phenyl group; and (D) (d1) one or more pH adjusters selected from an alkali metal hydroxide, ammonia, an amine, and an ammonium salt, (d2) a phosphoric acid compound, or (d3) a combination of (d1) and (d2).
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: November 21, 2023
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Shun Fukazawa, Tomoko Fujii, Hiroshi Matsunaga
  • Patent number: 11817442
    Abstract: Microelectronic assemblies fabricated using hybrid manufacturing, as well as related devices and methods, are disclosed herein. As used herein, “hybrid manufacturing” refers to fabricating a microelectronic assembly by arranging together at least two IC structures fabricated by different manufacturers, using different materials, or different manufacturing techniques. For example, a microelectronic assembly may include a first IC structure that includes first interconnects and a second IC structure that includes second interconnects, where at least some of the first and second interconnects may include a liner and an electrically conductive fill material, and where a material composition of the liner/electrically conductive fill material of the first interconnects may be different from a material composition of the liner/electrically conductive fill material of the second interconnects.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: November 14, 2023
    Assignee: Intel Corporation
    Inventors: Wilfred Gomes, Abhishek A. Sharma, Mauro J. Kobrinsky, Doug B. Ingerly
  • Patent number: 11817382
    Abstract: A semiconductor package includes: a substrate; a first dielectric layer over the substrate; a first bond pad and a second bond pad over the first dielectric layer, the first bond pad having a first sidewall facing the second bond pad; a second dielectric layer over the first and the second bond pads; and an opening through the second dielectric layer and extending from the first bond pad to the second bond pad, the opening including a first area over and exposing the first bond pad, where in a top view, the opening exposes a first segment of the first sidewall disposed between a first edge and a second edge of the first area that intersect the first sidewall, where the first segment of the first sidewall is between a second segment and a third segment of the first sidewall, the second segment being covered by the second dielectric layer.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: November 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shu-Jung Tseng, Shyue-Ter Leu
  • Patent number: 11810882
    Abstract: A semiconductor device assembly, comprising a first semiconductor device including a first substrate with a frontside surface, a plurality of solder bumps located on the frontside surface of the first substrate, and a first polymer layer on the frontside surface. The semiconductor device assembly also comprises a second semiconductor device including a second substrate with a backside surface, a plurality of TSVs protruding from the backside surface of the second substrate, and a second polymer layer on the backside surface of the first substrate, the second polymer layer having a plurality of openings corresponding to the plurality of TSVs. The first and second semiconductor devices are bonded such that the first polymer layer contacts the second polymer layer and each of the plurality of solder bumps extends into a corresponding one of the plurality of openings and contacts a corresponding one of the plurality of TSVs.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: November 7, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Wei Zhou
  • Patent number: 11810980
    Abstract: Embodiments herein describe techniques for a transistor above a substrate. The transistor includes a channel layer above the substrate. The channel layer includes a first channel material of a first conductivity. In addition, the channel layer further includes elements of one or more additional materials distributed within the channel layer. The channel layer including the elements of the one or more additional materials has a second conductivity different from the first conductivity. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: November 7, 2023
    Assignee: Intel Corporation
    Inventors: Chieh-Jen Ku, Pei-Hua Wang, Bernhard Sell, Martin M. Mitan, Leonard C. Pipes
  • Patent number: 11803116
    Abstract: An illumination system configured to provide an illumination beam is provided and includes a light-source module and a first and a second wavelength conversion devices. The light-source module provides a first and a second excitation beams. The first wavelength conversion device is disposed on a path of the first excitation beam and has first regions and at least one first boundary disposed between every two adjacent first regions. The second wavelength conversion device is disposed on a path of the second excitation beam and has second regions and at least one second boundary disposed between every two adjacent second regions. The second regions correspond to the first regions. A time point when the first boundary gets into the path of the first excitation beam is different from a time point when the second boundary gets into the path of the second excitation beam. A projection apparatus is also provided.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: October 31, 2023
    Assignee: Coretronic Corporation
    Inventors: Ken-Teng Peng, Wei-Hao Chen, Kuo-Hsuan Fan
  • Patent number: 11803108
    Abstract: An adjustment mechanism is adapted to fix and adjust an optical element. The adjustment mechanism includes a housing, a fixing member and an elastic member. The housing is adapted for accommodate the optical element, and has a side wall, and the side wall has a locking portion protruding outward. The fixing member is disposed beside the side wall. The fixing member has a joint portion. The elastic member is disposed between the fixing member and the housing. The elastic member has a first end and a second end relative to the first end. The first end is combined with the joint portion, and the second end is abutted against the side wall. The adjusting part passes through the opening and connects with the locking portion. A projection device is further provided. The adjustment mechanism and the projection device of the invention may improve the assembly process and reduce costs.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: October 31, 2023
    Assignee: Coretronic Corporation
    Inventor: Chia-Ching Tso
  • Patent number: 11803850
    Abstract: A biometric heartrate authentication system and method is disclosed that leverages heartrate information collected by heartrate tracking devices to build a heartrate profile for a client. The system further leverages location information collected by existing location information services to determine an activity profile for a client. The activity profile information may be used together with the heartrate profile to generate an expected heartrate range against which a cardholder heartrate may be compared for authentication purposes. Because client heartrate characteristics are generally unique, varying according to the unique activities being performed by the client at any point in time, the system and method thus provide a low cost, non-invasive method for reliably authenticating individuals and securing against fraudulent account accesses.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: October 31, 2023
    Assignee: Capital One Services, LLC
    Inventors: Joshua Edwards, Abdelkader M'Hamed Benkreira, Kevan Emmott, Michael Mossoba
  • Patent number: 11805276
    Abstract: An intra prediction method and device and a computer-readable storage medium, the method comprising: configuring actual angle modes indicated by relative angle indices, wherein the relative angle indices are successively represented within a prediction direction range corresponding to a preset width and height relationship; starting from a starting angle, using a corresponding actual angle mode after sampling preset angle sample points, said starting angle being determined according to the width and height relationship of processing blocks and the prediction direction range corresponding to the preset width and height relationship, and actual angles having a one-to-one correspondence with the actual angle modes.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: October 31, 2023
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventors: Junyan Huo, Yanzhuo Ma, Shuai Wan, Fuzheng Yang, Jinkun Guo
  • Patent number: 11805680
    Abstract: A light-emitting diode display panel, a manufacturing method thereof, and an organic light-emitting diode display device are provided. The light-emitting diode display panel includes: a base substrate including a display region and a peripheral region surrounding the display region; a plurality of sub-pixels located in the display region and located at a side of the base substrate; a color-resistance layer located at a side of a second electrode in the sub-pixel away from the base substrate; and a light-blocking structure located in the peripheral region and being an annular structure surrounding the plurality of sub-pixels. The light-blocking structure includes a first light-blocking structure and a second light-blocking structure. The first light-blocking structure includes at least one interval extending in a direction from the display region pointing to the peripheral region. The second light-blocking structure at least fully fills the interval.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: October 31, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Dongsheng Li, Kuanta Huang, Shengji Yang, Pengcheng Lu, Yunlong Li, Qing Wang, Yongfa Dong, Xiaobin Shen, Hui Tong, Xiong Yuan, Yu Wang, Xiaochuan Chen
  • Patent number: 11803109
    Abstract: A projection method, which is executed by a projection device, for projecting drawing data for a building onto a projection plane of the building under construction includes: measuring a distance from each of three or more points which are not aligned in a straight line and are on either of two non-parallel straight lines on the projection plane to the projection device using a distance meter included in the projection device; and projecting the drawing data onto a projection position on the projection plane which is determined based on the distance measured and the angle of the distance meter at the time at which the distance is measured.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: October 31, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tetsuya Nishi, Yuki Hayashi, Keisuke Hara
  • Patent number: 11800103
    Abstract: An image decoding method includes reconstructing a current image by performing deblocking filtering on a boundary of at least one reconstruction block from among reconstruction blocks, wherein the reconstructing of the current image by performing the deblocking filtering on the boundary of the at least one reconstruction block from among the reconstruction blocks includes, when a prediction mode of at least one reconstruction mode from among blocks located on both sides of the boundary of the at least one reconstruction block is a combined inter-intra prediction mode, determining that a value of a boundary filtering strength applied to the boundary of the at least one reconstruction block is a predetermined value and performing deblocking filtering on the boundary of the at least one reconstruction block based on the determined value of the boundary filtering strength.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: October 24, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Minsoo Park, Minwoo Park, Kiho Choi, Seungsoo Jeong
  • Patent number: 11798904
    Abstract: The present disclosure relates to a redistribution layer (RDL) structure, a manufacturing method thereof, and a semiconductor structure having the same. The RDL structure includes an RDL, disposed on a substrate, and including a bond pad portion and a wire portion connected to the bond pad portion, where a thickness of the bond pad portion is greater than a thickness of the wire portion.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: October 24, 2023
    Assignee: Changxin Memory Technologies, Inc.
    Inventors: Ping-Heng Wu, Wen Hao Hsu
  • Patent number: 11800104
    Abstract: An image decoding method includes reconstructing a current image by performing deblocking filtering on a boundary of at least one reconstruction block from among reconstruction blocks, wherein the reconstructing of the current image by performing the deblocking filtering on the boundary of the at least one reconstruction block from among the reconstruction blocks includes, when a prediction mode of at least one reconstruction mode from among blocks located on both sides of the boundary of the at least one reconstruction block is a combined inter-intra prediction mode, determining that a value of a boundary filtering strength applied to the boundary of the at least one reconstruction block is a predetermined value and performing deblocking filtering on the boundary of the at least one reconstruction block based on the determined value of the boundary filtering strength.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: October 24, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Minsoo Park, Minwoo Park, Kiho Choi, Seungsoo Jeong
  • Patent number: 11794651
    Abstract: A vehicular vision system includes a video display screen and a video processor operable to process captured video image data captured by a rearward-viewing color video camera at the vehicle. The video display screen includes a left display region at a left portion, a right display region at a right portion, and a middle display region that spans between the left and right display regions. The video display screen (i) displays at the left display region video images derived from captured image data to display a scene occurring in a left side lane, (ii) displays at the right display region video images derived from captured image data to display a scene occurring in a right side lane and (iii) displays at the middle display region video images derived from captured image data to display a scene occurring rearward of the vehicle in the lane the equipped vehicle is travelling in.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: October 24, 2023
    Assignee: MAGNA ELECTRONICS INC.
    Inventors: Michael J. Baur, Rodney K. Blank, Mark L. Larson, Niall R. Lynam