Patents Examined by Aaron Dehne
  • Patent number: 8288216
    Abstract: A thin film transistor (TFT) and a method of fabricating the same are disclosed. The TFT includes a substrate, a gate electrode disposed over the substrate, a gate insulating layer disposed over the gate electrode, a semiconductor layer disposed over the gate insulating layer and including a polycrystalline silicon (poly-Si) layer, an ohmic contact layer disposed over a predetermined region of the semiconductor layer, an insulating interlayer disposed over substantially an entire surface of the substrate including the ohmic contact layer, and source and drain electrodes electrically connected to the ohmic contact layer through contact holes formed in the interlayer insulating layer. A barrier layer is interposed between the semiconductor layer and the ohmic contact layer. Thus, when an off-current of a bottom-gate-type TFT is controlled, degradation of characteristics due to a leakage current may be prevented using a simple process.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: October 16, 2012
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Jin-Hee Kang, Chun-Gi You, Sun Park, Jong-Hyun Park, Yul-Kyu Lee
  • Patent number: 8283265
    Abstract: Methods of improving charge trapping are disclosed. One such method includes forming an oxide-nitride-oxide tunnel stack and a silicon nitride layer on the oxide-nitride-oxide tunnel stack. This silicon nitride layer is implanted with ions. These ions may function as electron traps or as fields. The silicon nitride layer may be part of a flash memory device.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: October 9, 2012
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Deepak Ramappa, Kyu-Ha Shim
  • Patent number: 8278130
    Abstract: A back side illumination image sensor according to an embodiment includes: a device isolation region and a pixel region that are on a front side of a first substrate; a light sensor and a readout circuit that are on the pixel region; an interlayer dielectric layer and a metal line that are on the front side of the first substrate; a second substrate that is bonded to the front side of the first substrate on which the metal line is formed; a pixel isolating dielectric layer that is on the device isolation region at a back side of the first substrate; and a microlens that is on the light sensor at the back side of the first substrate.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: October 2, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Mun Hwan Kim
  • Patent number: 8263501
    Abstract: A silicon dioxide film fabricating process includes the following steps. Firstly, a substrate is provided. A rapid thermal oxidation-in situ steam generation process is performed to form a silicon dioxide film on the substrate. An annealing process is performed to anneal the substrate in a first gas mixture at a temperature in the range of 1000° C. to 1100° C.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: September 11, 2012
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Liang Lin, Yu-Ren Wang, Ying-Wei Yen
  • Patent number: 8263491
    Abstract: A substrate has at least one feedthrough with at least one channel from a first main surface of the substrate to a second main surface of the substrate. The at least one channel is closed off with a first material. The at least one closed-off channel is filled with an electrically conductive second material.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: September 11, 2012
    Assignee: Infineon Technologies AG
    Inventors: Florian Binder, Stephan Dertinger, Barbara Hasler, Alfred Martin, Grit Sommer, Holger Torwesten
  • Patent number: 8257050
    Abstract: Peening provides compression of component surfaces in order to create residual surface compressions to resist crack propagation in components such as aerofoils. Previously peening techniques have had problems with respect to achieving adequate treatment depths, speed of treatment and with respect to effectiveness. By the present method arrangement an electrical conductor in the form of a wire is subject to electrical pulses to cause evaporation and subsequent breakdown with high power ultrasound (HPU) propagation in a volume of dielectric fluid towards a component and so peening. The electrical conductor ensures that there is limited possibility of electrical discharge to the component surface while the positioning of the wire relative to the surface can be adjusted to achieve best effect particularly if reflector devices are utilized to concentrate (HPU) pulse presentation to the component.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: September 4, 2012
    Assignee: Rolls-Royce PLC
    Inventors: Igor Timoshkin, Scott J. MacGregor
  • Patent number: 8253169
    Abstract: There is provided a semiconductor device including: a SiC substrate; an AlGaN layer formed on the SiC substrate; a source electrode and a drain electrode formed on the AlGaN layer so as to be spaced from each other; a first insulation film formed between the source electrode and the drain electrode and having a band-like opening parallel to the drain electrode and the source electrode; a gate electrode formed at the opening in the first insulation film; a second insulation film formed on the first insulation film in such a manner as to cover a surface of the gate electrode; and a source field plate electrode which is formed on the second insulation film and the source electrode and an end portion of which on the drain electrode side is spaced from the second insulation film, thereby suppressing degradation in device performance.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: August 28, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hisao Kawasaki
  • Patent number: 8227341
    Abstract: An object is to prevent a failure, such as a wiring separation or a crack, in an insulating film under a copper wire, in a semiconductor device formed by wire-bonding the copper wire on a portion above the copper wiring. A semiconductor device according to the present invention includes a copper wiring formed above a semiconductor substrate, a plated layer formed so as to cover a top surface and side surfaces of the copper wiring, and a copper wire which is wire-bonded on the plated layer above the copper wiring.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: July 24, 2012
    Assignees: Semiconductor Components Industries, LLC, SANYO Semiconductor Co., Ltd.
    Inventors: Satoshi Onai, Minoru Akaishi, Hiroshi Ishizeki, Yoshiaki Sano
  • Patent number: 8227320
    Abstract: The present invention relates to methods of making capacitors for use in surveillance/identification tags or devices, and methods of using such surveillance/identification devices. The capacitors manufactured according to the methods of the present invention and used in the surveillance/identification devices described herein comprise printed conductive and dielectric layers. The methods and devices of the present invention improve the manufacturing tolerances associated with conventional metal-plastic-metal capacitor, as well as the deactivation reliability of the capacitor used in a surveillance/identification tag or device.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: July 24, 2012
    Assignee: Kovio, Inc.
    Inventors: Vivek Subramanian, Patrick Smith, Vikram Pavate, Arvind Kamath, Criswell Choi, Aditi Chandra, James Montague Cleeves
  • Patent number: 8198123
    Abstract: Improved methods and apparatus for forming thin-film layers of semiconductor material absorber layers on a substrate web. According to the present teachings, a semiconductor layer may be formed in a multi-zone process whereby various layers are deposited sequentially onto a moving substrate web.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: June 12, 2012
    Assignee: Global Solar Energy, Inc.
    Inventors: Jeffrey S. Britt, Scott Wiedeman
  • Patent number: 8198651
    Abstract: A semiconductor device for protecting against an electro static discharge is disclosed. In one embodiment, the semiconductor device includes a first low doped region disposed in a substrate, a first heavily doped region disposed within the first low doped region, the first heavily doped region comprising a first conductivity type, and the first low doped region comprising a second conductivity type, the first and the second conductivity types being opposite, the first heavily doped region being coupled to a node to be protected. The semiconductor device further includes a second heavily doped region coupled to a first power supply potential node, the second heavily doped region being separated from the first heavily doped region by a portion of the first low doped region, and a second low doped region disposed adjacent the first low doped region, the second low doped region comprising the first conductivity type.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: June 12, 2012
    Assignee: Infineon Technologies AG
    Inventors: Gernot Langguth, Wolfgang Soldner, Cornelius Christian Russ
  • Patent number: 8198135
    Abstract: The present invention provides a method for producing integrated circuits which are mechanically flexible and can be provided contiguously on a common flexible carrier substrate. The method includes a step of continuously providing a first flexible substrate which has conductor-line patterns, and a step of mounting the integrated circuits on the first flexible substrate and connecting the integrated circuits to the conductor-line patterns of the first flexible substrate, and a step of covering the circuits mounted on the first flexible substrate with a second flexible substrate, recesses being provided in the first or second flexible substrates in order to make the conductor-line patterns of the first flexible substrate accessible.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: June 12, 2012
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der Angewandten Forschung e.V.
    Inventors: Gerhard Klink, Christof Landesberger, Michael Feil
  • Patent number: 8188515
    Abstract: An aspect of the present invention inheres in a semiconductor device includes a semiconductor region, a source electrode and a drain electrode, which are provided on a main surface of the semiconductor region, a gate electrode exhibiting normally-off characteristics, the gate electrode being provided above the main surface of the semiconductor region while interposing a p-type material film therebetween, and being arranged between the source electrode and the drain electrode, and a fourth electrode that is provided on the main surface of the semiconductor region, and is arranged between the gate electrode and the drain electrode.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: May 29, 2012
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Osamu Machida, Akio Iwabuchi
  • Patent number: 8178438
    Abstract: Silicide films with high quality are formed with treatment of laser light irradiation, so that miniaturization and higher performance is achieved in a field-effect transistor that is formed over an insulating substrate and has little variation in electric characteristics. An island-shaped semiconductor film including a pair of impurity regions and a channel formation region is formed over an insulating substrate, a first metal film is formed on the pair of impurity regions, and a second metal film that functions as a reflective film is formed over a gate electrode located over the channel formation region with a gate insulating film interposed therebetween. The first metal film is irradiated with laser light and a region where the second metal film is formed reflects the laser light, so that the island-shaped semiconductor film and the first metal film selectively react with each other in the pair of impurity regions.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: May 15, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tomoaki Moriwaka
  • Patent number: 8178392
    Abstract: An electronic system is provided including forming a substrate having a radiating patterned pad, mounting an electrical device having an external interconnect over the radiating patterned pad with the external interconnect offset from the radiating patterned pad, and aligning the external interconnect with the radiating patterned pad.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: May 15, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Haengcheol Choi, Ki Youn Jang, Taewoo Kang, Il Kwon Shim
  • Patent number: 8157510
    Abstract: Embodiments of the invention provide an impeller assembly having a flexible impeller and a method of replacing a removable drive mechanism. The impeller assembly includes an impeller having an outer portion defining a substantially cylindrical shape, at least one flexible blade extending radially outward from the outer portion, and a first bore extending a first axial length. The impeller assembly also includes a tubular insert supported at least partially within the first bore. The tubular insert has a second bore defining a substantially cylindrical shape with a first radial distance from an axis passing through the center of the impeller, and a key portion radially extending from the second bore. The key portion defines a second radial distance from the axis larger than the first radial distance.
    Type: Grant
    Filed: October 22, 2008
    Date of Patent: April 17, 2012
    Assignee: Sta-Rite Industries, LLC
    Inventors: Patrick A. Bear, Matthew A. Cottrell, Michael L. Linsdau, David G. Vensland
  • Patent number: 8157533
    Abstract: A wind turbine blade comprising an active elastic member arranged with access to the surface of the wind turbine blade is provided. The active elastic member is deformable from a first shape to a second shape and the lift coefficient of the airfoil with the active elastic member in the first shape is larger than the lift coefficient of the airfoil with the active elastic member in the second shape. Furthermore, a wind turbine comprising such a wind turbine blade and a method of operating a wind turbine comprising such a wind turbine blade are provided.
    Type: Grant
    Filed: October 17, 2005
    Date of Patent: April 17, 2012
    Assignee: Vestas Wind Systems A/S
    Inventors: Kristian Balschmidt Godsk, Thomas S. Bjertrup Nielsen
  • Patent number: 8152465
    Abstract: A rotor blade comprises an inner rotor blade root area, a rotor blade main area disposed adjacent to the inner rotor blade root area along a length of the rotor blade and having an aerodynamically effective rotor blade profile, the profile including a nose area and a rear edge area, and a rotor blade tip disposed adjacent to the rotor blade main area along the length of the rotor blade. The rotor blade tip is configured to be deformable relative to the rotor blade main area and is operatively connected to a first actuator device. The first actuator device is configured to initiate a vertical movement of the rotor blade tip upwards or downwards relative to the lift direction. The vertical movement starts from a neutral position relative to the rotor blade main area.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: April 10, 2012
    Assignee: Eurocopter Deutschland GmbH
    Inventors: Peter Jaenker, Valentin Kloeppel
  • Patent number: 8129271
    Abstract: A film forming method is provided with a substrate placing step wherein a substrate is placed in a process chamber in an airtight status; a first film forming step wherein the process chamber is supplied with water vapor and a material gas including an organic compound of copper, and an adhered layer of copper is formed on the substrate; an exhaust step wherein the water vapor and the material gas in the process chamber are exhausted; and a second film forming step wherein the process chamber is resupplied with only the material gas and a copper film is further formed on the adhered layer.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: March 6, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Yasuhiko Kojima, Taro Ikeda, Tatsuo Hatano
  • Patent number: 8119524
    Abstract: A first film containing a first metal material having a diffusion preventing function for copper, a second film containing oxygen-contained copper film, a third film containing copper and a second metal material which exhibits a diffusion preventing function for copper by bonding with oxygen, and a fourth film of copper as the main material are formed in an opening formed in an insulating film, and then a barrier layer containing the first metal material, the second metal material and oxygen is formed by thermal processing between the insulating film and the fourth film.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: February 21, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Michie Sunayama, Noriyoshi Shimizu