Patents Examined by Ahmed Sefer
  • Patent number: 7397065
    Abstract: The invention discloses an organic electroluminescent device comprising a pixel element. The pixel element comprises a substrate comprising a control area and a sensitive area, a switch device and a driving device overlying the control area, a photo diode serving as a photo sensor overlying the sensitive area, an OLED element disposed in the sensitive area and illuminating to the photo sensor, and a capacitor coupled to the photo sensor and the driving device. Specifically, a photo current corresponding to a brightness of the OLED element is generated by the photo diode responsive to the OLED element illuminating the photo diode such that a voltage of the capacitor is adjusted by the photo current to control the current passing through the driving device, thus changing the illumination of the OLED element. A method for fabricating the OLED is also provided.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: July 8, 2008
    Assignee: TPO Displays Corp.
    Inventors: Chang-Ho Tseng, Du-Zen Peng, Yaw-Ming Tsai
  • Patent number: 7394124
    Abstract: A dynamic random access memory (DRAM) is provided. The dynamic random access memory includes a deep trench capacitor disposed in a first trench of a substrate, a conductive layer disposed in a second trench of the substrate, a gate structure, and a conductive layer disposed on the surface of the substrate at two sides of the gate structure. The depth of the second trench is smaller than the depth of the first trench, and the second trench partially overlaps with the first trench. The conductive layer disposed in the second trench is electrically connected with the conductive layer of the deep trench capacitor. The gate structure is disposed on the substrate. The conductive layer at one side of the gate structure is electrically connected with the conductive layer disposed in the second trench.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: July 1, 2008
    Assignee: ProMOS Technologies Inc.
    Inventors: Jih-Wen Chou, Yu-Chi Chen
  • Patent number: 7388228
    Abstract: Thin film transistors for a display device each include a semiconductor layer made of polysilicon having a channel region, drain and source regions at both sides of the channel region and doped with impurity of high concentration, and an LDD region arranged either between the drain region and the channel region or between the source region and the channel region and doped with impurity of low concentration. An insulation film is formed over an upper surface of the semiconductor layer and has a film thickness which decreases in a step-like manner as it extends to the channel region, the LDD region, the drain and the source regions; and a gate electrode is formed over the channel region through the insulation film. Such a constitution can enhance the numerical aperture and can suppress the magnitude of stepped portions in a periphery of the thin film transistor.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: June 17, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Tanabe, Shigeo Shimomura, Makoto Ohkura, Masaaki Kurita, Yasukazu Kimura, Takao Nakamura
  • Patent number: 7378703
    Abstract: The semiconductor device includes a substrate including a first active region and a second active region having a greater height than that of the first active region. A gate pattern has a step structure, which is formed on a border region between the first active region and the second active region. The gate pattern extends from a predetermined portion of the first active region to a predecided portion of the second active region. Gate spacers are formed on both sidewalls of the gate pattern. A first cell junction is formed in the first active region at one gate spacer and connected to a storage node contact. A second cell junction is formed in the second active region at the other gate spacer and connected to a bit line contact.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: May 27, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Tae-Woo Jung, Sang-Won Oh
  • Patent number: 6274886
    Abstract: In a thin-film-transistor-array substrate, a plurality of gate wires and a plurality of source wires are provided on the substrate to form a matrix; a pixel is formed on each of a plurality of areas each enclosed by two adjacent ones of the gate wires and two adjacent ones of the source wires; the pixel includes a thin-film-transistor having: a gate electrode formed as a portion of the gate wire; a source electrode formed as a portion of the source wire; and a drain electrode connected to a pixel electrode formed on an insulation layer covering the gate electrode, the gate wire, the source electrode and the source wire through a contact hole formed by boring the insulation layer, and a dummy hole is formed by boring a portion of the insulation film above at least one of the gate electrode, the gate wire, the source electrode and the source wire in close proximity to the contact hole with the dummy hole reaching the gate electrode, the gate wire, the source electrode or the source wire respectively.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: August 14, 2001
    Assignee: LG. Philips LCD Co., Ltd.
    Inventors: Makoto Sasaki, Hitoshi Kitagawa