Patents Examined by Albert Wang
  • Patent number: 10725683
    Abstract: A controller of a storage device is described for handling communications with a host device. In some examples, the storage device includes a wide port comprising a plurality of phys. The wide port is configured to receive, via a first phy of the plurality of phys, a signal. The controller is configured to select, based on a respective power factor associated with each respective phy of the plurality of phys and a respective performance factor associated with each respective phy of the plurality of phys, a second phy of the plurality of phys to utilize for performing an operation associated with the received signal. In such examples, the wide port is further configured to perform, using the second phy, the operation associated with the received signal.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: July 28, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Darin Edward Gerhart, Nicholas Edward Ortmeier
  • Patent number: 10725791
    Abstract: In one embodiment, an operating system is booted based on results of boot-up operations performed during a shutdown. In operation, during a shutdown phase of an operating system, one or more boot-up operations are performed, and the results of these operations are stored in memory. During a boot-up phase of the operating system, the results are received, and the operating system is booted based on the one or more results.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: July 28, 2020
    Assignee: Harman International Industries, Incorporated
    Inventors: Rohit Mewar, Eugine Varghese
  • Patent number: 10712767
    Abstract: According to one embodiment, there is provided a clock generator including a frequency divider configured to generate a divided frequency clock of a frequency lower than that of a source clock by performing mask processing on part of a pulse train of the source clock.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: July 14, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Satoshi Kamiya
  • Patent number: 10698467
    Abstract: In some examples, an Emergency Power Off (EPO) device can be connected to a non-EPO port of a computing device, and the EPO device can provide an EPO signal via the non-EPO port to a manager connected to an energy storage device of the computing device, wherein the EPO signal comprises instructions to power off the energy storage device.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: June 30, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Daniel Humphrey, Stewart Gavin Goodson, II, Mark Rivera, Gennadiy Rozenberg
  • Patent number: 10698473
    Abstract: A method for reducing power consumption in an electronic control unit (ECU) equipped with an Ethernet communication function and mounted in a vehicle include initializing a physical layer upon restarting of the physical layer and setting a transmission mode to a data mode. The method includes generating a clock signal having a first frequency for Ethernet communication, checking presence or absence of a normal frame to be transmitted, checking presence or absence of an idle frame based on a reception signal symbol, and determining whether to change the frequency of the clock signal based on checking results in the checking of presence or absence of a normal frame and the checking of presence or absence of an idle frame.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: June 30, 2020
    Assignees: HYUNDAI MOTOR COMPANY, KIA MOTORS COMPANY
    Inventor: Soon Chul Park
  • Patent number: 10691465
    Abstract: A method for synchronization of system management data includes steps of generating a request for system management data in response to execution of a system booting program, transmitting the request to a baseboard management controller so as to enable the baseboard management controller to transmit the system management data stored in a second storage unit to a processor; receiving the system management data from the baseboard management controller, and determining whether the system management data is complete; and when it is determined that the system management data is complete, storing at least one of the sequential packets of the system management data in a first storage unit, and proceeding with execution of the system booting program.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: June 23, 2020
    Assignee: Mitac Computing Technology Corporation
    Inventors: Po-Wen Huang, Le Xing, Bichao Wang, Cheng-Chieh Yeh, Jie Zhang, Chen-Nan Hsiao
  • Patent number: 10671407
    Abstract: Suspending and resuming a card runtime environment for a card computing device are disclosed. A card computing device obtains a suspension request. The suspension request includes a proposed value for a minimum suspension interval and/or a proposed value for a maximum suspension interval. The suspension request is accepted or rejected, by the card computing device, based on the proposed value for the minimum suspension interval and/or the proposed value for the maximum suspension interval. The card computing device may negotiate a different value for the maximum suspension interval. Additionally, a card computing device obtains a resumption request. The resumption request includes a resume token. The card computing device determines whether the resume token in the resumption request is valid. The card computing device determines whether the suspension interval is valid. The card computing device resumes the state that was associated with the card computing device at the time of suspension.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: June 2, 2020
    Assignee: Oracle International Corporation
    Inventors: Sebastian J├╝rgen Hans, Vlad Victor Petrovici, Andrei Gabriel Serban
  • Patent number: 10664598
    Abstract: Technologies for receiving and using alternate firmware files of a computer are described herein. In some examples, firmware files to be used instead of currently used firmware files are stored in a firmware volume, which is stored in a UEFI partition. A flag is set indicating the presence of a firmware volume containing the alternate firmware files. At boot time, if it is determined that the flag has been set, the computer will utilize files stored in the firmware volume stored in the UEFI partition rather than corresponding files in a firmware.
    Type: Grant
    Filed: August 15, 2017
    Date of Patent: May 26, 2020
    Assignee: American Megatrends International, LLC
    Inventors: Stefano Righi, Madhan B. Santharam, Amanda Nicole Stark
  • Patent number: 10620659
    Abstract: A method and system to perform clock network analysis of a clock network of an integrated circuit that includes a grid obtains parameters for each transmission line of the clock network that carries a clock signal between a source of the clock signal and the grid. The method also includes obtaining models of nonlinear components of the clock network, and numerically solving a frequency domain nonlinear Harmonic Balance equation to obtain voltage values at an input and an output of each of the nonlinear components. The number of the voltage values obtained is proportional to the number of the nonlinear components. A physical implementation of the integrated circuit is obtained based on the clock network analysis.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: April 14, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Peter Feldmann, Haifeng Qian
  • Patent number: 10613615
    Abstract: An electronic apparatus according to one embodiment of the present technology includes a sensor, a power storage element, and a communication module. The sensor generates charge in accordance with a surrounding environment. The power storage element accumulates the generated charge. The communication module includes an electric power supply unit and a communication processing unit. The electric power supply unit supplies electric power by generating electric power with energy in a surrounding environment. The communication processing unit is configured to be capable of being switched between a stand-by state and an operating state on the basis of the electric power supplied from the electric power supply unit and is configured to be capable of acquiring accumulation information of the charge from the power storage element and outputting the accumulation information in the operating state.
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: April 7, 2020
    Assignee: SONY CORPORATION
    Inventors: Hideo Niikura, Masakazu Yajima
  • Patent number: 10613606
    Abstract: Apparatuses, methods and storage medium associated with power management, are disclosed herein. In embodiments, an apparatus for computing may include one or more processors, with each processor having one or more processor cores; one or more wireless communication components; memory coupled with the one or more processors to host a plurality of virtual machines operated by the one or more processors; and a virtual machine monitor to be loaded into the memory and operated by the one or more processors to manage resource allocation to the virtual machines. The virtual machine monitor may include a power manager to manage power consumption of the apparatus, based at least in part on states of the wireless communication components. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: April 7, 2020
    Assignee: Intel Corporation
    Inventor: Alexander W. Min
  • Patent number: 10599446
    Abstract: A mechanism for transparent (or non-disruptive) virtual tape engines restart. Specifically, the disclosed mechanism entails preserving a pre-restart state prior to restarting a virtual tape engine, followed by restoring the pre-restart state after the restarting in order to achieve transparency.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: March 24, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Mikhail Tolstoy, Yuri Kotov, Dmitry Ashkadov, Mikhail Saravayskiy
  • Patent number: 10592232
    Abstract: The present disclosure provides a system and method for preserving firmware settings in a baseboard management controller (BMC) or a flash memory component of a server system. In accordance with one aspect of the present disclosure, a computer-implemented method for automatically preserving firmware settings of the server system, comprises: powering on the server system; retrieving a plurality of future firmware settings from a baseboard management controller (BMC) of the server system; applying the plurality of future firmware settings to the server system; sending a plurality of current firmware settings to the BMC with a unique string mapping scheme; performing an entire firmware flash update; copying the plurality of current firmware settings stored on the BMC to the plurality of future firmware settings of the BMC; and rebooting the server system by applying the plurality of future firmware settings stored on the BMC.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: March 17, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventor: Yu-Han Lin
  • Patent number: 10591981
    Abstract: Embodiments of the present invention provide a terminal control method and apparatus, and a terminal. The method includes: when a screen of a terminal is switched from a screen-on state to a screen-off state, detecting whether an enabling condition of a power saving mode is satisfied; and if the enabling condition of the power saving mode is satisfied, performing a power saving operation, where the power saving operation is used to reduce power consumption that occurs when an application program in the terminal runs in a background. In the embodiments of the present invention, power consumption in a screen-off state is reduced as much as possible without affecting normal use of a user.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: March 17, 2020
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yuhua Guo, Jiesi Li, Huanhuan Jing, Changfeng Zhou, Tengfei Mu
  • Patent number: 10591971
    Abstract: An embodiment may include an application processor, persistent storage media coupled to the application processor, and a graphics subsystem coupled to the application processor. The system may further include any of a performance analyzer to analyze a performance of the graphics subsystem to provide performance analysis information, a content-based depth analyzer to analyze content to provide content-based depth analysis information, a focus analyzer to analyze a focus area to provide focus analysis information, an edge analyzer to provide edge analysis information, a frame analyzer to provide frame analysis information, and/or a variance analyzer to analyze respective amounts of variance for the frame. The system may further include a workload adjuster to adjust a workload of the graphics subsystem based on the analysis information. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: April 1, 2017
    Date of Patent: March 17, 2020
    Assignee: Intel Corporation
    Inventors: Travis T. Schluessler, Joydeep Ray, John H. Feit, Nikos Kaburlasos, Jacek Kwiatkowski, Abhishek R. Appu, Kamal Sinha, James M. Holland, Pattabhiraman K., Sayan Lahiri, Radhakrishnan Venkataraman, Carson Brownlee, Vivek Tiwari, Kai Xiao, Jefferson Amstutz, Deepak S. Vembar, Ankur N. Shah, ElMoustapha Ould-Ahmed-Vall
  • Patent number: 10572273
    Abstract: A system change assistance system includes value redefinition means 501 configured to compare two vectors, one of which is set to a first comparison subject vector and the other is set to a second comparison subject vector, each configured from a set of a value of a first item having a discrete value in which the number of possible values is finite or less than a predetermined value, and a value of a second item having a continuous value or a discrete value in which the number of possible values is equal to or larger than a predetermined value, and to change the value of the first item of the first comparison subject vector in a case where the value of the first item of each vector is matched and the value of the second item of each vector is different.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: February 25, 2020
    Assignee: NEC CORPORATION
    Inventors: Atsushi Kitano, Takayuki Kuroda, Manabu Nakanoya
  • Patent number: 10564665
    Abstract: A first set of replicated state machines includes a first state machine that compares a clock value included in a state update message incremented by a first amount, a clock value for the first state machine incremented by a second amount, and a current local wall clock value for the first state machine to determine a maximum value and assigns the maximum value as the clock value for the first state machine. Additionally, in response to a passage of an amount of time, the first state machine advances the clock value for the first state machine to its current local wall clock value and propagates this clock value to the other state machines in the first set of replicated state machines. The advancement of the clock value for all state machines even in the absence of state updates improves their ability to respond to distributed read requests.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: February 18, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Cheng Huang, Garret Buban, Jacob R. Lorch, Aaron W. Ogus, Mauricio David Zaragoza Ibarra, Jieqing Wang
  • Patent number: 10558257
    Abstract: An information handling system may include at least one processor, and an information handling resource communicatively coupled to the at least one processor. The information handling system may be configured to cause the information handling resource to enter a low-power state, and further configured to cause the information handling resource to enter a full-power state. The information handling system may also be configured to cause at least one communication link of the information handling resource to remain inactive until detection of a specified event.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: February 11, 2020
    Assignee: Dell Products L.P.
    Inventors: Hahn Norden, David E. Rock
  • Patent number: 10552613
    Abstract: A computing device that implements a secure and transparent firmware update process is provided. The computing device includes a secure memory area and a secure device that separately executes firmware updates in parallel with other processes executed by a CPU. The secure memory area may be allocated by the CPU and/or a memory controller using any of a variety of memory protection techniques. System software executed by the CPU receives update firmware requests from a trusted source, stores a firmware payload included in these requests in the secure memory area, and executes the next scheduled process. Firmware executed by the secure device retrieves the firmware payload from the secure memory area, authenticates the firmware payload, and applies the firmware payload to a firmware storage device. The secure device performs these acts transparently from the point of view of the CPU, these avoiding consumption of resources of the CPU.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: February 4, 2020
    Assignee: INTEL CORPORATION
    Inventors: Krishnakumar Narasimhan, Sudhakar Otturu, Karunakara Kotary, Vincent J. Zimmer
  • Patent number: 10534621
    Abstract: An information processing apparatus has a processor and a programmable logic circuit device (PLD) that includes a reconfiguration region to configure a logic circuit requested by a configuration request from the processor. The processor compares a first execution time of a plurality of the logic circuits for a case when a degree of parallelism adjustment is performed by decreasing a degree of parallelism of a first logic circuit and increasing a degree of parallelism of a second logic circuit and a second execution time of the plurality of logic circuits for a case when the degree of parallelism adjustment is not performed, and requests the degree of parallelism adjustment to the PLD when the first execution time is shorter than the second execution time, and does not request the degree of parallelism adjustment to the PLD when the first execution time is not shorter than the second execution time.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: January 14, 2020
    Assignee: FUJITSU LIMITED
    Inventors: David Thach, Hisanori Fujisawa