Abstract: A light-emitting package, includes: a housing including an opening; a lead frame covered by the housing; a light-emitting device, mounted in the opening and electrically connected to the lead frame, the light-emitting device including: a substrate including: a base with a main surface; and a plurality of protrusions on the main surface, wherein the protrusion and the base include different materials; a semiconductor stack on the main surface, the semiconductor stack including a side wall, and wherein an included angle between the side wall and the main surface is an obtuse angle; wherein the main surface includes a peripheral area not covered by the semiconductor stack, and the peripheral area is devoid of the protrusion formed thereon; and a filling material filling in the opening and covering the light-emitting device.

Abstract: A barrier film for a wavelength conversion sheet, which can effectively suppress adhering of a light guide plate to the wavelength conversion sheet and suppresses damaging of a wavelength conversion sheet, a light guide plate, a diffusion plate, etc. A barrier film includes at least a barrier layer and base material layers. The barrier film has stacked on one surface thereof a mat layer including a resin and fillers which at least partially project from the mat layer. In a plan view, the proportion of the projecting fillers from the mat layer that are viewed as having a particle size at least twice the thickness of the mat layer is 20-80% of the total fillers projecting from the mat layer, and the total number of fillers in a square of 1 mm2 in the plan view of the mat layer is 1800 or more.

Abstract: In an embodiment a method includes providing a semiconductor body, forming a sacrificial layer above a surface of the semiconductor body, applying a diaphragm on the sacrificial layer and removing the sacrificial layer by introducing an etchant into openings of the diaphragm, wherein applying the diaphragm comprises applying a first layer, reducing a roughness of a surface of the first layer facing away from the semiconductor body thereby providing a processed surface, and patterning and structuring the first layer to form the openings.

Abstract: A semiconductor structure comprises a substrate defining a first axis and a second axis in orthogonal relation to the first axis, first and second nanosheet stacks disposed on the substrate, a gate structure on each of the first and second nanosheet stacks, a source/drain region adjacent each of the first and second nanosheet stacks, a wrap-around contact disposed about each source/drain region and an isolator pillar disposed between the wrap-around contacts.

Abstract: In some embodiments, the present disclosure relates to an image sensor, including a semiconductor substrate, a plurality of photodiodes disposed within the semiconductor substrate, and a deep trench isolation structure separating the plurality of photodiodes from one another and defining a plurality of pixel regions corresponding to the plurality of photodiodes. The plurality of pixel regions includes a first pixel region sensitive to a first region of a light spectrum, a second pixel region sensitive to a second region of the light spectrum, and a third pixel region sensitive to a third region of the light spectrum. The first pixel region is smaller than the second pixel region or the third pixel region.

Abstract: The present disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, and a carbonitride semiconductor layer. The first nitride semiconductor layer is over the substrate. The second nitride semiconductor layer is formed on the first nitride semiconductor layer and has a greater bandgap than that of the first nitride semiconductor layer. The carbonitride semiconductor layer is between the substrate and the first nitride semiconductor layer.

Abstract: An organic light-emitting diode (OLED) display device is provided, which includes an OLED display module, the OLED display module includes a plurality of sub-display sections, adjacent sub-display sections are dynamically connected to each other, and the sub-display sections can be expanded and integrated into a large-area display region, or dynamically accommodated to form at least one display section. By dynamically connecting multiple sub-display sections, a large-sized flexible display screen can be folded.

Abstract: An organic light-emitting diode (OLED) display panel, a manufacturing method thereof, and a display device are provided. The OLED display panel includes a substrate; an array functional layer; a light-emitting layer; a thin-film encapsulation layer; and a liquid crystal layer, which is disposed on the thin-film encapsulation layer, including a first liquid crystal region arranged on a non-pixel region and a second liquid crystal region arranged on a pixel region, wherein liquid crystal molecules positioned in the first liquid crystal region are aligned parallel to the substrate.

Abstract: A FinFET includes a semiconductor fin, and a source region and a drain region in the same semiconductor fin. The drain region has a first fin height above a trench isolation; and the source region has a second fin height above the trench isolation. The first fin height is less than the second fin height. The FinFET may be used, for example, in a scaled laterally diffused metal-oxide semiconductor (LDMOS) application, and exhibits reduced parasitic capacitance for improved radio frequency (RF) performance. A drain extension region may have the first fin height, and a channel region may have the second fin height. A method of making the FinFET is also disclosed.

Abstract: A method for making an isolation region of a CIS device includes: forming a block layer on a substrate, below the block layer being an oxide layer, below the oxide layer being a silicon nitride layer, and a shallow trench isolation being formed in the substrate; forming a hard mask layer on the surface of the block layer, the material of the hard mask layer is oxide; performing a photolithography process and an etching process to form an isolation region pattern in the hard mask layer; performing an ion implantation process to form an isolation region in the substrate corresponding to the isolation region pattern.

Abstract: A semiconductor device in an embodiment includes a substrate and a transistor. The transistor includes a source layer, a drain layer, a gate insulation film, a gate electrode, a contact plug and a first epitaxial layer. The source layer and the drain layer are provided in surface regions of the substrate, and contain an impurity. The gate insulation film is provided on the substrate between the source layer and the drain layer. The gate electrode is provided on the gate insulation film. The contact plug is provided so as to protrude to the source layer or the drain layer downward of a surface of the substrate. The first epitaxial layer is provided between the contact plug and the source layer or drain layer, and contains both the impurity and carbon.

Abstract: A display panel includes a display region with a thin film transistor and a plurality of data lines and a non-display region. Thin film transistor includes a gate, a source region and a drain region, data lines include a plurality of first type data lines which are located at an edge of display region and close to a side of non-display region. First type data line includes a first sub-data line extending in a first direction, a conductive connection line extending in a second direction and a second sub-data line extending in a first direction. First sub-data line is connected with source region or drain region. A first insulating layer is between conductive connection line and first sub-data line. A second insulating layer is between second sub-data line and conductive connection line, and second sub-data line is closer to a central axis of display panel than first sub-data line.

Abstract: Provided is a semiconductor structure, a memory cell and a memory array. An nT-MRAM can be realized by a relatively simple structure. Transistors connected to multiple MTJs are connected by connecting pads.

Abstract: A display substrate, a method for manufacturing the display substrate, and a display device. The display substrate includes a first sub-pixel and a second sub-pixel, the first sub-pixel includes a first data line pattern, and the second sub-pixel includes a second data line pattern, a second electrode of the sixth transistor in the first sub-pixel is electrically connected to the anode pattern through the third conductive connection portion and the fourth conductive connection portion; in the first sub-pixel, an orthographic projection of the anode pattern on the substrate at least partially overlaps an orthographic projection of the second data line pattern on the substrate, and the orthographic projection of the anode pattern on the substrate at least partially overlaps an orthographic projection of a data line pattern adjacent to the second data line pattern along the first direction on the substrate.

Abstract: A semiconductor device includes a first substrate structure including a first substrate, circuit devices, first interconnection lines, bonding metal layers on upper surfaces of the first interconnection lines, and a first bonding insulating layer on the upper surfaces of the first interconnection lines and on lateral surfaces of the bonding metal layers, and a second substrate structure on the first substrate structure, and including a second substrate, gate electrodes, channel structures, second interconnection lines, bonding vias connected to the second interconnection lines and the bonding metal layers and having a lateral surface that is inclined such that widths of the bonding vias increase approaching the first substrate structure, and a second bonding insulating layer in contact with at least lower portions of the bonding vias. The bonding metal layers include dummy bonding metal layers not connected to the bonding vias and that contacts the second bonding insulating layer.

Abstract: A semiconductor device includes a substrate, a lower stack structure on the substrate and including lower gate electrodes stacked apart from each other, an upper stack structure on the lower stack structure and including upper gate electrodes stacked apart from each other, a lower channel structure penetrating through the lower stack structure and including a lower channel layer, and a lower channel insulating layer on the lower channel layer the lower channel insulating layer surrounding a lower slit, and an upper channel structure penetrating through the upper stack structure and including an upper channel layer and an upper channel insulating layer on the upper channel layer, the upper channel insulating layer surrounding an upper slit. A width of the lower slit is greater than a width of the upper slit, and a thickness of the lower channel insulating layer is greater than a thickness of the upper channel insulating layer.

Abstract: A novel light-emitting device is provided. Alternatively, a light-emitting device with high emission efficiency is provided. Alternatively, a light-emitting device having a long lifetime is provided. Alternatively, a light-emitting device having low driving voltage is provided. A light-emitting device including an EL layer including a first layer, a second layer, a third layer, a light-emitting layer, and a fourth layer in this order from the anode side is provided. The first layer includes a first organic compound and a second organic compound. The fourth layer includes a seventh organic compound. The first organic compound exhibits an electron-accepting property with respect to the second organic compound. The HOMO level of the second organic compound is from ?5.7 eV to ?5.4 eV. The HOMO level of the seventh organic compound is ?6.0 eV or higher.

Abstract: An image sensor includes a pixel separation structure disposed in a semiconductor substrate and defining a plurality of pixel regions, a first photoelectric conversion region and a second photoelectric conversion region disposed in the semiconductor substrate and in each of the plurality of pixel regions, and a plurality of micro-lenses disposed on the semiconductor substrate and corresponding to the plurality of pixel regions. The semiconductor substrate includes a plurality of curved surfaces that is convex toward the plurality of micro-lenses, and the semiconductor substrate has a minimum thickness between the first photoelectric conversion region and the second photoelectric conversion region in each of the plurality of pixel regions, and has a maximum thickness at a boundary between the plurality of pixel regions.

Abstract: A method for fabricating a Pt nanorod electrode array sensor device includes forming planar metal electrodes on a flexible film, co-depositing Pt alloy on the planar metal electrodes via physical vapor deposition, and dealloying the Pt alloy to etch Pt nanorods from the deposited Pt alloy. A Pt nanorod electrode sensor device includes a plurality of porous Pt nanorods on a planar metal electrode forming a sensor electrode. The planar metal electrode is on a flexible substrate. An electrode lead on the flexible substrate extends away from the planar metal electrode. Insulation is around porous Pt nanorods an upon the electrode lead.

Abstract: A sensor module comprising: A sensor chip (5) is provided on an upper surface of the substrate (1). A lens (7) is provided above the sensor chip (5) such that a light receiving unit of the sensor chip (5) is positioned in a projection area. A lens cap (8) includes a cap body (8a) surrounding the sensor chip (5) to hold the lens (7), and a cap edge part (8b) protruding outward from a lower end part of the cap body (8a). An ultraviolet-curing type bonding agent (9) bonds the upper surface of the substrate (1) and a lower surface of the lens cap (8). A cutout (10) is provided on an outer side surface of the cap edge part (8b). The bonding agent (9) enters in the cutout (10).