Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, a semiconductor structure includes an epitaxial source feature and an epitaxial drain feature, a vertical stack of channel members disposed over a backside dielectric layer, the vertical stack of channel members extending between the epitaxial source feature and the epitaxial drain feature along a direction, a gate structure wrapping around each of the vertical stack of channel members, and a backside source contact disposed in the backside dielectric layer. The backside source contact includes a top portion adjacent the epitaxial source feature and a bottom portion away from the epitaxial source feature. The top portion and the bottom portion includes a step width change along the direction.

Abstract: A photoelectric conversion apparatus includes a plurality of pixels. Each of the plurality of pixels includes a first photoelectric conversion region and a second photoelectric conversion region. A first semiconductor region is disposed between the first photoelectric conversion region and the second photoelectric conversion region. The first photoelectric conversion region and the second photoelectric conversion region contain a first element mainly forming the first photoelectric conversion region and the second photoelectric conversion region, and the first photoelectric conversion region and the second photoelectric conversion region contain a second element. The first semiconductor region contains the first element and a third element. A mass number of the third element is twice or more a mass number of the first element.

Abstract: A method forming an image sensor includes: providing a substrate including a plurality of sensing portions; forming a color filter layer on the substrate; forming a micro-lens material layer on the color filter layer; and forming a hard mask pattern on the micro-lens material layer, wherein the hard mask pattern has a first gap and a second gap larger than the first gap. The method includes reflowing the hard mask pattern into a plurality of dome shapes; transferring the plurality of dome shapes into the micro-lens material layer to form a plurality of micro-lenses; and forming a top film conformally on the plurality of micro-lenses.

Abstract: A novel light-emitting element is provided. A light-emitting element with a long lifetime is provided. A light-emitting element with high emission efficiency is provided. In the light-emitting element, an EL layer includes a hole-injection layer, a first hole-transport layer, a second hole-transport layer, a third hole-transport layer, a light-emitting layer, a first electron-transport layer, and a second electron-transport layer in this order; the hole-injection layer includes an organic acceptor; the LUMO level of the host material is higher than that of the first electron-transport layer; the LUMO level of the second electron-transport layer is higher than that of the first electron-transport layer; the host material is a substance including a condensed aromatic ring skeleton; and the first and second electron-transport layers each include a substance having a heteroaromatic ring skeleton.

Abstract: Methods and apparatus for cleaving a substrate in a semiconductor chamber. The semiconductor chamber pressure is adjusted to a process pressure, a substrate is then heated to a nucleation temperature of ions implanted in the substrate, the temperature of the substrate is then adjusted below the nucleation temperature of the ions, and the temperature is maintained until cleaving of the substrate occurs. Microwaves may be used to provide heating of the substrate for the processes. A cleaving sensor may be used for detection of successful cleaving by detecting pressure changes, acoustic emissions, changes within the substrate, and/or residual gases given off by the implanted ions when the cleaving occurs.

Abstract: Disclosed are etchstop regions in fins of semiconductor devices, and related methods. A semiconductor device includes a buried region, a fin on the buried region, and a gate formed at least partially around the fin. At least a portion of the fin that borders the buried region includes an etchstop material. The etchstop material includes a doped semiconductor material that has a slower etch rate than that of an intrinsic form of the semiconductor material. A method of manufacturing a semiconductor device includes forming a gate on a fin, implanting part of the fin with dopants configured to decrease an etch rate of the part of the fin, removing at least part of the fin, and forming an epitaxial semiconductor material on a remaining proximal portion of the fin.

Abstract: A pixel-array substrate includes a semiconductor substrate and a passivation layer. The semiconductor substrate includes a pixel array surrounded by a periphery region. A back surface of the semiconductor substrate forms, in the periphery region, a plurality of first peripheral-trenches extending into the semiconductor substrate. The passivation layer is on the back surface and lines each of the plurality of first peripheral-trenches.

Abstract: An image sensing device includes a substrate layer in which an array of photoelectric conversion elements is formed, grid structures disposed over the substrate layer to divide space above the substrate into different sensing regions, each grid structure including an air layer, color filters formed to fill bottom portions of spaces between the grid structures, the color filters having a higher refractive index than the air layer, and a lens layer disposed over the grid structures and the color filters such that part of the lens layer fills top portions of the spaces between the grid structures, the lens layer having a higher refractive index than of the color filters.

Abstract: The present technology relates to a solid-state imaging device and electronic equipment to suppress degradation of Dark characteristics. A photoelectric converting unit configured to perform photoelectric conversion, and a PN junction region including a P-type region and an N-type region on a side of a light incident surface of the photoelectric converting unit are included. Further, on a vertical cross-section, the PN junction region is formed at three sides including a side of the light incident surface among four sides enclosing the photoelectric converting unit. Further, a trench which penetrates through a semiconductor substrate in a depth direction and which is formed between the photoelectric converting units each formed at adjacent pixels is included, and the PN junction region is also provided on a side wall of the trench. The present technology can be applied, for example, to a backside irradiation type CMOS image sensor.

Abstract: Designs of image sensing devices by including a substrate layer including a plurality of photoelectric conversion elements, a plurality of grid structures disposed over the substrate layer, a plurality of color filter layers each of which is disposed between adjacent grid structures, a plurality of over-coating layers formed over the color filter layers, and a plurality of microlenses formed over the over-coating layers. Each of the grid structures includes an air layer, and a capping film formed to cap the air layer, and an upper portion of the air layer is formed to protrude upward from the over-coating layer.

Abstract: A chamber apparatus comprises a lower and an upper chamber body, and a gasket member. The lower chamber body defines a receiving region and a first receiving groove. The upper chamber body disposed above the lower chamber body and defines a second receiving groove projectively align to the first receiving groove. The second receiving groove is configured to establish sealing coupling with the lower chamber body so as to form a chamber enclosure region. The gasket member includes a conductive member and an elastomeric member. The conductive member configured to laterally surround the receiving region and respectively fit into the lower chamber body and the upper chamber body. The elastomeric member is protruded from the conductive member and extended toward the receiving region, configured to be compressed by the upper and the lower chamber body so as to seal the chamber enclosure region.

Abstract: In an embodiment, a method of forming a semiconductor device includes forming a hydrophobic coating on an inner surface of an exhaust line, connecting the exhaust line to a semiconductor processing chamber, introducing a first precursor into the semiconductor processing chamber, introducing a second precursor into the semiconductor processing chamber, wherein the first precursor reacts with the second precursor to form a layer of oxide material, and pumping the first precursor and the second precursor from the semiconductor processing chamber and through the exhaust line.

Abstract: Technologies for reducing series resistance are disclosed. An example method may comprise: forming a first layer on a temporary substrate; forming a second layer on the first layer; etching the first layer and the second layer to form a trench; electroplating a top electrode via the trench, wherein the top electrode partially formed on a top surface of the second layer; removing the first layer and the second layer; forming a curable layer on the temporary substrate and the top electrode; removing the temporary substrate from the curable layer and the top electrode; forming a cross-point device on the curable layer and the top electrode; forming a bottom electrode on the cross-point device; and forming a flexible substrate on the bottom electrode.

Abstract: Integrated circuit (IC) structures including asymmetric, recessed source and drain regions and methods for forming are provided. In an example, the IC structure includes a substrate, a gate structure over the substrate, first and second spacers contacting respective, opposite sidewalls of the gate structure, and source and drain regions on opposite sides of the gate structure. In one configuration, the source region includes an upper source portion having a first lateral width, and a lower source portion having a second lateral width greater than the first lateral width, and the drain region includes an upper drain portion having a third lateral width, and a lower drain portion having a fourth lateral width that is substantially the same as the third lateral width.

Abstract: A semiconductor device according to the present disclosure includes a first source/drain epitaxial feature and a second source/drain epitaxial feature each having an outer liner layer and an inner filler layer, a plurality of channel members extending between the first source/drain epitaxial feature and the second source/drain epitaxial feature along a first direction, and a gate structure disposed over and around the plurality of channel members. The plurality of channel members are in contact with the outer liner layer and are spaced apart from the inner filler layer. The outer liner layer comprises germanium and boron and the inner filler layer comprises germanium and gallium.

Abstract: An image sensor structure includes a semiconductor device, a plurality of image sensing elements formed in the semiconductor substrate, an interconnect structure formed on the semiconductor substrate, and a composite grid structure over the semiconductor substrate. The composite grid structure includes a tungsten grid, an oxide grid over the tungsten grid, and an adhesion enhancement grid spacing the tungsten grid from the oxide grid.

Abstract: The present disclosure relates to semiconductor power devices, and in particular, to a high-electron-mobility transistor (HEMT) with high voltage endurance capability and a preparation method thereof. The high-electron-mobility transistor with high voltage endurance capability includes a gate electrode, a source electrode, a drain electrode, a barrier layer, a P-type nitride semiconductor layer and a substrate, wherein the P-type nitride semiconductor layer is between the barrier layer and the substrate, which is insufficient to significantly deplete a two-dimensional electron gas in a channel except a gate stack, the source electrode is in electrical contact with the P-type nitride semiconductor layer, and the source electrode and the drain electrode are both in electrical contact with the two-dimensional electron gas.

Abstract: A semiconductor structure includes a photodetector, which includes a substrate semiconductor layer having a doping of a first conductivity type, a second-conductivity-type photodiode layer that forms a p-n junction with the substrate semiconductor layer, a floating diffusion region that is laterally spaced from the second-conductivity-type photodiode layer, and a transfer gate electrode including a lower transfer gate electrode portion that is formed within the substrate semiconductor layer and located between the second-conductivity-type photodiode layer and the floating diffusion region. The transfer gate electrode may laterally surround the p-n junction, and may provide enhanced electron transmission efficiency from the p-n junction to the floating diffusion region. An array of photodetectors may be used to provide an image sensor.

Abstract: Methods of forming trench structures of different depths in a semiconductor substrate are provided. A first mask forming a first opening and a second opening is provided on the semiconductor substrate. The semiconductor substrate is etched through the first and second openings, thereby forming a first trench and a second trench. Trench structure material is deposited in the first and second trenches, thereby forming first and second trench structures. A second mask is provided on the first mask, wherein the second mask covers the first opening and has a third opening superimposed over the second opening of the first mask. The second trench structure is etched through the second opening of the first mask and through the third opening of the second mask.

Abstract: A method for manufacturing a semiconductor device according to an, exemplary embodiment of the present disclosure includes: forming a semiconductor layer on a substrate in a chamber; and forming a semiconductor layer on a substrate in a chamber. Forming the insulation layer includes: (a) injecting precursors that include a metal into a surface of the semiconductor layer; (b) removing precursors that are not adsorbed; (c) injecting reactants onto the surface of the semiconductor layer; and (d) removing residual reactants. The semiconductor layer includes a semiconductor material that has a layered structure.