Abstract: Methods of etching back an oxide-nitride-oxide (ONO) layer of a 3-d flash memory cell without breaking vacuum are described. The methods include recessing the two outer silicon oxide dielectric layers to expose the flanks of the thin silicon nitride layer. The silicon nitride layer is then etched back from all exposed sides to hasten the process on the same substrate processing mainframe. Both etching back the silicon oxide and etching back the silicon nitride use remotely excited fluorine-containing apparatuses attached to the same mainframe to facilitate performing both operations without an intervening atmospheric exposure. The process may also be reversed such that the silicon nitride is etched back first.

Abstract: An etching method in which bowing or lateral etching is reduced or minimized, particularly with respect to bowing which can occur in etching of an oxide layer in high aspect ratio structures. It has been recognized that such bowing typically occurs in the upper portion of the oxide layer in terms of its location, but that the timing at which the bowing occurs is during the etching of the lower regions of the oxide layer and also during etching of a poly-Si or SOI layer located under the oxide layer. In a preferred form, a thicker passivation layer is formed in the upper region of the oxide layer and a thinner passivation layer is formed when etching the lower portion of the oxide layer or deeper in the etch trench. As a result, reduction in the passivation layer in the upper region which can occur during etching of the lower or deeper region of the trench can be accommodated by the increased thickness passivation layer.

Abstract: Compositions useful for the selective removal of silicon nitride materials relative to poly-silicon, silicon oxide materials and/or silicide materials from a microelectronic device having same thereon. The removal compositions include fluorosilicic acid, silicic acid, and at least one organic solvent. Typical process temperatures are less than about 100° C. and typical selectivity for nitride versus oxide etch is about 200:1 to about 2000:1. Under typical process conditions, nickel-based silicides as well as titanium and tantalum nitrides are largely unaffected, and polysilicon etch rates are less than about 1 ? min?1.

Abstract: Lithography method for etching very dense patterns on a substrate, based on a combination of several less dense partial patterns; a sacrificial layer is formed on a substrate and is etched according to a first partial pattern; spacers are formed on edges of elements of the sacrificial layer, the spacers defining a second partial pattern; then the sacrificial layer is removed leaving only the spacers remaining. A layer sensitive to an electron beam is subsequently deposited between the spacers to a thickness less than or equal to the height of the spacers, and this sensitive layer is exposed using an electron beam according to a third partial pattern such that there remains on the substrate a final pattern of regions lacking spacers and a sensitive layer, this pattern resulting from the combination of the second and third partial patterns and having higher density than each of the partial patterns.

Abstract: Provided is a process for the manufacture of semiconductor devices comprising the chemical mechanical polishing of borophosphosilicate glass (BPSG) material in the presence of a chemical mechanical polishing (CMP) composition which comprises: (A) inorganic particles, organic particles, or a mixture or composite thereof, (B) at least one type of anionic phosphate or phosphonate as dispersing agent or charge reversal agent, (C) at least one type of surfactant, and (D) an aqueous medium.

Abstract: A method of patterning a semiconductor device using a tri-layer photoresist is disclosed. A material layer is formed over a substrate. A tri-layer photoresist is formed over the material layer. The tri-layer photoresist includes a bottom layer, a middle layer disposed over the bottom layer, and a photo-sensitive layer disposed over the middle layer. A lithography process is performed to pattern the photo-sensitive layer into a mask having one or more openings. Undesired portions of the mask are removed via a first etching process. Thereafter, the middle layer is patterned via a second etching process. The second etching process includes forming a coating layer around the mask while the middle layer is being etched. In some embodiments, the second etching process includes a continuous plasma etching process. The plasma etching process is performed using at least a CxHyFz gas and an H2 gas.

Abstract: A method of forming a planar surface for a semiconductor device structure. The method comprises forming a particle film comprising a plurality of discrete particles on a non-planar surface of a semiconductor device structure. The semiconductor device structure is subjected to at least one chemical-mechanical polishing process after forming the particle film on the non-planar surface of the semiconductor device structure. Methods of forming a semiconductor device structure are also described.

Abstract: In a semiconductor device manufacturing method, on a film to be processed, a mask material film is formed which has pattern openings for a plurality of contact patterns and connection openings for connecting adjacent pattern openings in such a manner that the connection between them is constricted in the middle. Then, a sidewall film is formed on the sidewalls of the individual openings in the mask material film, thereby not only making the diameter of the pattern openings smaller but also separating adjacent pattern openings. Then, the film to be processed is selectively etched with the mask material film and sidewall film as a mask, thereby making contact holes.

Abstract: The invention relates to a method for processing a structured surface of an embossing tool, in which the entire surface is provided with a first metallic coating (6) and said surface having, in selected regions (7, 8, 9, 10, 11), at least one additional metallic coating that has a differing degree of lustre. To improve the optical properties of the material boards produced using the embossing tools, particularly if reproducing a wood texture, the invention suggests that additional differing degrees of lustre should be produced in multiple selected regions (7, 8, 9, 10, 11) on the first coating (6), and be produced by a combination of metallic coatings and mechanical or chemical after-treatments. Therefore, for example, a wood pore with a defined structure can be substantially better reproduced, and the optical and haptic properties of the wood composite board produced using the press plates can thus be improved.

Abstract: An object is to provide a polishing liquid composition that can provide hydrophilicity to a wafer surface and effectively improve a haze in polishing of wafers for substrates in electronics industry. The present invention is a polishing liquid composition for wafers, comprising: water; silica particles; an alkaline compound; a polyvinyl alcohol; an anion-modified polyvinyl alcohol; and a surfactant, wherein the mass ratio of the anion-modified polyvinyl alcohol to the polyvinyl alcohol is 0.6 to 5.5. The anion-modified polyvinyl alcohol is preferably a polyvinyl alcohol modified with a carboxy group or a sulfonic acid group.

Abstract: Beam-induced etching uses a work piece maintained at a temperature near the boiling point of a precursor material, but the temperature is sufficiently high to desorb reaction byproducts. In one embodiment, NF3 is used as a precursor gas for electron-beam induced etching of silicon at a temperature below room temperature.

Abstract: Surface-modifying layers, including neutral layers for vertical domain-forming block copolymers of styrene and methyl methacrylate are provided. Also provided are self-assembled block copolymer structures incorporating the surface modifying layers, methods of fabricating such structures and methods of using the structures in BCP lithography applications. The surface-modifying layers comprise a crosslinked copolymer film, wherein the crosslinked copolymers are random copolymers polymerized from styrene monomers and/or (meth)acrylate monomers and crosslinkable epoxy group-functionalized monomers. The crosslinked copolymer films are characterized by a high content of the crosslinkable epoxy group-functionalized monomer.

Abstract: A method for manufacturing a light-absorbing substrate having a surface with depressions and projections comprises a first step of irradiating a substrate with a laser light so as to form a plurality of modified regions arranged two-dimensionally along a surface of the substrate within the substrate and cause at least one of each modified region and a fracture generated from the modified region to reach the surface of the substrate and a second step of etching the surface of the substrate after the first step so as to form depressions and projections on the surface of the substrate.

Abstract: A method is provided for fabricating a semiconductor structure. The method includes providing a to-be-etched layer; and forming a hard mask layer on the to-be-etched layer. The method also includes forming a photoresist layer on the hard mask layer; and forming a patterned photoresist layer having openings exposing the hard mask layer by exposing and developing the photoresist layer. Further, the method includes forming sidewall spacers on side surfaces of the openings; and forming a patterned hard mask layer by etching the hard mask layer using the patterned photoresist layer and the sidewall spacers as an etching mask such that patterns in the hard mask layer have a substantially right angle at edge. Further, the method also includes forming to-be-etched patterns by etching the to-be-etched layer based on the patterned hard mask layer.

Abstract: Semiconductor device manufacturing methods are disclosed. In some embodiments, a method of manufacturing a semiconductor device includes forming a first pattern in a hard mask using a first lithography process, and forming a second pattern in the hard mask using a second lithography process. A protective layer is formed over the hard mask. Portions of the hard mask and portions of the protective layer are altered using a self-aligned double patterning (SADP) method.

Abstract: Plasma processing systems and methods for using pre-dissociated and/or pre-ionized tuning gases are disclosed herein. In one embodiment, a plasma processing system includes a reaction chamber, a support element in the reaction chamber, and one or more cathode discharge assemblies in the reaction chamber. The reaction chamber is configured to produce a plasma in an interior volume of the chamber. The support element positions a microelectronic workpiece in the reaction chamber, and the cathode discharge assembly supplies an at least partially dissociated and/or ionized tuning gas to the workpiece in the chamber.

Abstract: A polishing slurry for a chemical mechanical planarization process includes polishing particles and polyhedral nanoscale particles having a smaller size than the polishing particles and including a bond of silicon (Si) and oxygen (O).

Abstract: Embodiments of the present invention relate to systems and methods for designing and manufacturing hard masks used in the creation of patterned magnetic media and, more particularly, patterned magnetic recording media used in hard disk drives (e.g., bit patterned media (BPM)). In some embodiments, the hard mask incorporates at least one layer of Ta (tantalum) and at least one layer of C (carbon) and is used during ion implantation of a pattern onto magnetic media. The hard mask can be fabricated with a high aspect ratio to achieve small feature sizes while maintaining its effectiveness as a mask, is robust enough to withstand the ion implantation process, and can be removed after the ion implantation process with minimal damage to the magnetic media.

Abstract: Disclosed is an in-situ optical monitor (ISOM) system and associated method for controlling plasma etching processes during the forming of stepped structures in semiconductor manufacturing. The in-situ optical monitor (ISOM) can be optionally configured for coupling to a surface-wave plasma source (SWP), for example a radial line slotted antenna (RLSA) plasma source. A method is described to correlate the lateral recess of the steps and the etched thickness of a photoresist layer for use with the in-situ optical monitor (ISOM) during control of plasma etching processes in the forming of stepped structures.

Abstract: A method for fabricating high-density masks for non-planar or three-dimensional substrates utilizes a mandrel having one or more precision forms machined therein. Once the mandrel with one or more forms is fabricated, one or more mask blanks may be constructed thereon. The final masks may be cut from one or more mask blanks.