Abstract: This invention relates to a method for texturing a silicon surface and silicon wafers made by the method, where the method comprises immersing the wafers in an alkaline solution at pH>10, and applying a potential difference between the wafer and a platinum electrode in the electrolyte in the range of +10 to +85 V.
Abstract: A method and an apparatus for forming a structure on a component made of a material composed of silicon oxide, especially of silicate glass, glass ceramic or quartz, wherein in accordance with the process at least a first surface of the component a partial removal of the material by plasma etching takes place and during the plasma etching at least at the surface to be etched a substrate temperature is established which is substantially greater than 90° C. but less than the softening temperature of the material. The apparatus is equipped for this purpose with a heater for generating the substrate temperature.
Type:
Grant
Filed:
April 30, 2009
Date of Patent:
February 18, 2014
Assignee:
FHR Anlagenbau GmbH
Inventors:
Thomas Gessner, Andreas Bertz, Reinhard Schubert, Thomas Werner, Wolfgang Hentsch, Reinhard Fendler, Lutz Koehler
Abstract: A processing gas is introduced to remove an oxide film on the surface of a silicon substrate 5. F radicals are allowed to act on the surface of the silicon substrate to etch a silicon layer. Then, NH3 gas, N2 gas and NF3 gas are introduced, allowing NHxFy to act on the oxidized surface of the silicon substrate 5, thereby forming (NH4)2SiF6. The resulting (NH4)2SiF6 is sublimated to remove by-products (SiOF, SiOH) on the surface of the silicon substrate 5.
Abstract: Methods of preparing a clean surface of germanium tin or silicon germanium tin layers for subsequent deposition are provided. An overlayer of Ge, doped Ge, another GeSn or SiGeSn layer, a doped GeSn or SiGeSn layer, an insulator, or a metal can be deposited on a prepared GeSn or SiGeSn layer by positioning a substrate with an exposed germanium tin or silicon germanium tin layer in a processing chamber, heating the processing chamber and flowing a halide gas into the processing chamber to etch the surface of the substrate using either thermal or plasma assisted etching followed by depositing an overlayer on the substantially oxide free and contaminant free surface. Methods can also include the placement and etching of a sacrificial layer, a thermal clean using rapid thermal annealing, or a process in a plasma of nitrogen trifluoride and ammonia gas.
Type:
Grant
Filed:
April 26, 2012
Date of Patent:
February 11, 2014
Assignee:
Applied Materials, Inc.
Inventors:
Errol Antonio C. Sanchez, Yi-Chiau Huang
Abstract: Semiconductor material substrates are polished by a method including at least one polishing step A by means of which the substrate is polished on a polishing pad containing an abrasive material bonded in the polishing pad and a polishing agent solution is introduced between the substrate and the polishing pad during the polishing step; and at least one polishing step B by means of which the substrate is polished on a polishing pad containing an abrasive material-containing polishing pad and wherein a polishing agent slurry containing unbonded abrasive material is introduced between the substrate and the polishing pad during the polishing step.
Type:
Grant
Filed:
July 2, 2008
Date of Patent:
February 11, 2014
Assignee:
Siltronic AG
Inventors:
Juergen Schwandner, Thomas Buschhardt, Roland Koppert, Georg Pietsch
Abstract: According to one embodiment, there is provided a method of forming a pattern, includes forming a guide pattern including a first region having a first surface energy and a second region having a second surface energy on a to-be-processed film, the first and second regions alternately arranged in one direction, forming a block copolymer layer on the guide pattern, and causing microphase separation in the block copolymer layer, the microphase-separated structure is a lamellar block copolymer pattern.
Abstract: Two methods of fabricating a MEMS scanning mirror having a tunable resonance frequency are described. The resonance frequency of the mirror is set to a particular value by mass removal from the backside of the mirror during fabrication.
Type:
Grant
Filed:
October 7, 2010
Date of Patent:
January 28, 2014
Assignees:
MagIC Technologies, Inc., Advanced Numicro Systems, Inc.
Inventors:
Jun Chen, Guomin Mao, Tom Zhong, Wei Cao, Yee-Chung Fu, Chyu-Jiuh Torng
Abstract: Provided are methods for depositing a high-k dielectric film on a substrate. The methods comprise annealing a substrate after cleaning the surface to create dangling bonds and depositing the high-k dielectric film on the annealed surface.
Abstract: Provided are methods for depositing a high-k dielectric film on a substrate. The methods comprise annealing a substrate after cleaning the surface to create dangling bonds and depositing the high-k dielectric film on the annealed surface.
Abstract: The invention relates to a method for electron beam induced etching of a layer contaminated with gallium, with the method steps of providing at least one first halogenated compound as an etching gas at the position at which an electron beam impacts on the layer, and providing at least one second halogenated compound as a precursor gas for removing of the gallium from this position.
Type:
Grant
Filed:
August 11, 2009
Date of Patent:
January 21, 2014
Assignee:
Carl Zeiss SMS GmbH
Inventors:
Nicole Auth, Petra Spies, Rainer Becker, Thorsten Hofmann, Klaus Edinger
Abstract: A plasma etching method capable of forming a tapering etching structure having a smooth surface is provided. A fluorine-containing gas and a nitrogen gas are used and plasma is generated from these gases simultaneously, and a silicon substrate K is etched by the plasma while an etch-resistant layer is formed on the silicon substrate K by the plasma and then a fluorine-containing gas and an oxygen-containing gas are used and plasma is generated from these gases simultaneously, and the silicon substrate K is etched by the plasma while an etch-resistant layer is formed on the silicon substrate K by the plasma generated from the oxygen-containing gas, thereby forming a tapering etching structure H having a wide top opening width and a narrow bottom width.
Abstract: The invention relates to a method for in-line measuring the active KOH concentration in a KOH etching process in which process silicon hydroxide is produced by a reduction reaction according to the formula: 2K+ (aq.)+2OH? (aq.)+2H2O+Si?2K+ (aq.)+H2SiO42? (aq.)+2H2 (g). The total concentration of KOH bath is measured by using a refractometer and the measurement result is corrected by the estimated K2H2SiO4 concentration.
Abstract: A method for trimming a structure obtained by bonding a first wafer to a second waver on contact faces and thinning the first waver, wherein at least either the first wafer or the second wafer is chamfered and thus exposes the edge of the contact face of the first wafer, wherein the trimming concerns the first wafer. The method includes a) selecting the second wafer from among wafers with a resistance to a chemical etching planned in b) that is sufficient with respect to the first wafer to allow b) to be carried out; b) after bonding the first wafer to the second wafer, chemical etching the edge of the first wafer to form in the first wafer a pedestal resting entirely on the contact face of the second wafer and supporting the remaining of the first wafer; and c) thinning the first wafer until the pedestal is reached and attacked, to provide a thinned part of the first wafer.
Type:
Grant
Filed:
November 20, 2012
Date of Patent:
January 14, 2014
Assignees:
Commissariat a l'Energie Atomique et aux Energies Alternatives, Soitec
Inventors:
Marc Zussy, Bernard Aspar, Chrystelle Lagahe-Blanchard, Hubert Moriceau
Abstract: A method is provided for treating the surface of high aspect ratio nanostructures to help protect the delicate nanostructures during some of the rigorous processing involved in fabrication of semiconductor devices. A wafer containing high aspect ratio nanostructures is treated to make the surfaces of the nanostructures more hydrophobic. The treatment may include the application of a primer that chemically alters the surfaces of the nanostructures preventing them from getting damaged during subsequent wet clean processes. The wafer may then be further processed, for example a wet cleaning process followed by a drying process. The increased hydrophobicity of the nanostructures helps to reduce or prevent collapse of the nanostructures.
Type:
Grant
Filed:
February 1, 2010
Date of Patent:
December 31, 2013
Assignee:
Lam Research Corporation
Inventors:
Amir A. Yasseri, Ji Zhu, Seokmin Yun, David S. L. Mui, Katrina Mikhaylichenko
Abstract: A capacitive microphone transducer integrated into an integrated circuit includes a fixed plate and a membrane formed in or above an interconnect region of the integrated circuit. A process of forming an integrated circuit containing a capacitive microphone transducer includes etching access trenches through the fixed plate to a region defined for the back cavity, filling the access trenches with a sacrificial material, and removing a portion of the sacrificial material from a back side of the integrated circuit.
Type:
Grant
Filed:
December 16, 2010
Date of Patent:
December 31, 2013
Assignee:
Texas Instruments Incorporated
Inventors:
Marie Denison, Brian E. Goodlin, Wei-Yan Shih, Lance W. Barron
Abstract: A manufacturing method is provided for manufacturing a substrate for information storage media having various properties that are demanded for a next generation of information storage media substrate purposes exemplified by perpendicular magnetic recording systems, etc., and above all, having high fracture toughness and a smooth surface at low cost. The method of manufacturing a substrate for information storage media includes a step of preparing glass material of a plate shape containing SiO2 component, Al2O3 component, and R?2O component, R? being at least one selected from Li, Na, and K, and the step of lapping includes at least one sub-step of lapping the glass material with a diamond pad.
Abstract: A substrate treatment apparatus includes a reaction tube and a heater heating a silicon wafer. Trimethyl aluminum (TMA) and ozone (O3) are alternately fed into the reaction tubeto generate Al2O3 film on the surface of the wafer. The apparatus also includes supply tubes and for flowing the ozone and TMA and a nozzle supplying gas into the reaction tube. The two supply tubes are connected to the nozzle disposed inside the heater in a zone inside the reaction tube where a temperature is lower than a temperature near the wafer, and the ozone and TMA are supplied into the reaction tube through the nozzle.
Abstract: A laser processing method of converging a laser light into an object to be processed made of glass so as to form a modified region and etching the object along the modified region so as to form a through hole in the object comprises a browning step of discoloring at least a part of the object by browning; a laser light converging step of forming the modified region in the discolored part of the object by converging the laser light into the object after the browning step; and an etching step of etching the object after the laser light converging step so as to advance the etching selectively along the modified region and form the through hole.
Abstract: The polishing solution for CMP of the invention comprises abrasive grains, a first additive and water, wherein the first additive is at least 1,2-benzoisothiazole-3(2H)-one or 2-aminothiazole. The polishing method of the invention is a polishing method for a substrate having a silicon oxide film on the surface, and the polishing method comprises a step of polishing the silicon oxide film with a polishing pad while supplying the polishing solution for CMP between the silicon oxide film and the polishing pad.