Patents Examined by Allan W. Olsen
  • Patent number: 11391960
    Abstract: A method of fabricating a shadow mask includes depositing a chrome etch mask layer on a substrate. The substrate includes a silicon handle wafer, a buried oxide layer, a single crystal silicon layer, and a backside oxide layer. The method also includes forming a patterning layer including a pattern on the chrome etch mask layer, etching the chrome etch mask layer using the patterning layer to transfer the pattern in the patterning layer into the chrome etch mask layer, and etching the pattern of the chrome etch mask layer into the single crystal silicon layer. The method further includes patterning the backside oxide layer, etching the silicon handle wafer using the patterned backside oxide layer, removing the buried oxide layer, and removing remaining portions of the patterned chrome etch mask layer and the patterning layer.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: July 19, 2022
    Assignee: Magic Leap, Inc.
    Inventors: Shuqiang Yang, Vikramjit Singh, Kang Luo, Nai-Wen Pi, Frank Y. Xu
  • Patent number: 11390805
    Abstract: An etching composition and a method of manufacturing a semiconductor device, the composition including 5 wt % to 30 wt % of an oxidizing agent, based on a total weight of the etching composition; a salt including an anion including a carboxylate moiety having 1 to 5 carbon atoms, and an ammonium cation; and a chelating agent including a phosphonic acid having 1 to 8 carbon atoms.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: July 19, 2022
    Assignees: SAMSUNG ELECTRONICS CO., LTD., Soulbrain Co., Ltd.
    Inventors: Jae Sung Lee, Jung Hun Lim, Mihyun Park, Changsu Jeon, Jung-Min Oh, Subin Oh, Hyosan Lee
  • Patent number: 11387109
    Abstract: A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: July 12, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Che-Lun Chang, Pin-Chuan Su, Hsin-Chieh Huang, Ming-Yuan Wu, Tzu kai Lin, Yu-Wen Wang, Che-Yuan Hsu, deseased
  • Patent number: 11383328
    Abstract: A method for manufacturing a peeled substrate has a laser condensing step for focusing laser light at a prescribed depth from the surface of a substrate and a positioning step for moving and positioning a laser condenser relative to the substrate, the method involving forming a processed layer in the substrate. The laser condensing step includes a laser light adjustment step in which a diffraction optical element is used to branch the laser light into a plurality of branched laser beams, and at least one of the branched laser beams is branched such that the intensity thereof differs from the other branched laser beams. The processed layer is elongated using the branched laser beam having a relatively high intensity among the plurality of branched laser beams to process the substrate, and the elongation of the processed layer is restrained using the branched laser beams having a relatively low intensity.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: July 12, 2022
    Assignees: SHIN-ETSU POLYMER CO., LTD., NATIONAL UNIVERSITY CORPORATION SAITAMA UNIVERSITY
    Inventors: Junichi Ikeno, Yohei Yamada, Hideki Suzuki, Rika Matsuo
  • Patent number: 11377745
    Abstract: Method for stripping a coating from a coated surface of a substrate, wherein the coating is stripped in an aqueous alkaline solution, characterized in that the method comprises following steps:—preparing the coated substrate to be decoated by providing the substrate with a strippable coating by depositing a coating comprising one or more layers, wherein one layer comprising aluminum is deposited directly on the substrate surface to be decoated and—introducting the substrate to be decoated in the aqueous alkaline solution, thereby conducting a chemical stripping of the coating from the substrate, whereas the aqueous alkaline solution comprises NaOH in a concentration in weight percentage from 30 wt. % to 50 wt. %.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: July 5, 2022
    Assignee: Oerlikon Surface Solutions AG, Pfäffikon
    Inventors: Anders Olof Eriksson, Sebastian Benedikt, Vadim Schott
  • Patent number: 11373878
    Abstract: A technique for semiconductor manufacturing is provided. The technique includes the operations as follows. A semiconductor structure having a first material and a second material is revived. The first material has a first incubation time to a first etching chemistry. The second material has a second incubation time to the first etching chemistry. The first incubation time is shorter than the second incubation time. A first main etch to the semiconductor structure for a first duration by the first etching chemistry is performed. The first duration is greater than the first incubation time and shorter than the second incubation time.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: June 28, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Han-Yu Lin, Li-Te Lin, Tze-Chung Lin, Fang-Wei Lee, Yi-Lun Chen, Jung-Hao Chang, Yi-Chen Lo, Fo-Ju Lin, Kenichi Sano, Pinyen Lin
  • Patent number: 11367617
    Abstract: A patterning stack and methods are provided for semiconductor processing. The method includes forming a graded hardmask, the graded hardmask including a first material and a second material with extreme ultraviolet (EUV) absorption cross sections for absorption of EUV wavelengths, the second material configured to provide adhesion to photoresist materials. The method also includes depositing a photoresist layer over the graded hardmask. The method additionally includes patterning the photoresist layer. The method further includes etching the graded hardmask. The method also includes removing the photoresist layer.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: June 21, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jennifer Church, Ekmini A. De Silva, Dario Goldfarb
  • Patent number: 11361971
    Abstract: In some methods, a first recess is etched in a selected region of a substrate. A first polymer liner is formed on sidewalls and a bottom surface of the first recess. A portion of the first polymer liner is removed from the bottom surface, and a remaining portion of the first polymer liner is left along the sidewalls. The first recess is deepened to establish a second recess while the remaining portion of the first polymer liner is left along the sidewalls. A first oxide liner is formed along the sidewalls and along sidewalls and a bottom surface of the second recess. A portion of the first oxide liner is removed from a bottom surface of the second recess, while a remaining portion of the first oxide liner is left on the sidewalls of the first recess and the sidewalls of the second recess.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: June 14, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hsing Chang, Ming Chyi Liu, Shih-Chang Liu
  • Patent number: 11359114
    Abstract: A polishing method includes polishing a substrate with a CMP polishing liquid. The substrate includes a barrier metal, a metal film, and a silicon dioxide film. The metal film includes one or more of copper, copper alloy, copper oxide, or copper alloy oxide. The CMP polishing liquid includes abrasive particles, a metal oxide dissolving agent, an oxidizing agent, a water-soluble polymer, and an alkali metal ion. The pH of the CMP polishing liquid is 7.0 to 11.0. Surface potentials of the abrasive particles and the metal film have the same sign and a product of the surface potential (mV) of the abrasive particles and the surface potential (mV) of the metal film is 300 to 980 mV2 upon polishing the substrate with the CMP polishing liquid.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: June 14, 2022
    Assignee: SHOWA DENKO MATERIALS CO., LTD.
    Inventors: Keisuke Inoue, Shunsuke Kondo, Yuya Otsuka
  • Patent number: 11355351
    Abstract: A semiconductor device and its fabrication method are provided. The method includes providing a layer to be etched; forming a first mask layer on the layer to be etched; forming a first trench and a second trench in the first mask layer; forming a blocking layer over the first mask layer, where a portion of the blocking layer is formed in a first portion of the first trench and a first portion of the second trench; forming a first dividing layer in a first blocking opening to divide the first trench along a first direction; when forming the first dividing layer, forming second dividing layers on two sidewalls of a second blocking opening and arranged along the first direction, where the second dividing layers divide the second trench along the first direction; and after forming the first dividing layer and the second dividing layers, removing the blocking layer.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: June 7, 2022
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Jisong Jin, Yanhua Wu, Junling Pang
  • Patent number: 11342167
    Abstract: A time period for cleaning performed to remove a deposit formed within a chamber main body can be reduced. A plasma processing method including the cleaning of an inside of the chamber main body of a plasma processing apparatus is provided. The method includes etching including a main etching of etching an etching target film of a processing target object placed on a stage in a low temperature by generating plasma of a processing gas containing a fluorocarbon gas and/or a hydrofluorocarbon gas; carrying-out the processing target object from a chamber; and cleaning the inside of the chamber main body by generating plasma of a cleaning gas in a state that a temperature of an electrostatic chuck is set to be high.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: May 24, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Jin Kudo, Taku Gohira
  • Patent number: 11340489
    Abstract: The present application discloses a manufacturing method of a display panel and a display panel. The manufacturing method includes the steps: forming a color filter layer on a substrate; confirming a color filter-to-be-stripped in the color filter layer; and stripping the color filter-to-be-stripped by using a selected stripping liquid; the color filter layer includes a first color filter, a second color filter and a third color filter; and the color filter-to-be-stripped includes one or two of the first color filter, the second color filter and the third color filter, and the method of stripping the color filter-to-be-stripped by the selected stripping liquid includes: letting the color filter-to-be-stripped react with the selected stripping liquid, and stripping the color filter-to-be-stripped by the selected stripping liquid, and forming a protective layer on the surface of the color filters except the color filter-to-be-stripped.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: May 24, 2022
    Assignees: HKC CORPORATION LIMITED, CHONGQING HKC OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Chung-Kuang Chien
  • Patent number: 11335568
    Abstract: A method for forming a semiconductor structure is provided. The method includes: forming first and second hard mask layers and a target layer on a substrate; patterning the second hard mask layer to form patterned second hard masks including a second wide mask and second narrow masks; and forming spacers on sidewalls of the second wide mask and the second narrow masks. Then, a photoresist layer is formed to cover the second wide mask and the spacers on the sidewalls of the second wide mask. The second narrow masks and the photoresist layer are removed. And, the first hard mask layer is etched with the spacers and the second wide mask together as a mask to form patterned first hard masks on the target layer, wherein the spacers define a first line width, and the second wide mask and the pair of spacers define a second line width.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: May 17, 2022
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Ting-Wei Wu, Cheng-Ta Yang, Hsin-Hung Chou
  • Patent number: 11328934
    Abstract: Provided is an etching method performed in a substrate-processing apparatus having: a first electrode on which a substrate is placed; and a second electrode facing the first electrode, the method comprising: a first step for introducing a first gas and halfway etching a target film into a pattern of a predetermined film on the target film formed on the substrate; a second step for introducing a second gas including Ar gas, H2 gas, and deposition gas and applying DC voltage to the second electrode to form a protective film, the second step being performed after the first step; and a third step for introducing a third gas and etching the target film, the third step being performed after the step for forming the protective film.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: May 10, 2022
    Assignee: Tokyo Electron Limited
    Inventors: Sho Oikawa, Wakako Ishida
  • Patent number: 11328931
    Abstract: In a method of manufacturing a semiconductor device, a mask pattern is formed over a target layer to be etched, and the target layer is etched by using the mask pattern as an etching mask. The etching is performed by using an electron cyclotron resonance (ECR) plasma etching apparatus, the ECR plasma etching apparatus includes one or more coils, and a plasma condition of the ECR plasma etching is changed during the etching the target layer by changing an input current to the one or more coils.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: May 10, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: En-Ping Lin, Yu-Ling Ko, I-Chung Wang, Yi-Jen Chen, Sheng-Kai Jou, Chih-Teng Liao
  • Patent number: 11319460
    Abstract: Provided is a polishing composition that can effectively improve a polishing removal rate. According to the present invention, a polishing composition for polishing a polishing target material is provided. The polishing composition contains water, an oxidant, and a polishing removal accelerator, and does not contain abrasive. At least one metal salt selected from the group consisting of an alkali metal salt and an alkaline earth metal salt is contained as the polishing removal accelerator.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: May 3, 2022
    Assignee: FUJIMI INCORPORATED
    Inventors: Yasuaki Ito, Hiroyuki Oda, Naoto Noguchi
  • Patent number: 11316103
    Abstract: A process flow for forming magnetic tunnel junction (MTJ) nanopillars with minimal sidewall residue and minimal sidewall damage is disclosed wherein a pattern is first formed in a hard mask that is an uppermost MTJ layer. Thereafter, the hard mask sidewall is etch transferred through the remaining MTJ layers including a reference layer, free layer, and tunnel barrier between the free layer and reference layer. The etch transfer may be completed in a single RIE step that features a physical component involving inert gas ions or plasma, and a chemical component comprised of ions or plasma generated from one or more of methanol, ethanol, ammonia, and CO. In other embodiments, a chemical treatment with one of the aforementioned chemicals, and a volatilization at 50° C. to 450° C. may follow an etch transfer through the MTJ stack with an ion beam etch or plasma etch involving inert gas ions.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: April 26, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Dongna Shen, Yu-Jen Wang, Ru-Ying Tong, Vignesh Sundar, Sahil Patel
  • Patent number: 11292289
    Abstract: A method of manufacturing a floor board comprises the steps of supplying a panel, printing a curable substance or surface removing substance onto the panel in a predefined pattern for creating an elevation on the panel at the pattern or removing a portion of the surface of the panel at the pattern, respectively, and curing the curable substance or removing any reaction products of the surface removing substance and the panel.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: April 5, 2022
    Assignee: FLOORING INDUSTRIES LIMITED, SARL
    Inventor: Bruno Vermeulen
  • Patent number: 11282718
    Abstract: A substrate processing apparatus includes a chamber body having an upper opening, a chamber lid part having a lower opening, and a shield plate arranged in a lid internal space of the chamber lid part. The radial dimension of the shield plate is greater than that of the lower opening. Covering the upper opening of the chamber body with the chamber lid part forms a chamber that internally houses a substrate. In the substrate processing apparatus, before the substrate is conveyed and the chamber is formed, the lid internal space of the chamber lid part is filled with the gas supplied from a gas supply part, in a state in which the shield plate overlaps with the lower opening. This allows the chamber to be quickly filled with the gas to achieve a desired low oxygen atmosphere after the formation of the chamber.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: March 22, 2022
    Inventor: Takeshi Yoshida
  • Patent number: 11280005
    Abstract: The invention relates to producing a relief image on a metal base. The present method includes forming a resist pattern on a surface of a base and etching the sections of the metal which are not covered by the resist. In the present method, copper or an alloy thereof is deposited as a resist on a metal base having an electrode potential that is more negative than the electrode potential of copper, and etching is carried out in a solution that dissolves the parts not covered by the resist primarily as a result of a contact exchange reaction between the metal of the base and the copper ions. The invention makes it possible to improve the quality of the resulting image by means of reducing etchback of a metal base via pores of a resist, and to reduce the cost of producing products.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: March 22, 2022
    Inventor: Sergey Gennadievich Kaplunov