Abstract: A clock forwarding circuit automatically detects the delay in transmission of data between a master circuit such as a central processing unit and a slave circuit such as a semiconductor memory and forwards clocks corresponding to the delay. The master circuit includes a clock forwarding circuit which generates a clock signal. The slave circuit is coupled to the master circuit and generates a second clock signal which is synchronized with the first clock signal. The clock forwarding circuit receives the second clock signal, detects delay between the first and second clock signals and sets initial data load/unload parameters of the master circuit based on the detected delay. By forwarding clocks, the data transmission between the clocked circuits can be performed in faultless fashion independently of the delay.

Abstract: An analog bias current optimization circuitry in a transceiver of a data communication system is capable of controlling the amount of a bias current of each of analog circuits. The analog bias current optimization circuitry generates a signal pattern which is sent to the analog circuits, such as TX-D/A converter, driver, RX-A/D converter, etc., and evaluates the signal quality of the analog circuits. Based on the evaluated signal quality, a bias current to each of the analog circuits is adjusted. A margin may be added to the bias current to ensure the signal quality in case there is a change in power supply voltage and/or temperature. One method of evaluating the signal quality of the analog circuits is to evaluate the residual echo of the output of an echo canceller (EC). Another method is to evaluate a signal error in a decision feedback equalizer (DFE). A further method is to evaluate a harmonic distortion at the output of a filter.

Abstract: A digital receiver for receiving an analog host signal with one or more digital sidebands includes a bandreject filter arranged at least in part in an intermediate frequency (IF) processing stage of the receiver. In an illustrative embodiment, first and second digital sidebands are transmitted on either side of a frequency modulated (FM) analog host signal in a hybrid in-band on-channel (HIBOC) digital audio broadcasting (DAB) system. The received composite signal is filtered in the IF processing stage of the receiver by the bandreject filter in order to substantially attenuate the analog host signal while passing the digital sidebands. The bandreject filter may be arranged in the IF processing stage so as to filter the analog host signal from the composite signal at a point prior to an input of an automatic gain control (AGC) circuit, such that the AGC operating point is determined primarily by the digital sidebands.

Abstract: A phase-locked loop circuit for providing a tightly controlled capture range for locking an output signal to a data signal, while also providing a wide frequency capture range for initially pulling the output signal within this narrow, predetermined frequency range. The apparatus detects a frequency difference between at least one reference signal and an output signal, and generates a frequency error signal in response to the frequency difference. A phase difference is detected between a received input signal and the output signal, and a phase error signal is generated in response to the phase difference. The frequency error signal and the phase error signal are combined to control the frequency of the output signal by controlling an input-controlled oscillator.

Abstract: Disclosed is a frequency-locked loop (FLL), which attempts to bring about frequency and phase synchronization between two signals over the control bandwidth of the loop: a reference signal and a voltage-controlled oscillator (VCO) signal. For example, the FLL employs a reference signal generated by a crystal oscillator of frequency fREF and a VCO signal generated by the oscillations of an unquenched SRG resonator with tunable resonant frequency fRES. These signals are connected to the inputs of a phase/frequency detector (PFD) which produces output pulses in response to the relationship between fREF and fRES. These pulses are applied to a loop filter (LF) which creates a voltage using some kind of charge-storage element. This loop filter voltage is a so-called error voltage whose value is used to control the frequency of the resonator to bring the reference signal and VCO signal into phase synchrony.

Abstract: A method includes receiving a transmitted signal and generating an orthogonal despreading code that is different than the code used to spread the transmitted signal. The method then despreads the received signal using the orthogonal despreading code. By using a code to despread the received signal that is different than the code used to spread the signal, the overall interference in the system (100) can be reduced.

Abstract: A system (101-139) receives a transmitted optical signal and generates an orthogonal despreading code that is different than the code used to spread the transmitted signal. The system (101-139) then despreads the received signal using the despreading code. By using a code to despread the received signal that is different than the code used to spread the signal, the overall interference in the system can be reduced and even eliminated.

Abstract: An amplitude calculation circuit is capable of permits accurate calculation of an amplitude with quite small circuit scale and power consumption. The amplitude calculation circuit converts input I (in-phase component) and Q(quadrature-phase component) base band signal in first and second absolute value circuits into an input vector Vin,0. A first phase rotation circuit (R0) rotates the input vector Vin,0 in clockwise direction for an angle &thgr;0=45° and multiply the amplitude for 1/cos (&thgr;0) times to output an output vector Vout,0. By deriving an absolute value of the output vector Vout,0 by a third absolute value circuit, a vector Vin,1 symmetric to an X-axis is established. Subsequently, the foregoing operation is repeated by the second to fifth phase rotation circuits and fourth to sixth absolute value circuits.

Abstract: A system and method for transmitting digital information through a medium such as atmospheric free-space includes a transmitter which generates a signal based on a basis set of mutually orthogonal, spectrally-shaped, sequences of substantially equal length and having predetermined autocorrelation values. The sequences may resemble noise in at least some of their characteristics. The orthogonality or cross-correlation characteristics, the autocorrelation characteristics and the resemblance to noise are due to features derived from sequences of pseudo-random numbers which themselves resemble noise in at least some of their characteristics. The waveform set based on the sequences is modulated digitally. The modulated set may be summed together along with a wideband reference signal of reduced amplitude and optionally an FM analog signal to form a composite signal which is broadcast typically through free space to at least one receiver.

Abstract: A receiver having a digital automatic gain control (AGC) circuit is disclosed for use in a cellular communication system, including a Hierarchical Cellular System. The receiver includes a controller which switches between gain control values depending on system operational mode. In this way, the AGC can be optimized for different types of receive processing operations, e.g., traffic reception and measurement of other channels.

Abstract: A Code Division Multiple Access system and method of operation provides reduced interference for received signals and improved signal acquisition and processing with reduced computational complexity. The system includes a base station coupled to an antenna array of at least two or more antennas and serving a plurality of users. A receiver in the base station includes a universal inverse cross-correlation matrix coupled to the antenna array, a signal acquisition and a signal processing circuit serving each user. Each signal acquisition circuit comprises a series of delay stages in which the incoming antenna signals in each stage are correlated with a spreading code and combined in a multiplier coupled to the universal inverse cross-correlation matrix which facilitates improved time delay estimation for signal acquisition.

Abstract: The invention relates to a wireless network which includes at least one base station (1 to 3) and a plurality of associated terminals (4 to 14) for the exchange of useful data and control data. According to the invention, the base station (1 to 3) is arranged to transmit the starting instant of a signaling sequence to at least one terminal (4 to 14). In order to evaluate the signaling sequences transmitted by the terminals, the base station (1 to 3) includes a device (21, 22) for correlating a received signaling sequence and for detecting the pulse arising from a received and correlated signaling sequence.

Abstract: The present invention discloses a device and method for eliminating an interfering wave and determining the best orientation for an antenna. A SAW (surface acoustic wave) filter employed in the invention eliminates an interfering wave (a ground analog broadcasting wave) and extracts a video-signal element of a specified channel (a bandwidth of 6 MHz) from an input intermediate-frequency signal so as to output to an A/D converter. The arrangement of the filter, which is a band pass filter having a comb-shaped attenuation characteristic, is such that the first peak of attenuation is made to coincide with the peak of an interfering signal; the A/D converter produces an AGC feedback signal to output to a high-frequency amplifier, an intermediate-frequency amplifier, and an operation unit, respectively; a waveform equalization unit eliminates a ghost image generated due to multi-path interference from the input signal by using an equalizing method such as a learning equalization, a blind equalization, etc.

Abstract: Techniques to test a wireless communication link. A traffic channel is tested via a test data service option (TDSO) that may be negotiated and connected similar to other services. Test parameters values may be proposed, accepted or rejected, and negotiated. Test data for a channel is generated based on a defined data pattern or a pseudo-random number generator. Sufficient test data may be generated based on the generator for a test interval, stored to a buffer, and thereafter retrieved from a particular section of the buffer to form data block(s) for each “active” frame. The traffic channel may be tested using discontinuous transmission. A two-state Markov chain determines whether or not to transmit test data for each frame. The average frame activity and average burst length are defined by selecting the probabilities for transitioning between the ON/OFF states of the Markov chain, which may be driven by a second generator.

Abstract: A multi-rate data modulation circuit includes a multi-rate data conversion circuit and a modulator such as a direct digital synthesis circuit. The multi-rate data conversion circuit receives digital data at varying data rates, receives a data rate input corresponding to the digital data and converts the digital data to a converted output based upon the data rate input. The direct digital synthesis circuit receives the converted output and synthesizes a modulated output signal based upon the converted output. The multi-rate data conversion circuit may include a multi-rate converter, a multi-rate digital data filter, an output scaler and an adder. The multi-rate converter receives the digital data, the data rate input and a clock signal and converts the digital data to converted digital data. The multi-rate digital data filter receives the converted digital data and produces a filtered digital output. The output scaler receives the filtered digital output and produces a scaled and filtered digital output.

Abstract: In applications employing phase-shift keying modulation, a phase rotator as disclosed herein is used to rotate the constellation of signal vectors before carrier modulation in order to maximize modulator output power. Such a rotator may be applied in the digital domain (to complex signals having either binary-valued or multi-valued components) or in the analog domain.

Abstract: A narrow bandwidth signal, such as a narrowband FM signal, is modulated in a modulator that modulates a wide bandwidth signal, such as a CDMA signal, by oversampling the narrow bandwidth signal and applying the oversampled narrow bandwidth signal to the modulator. By oversampling the narrow bandwidth signal, the same fixed low pass filter can be used for both the wide bandwidth signal and the oversampled narrow bandwidth signal. Accordingly, different low pass filters or switched low pass filters are not needed. The DC offset that is introduced by the digital-to-analog converter and/or the low pass filter of the modulator is compensated, preferably in the digital domain, to thereby reduce DC offset within acceptable limits for the modulation that is being used. More preferably, compensation is provided by subtracting from the sampled signal, a digital value representing the DC offset in the filtered analog signal that is introduced by the digital-to-analog converter and/or the low pass filter.

Abstract: A radio transmission system including many radio transmitters using frequency hopping carriers to intermittently transmit very short messages indicative of status of sensors associated with the transmitters. In operation, a time interval generator included in a transmitter generates pulses activating the transmitter at time intervals according to a predetermined algorithm. When activated, the transmitter transmits a message at one or several different frequencies. The frequencies are changed according to a predetermined algorithm and preferably differ for each subsequent transmission. Alternatively, when an abnormal sensor status is detected, the transmitter transmits repeated messages at a plurality of predetermined alarm frequencies for a predetermined time regardless of the time interval generator.

Abstract: A jitter suppression apparatus in a data transmission system includes a phase detector circuit to determine a plurality of phase errors between sync pulses of a data line and sync pulses of a reference line, and an adapted phase error offset circuit, coupled to the phase detector circuit, to generate a plurality of phase error offsets and adaptively offset the plurality of phase error offsets. The jitter suppression apparatus may also include a stuff/delete slicer, coupled to the adapted phase error offset circuit, to generate a plurality of stuff/delete signals such that a framer can determine what type of data frames to send to a communication channel of the data transmission system. A jitter suppression method includes steps of detecting a phase error, computing a phase error offset, and filtering out the phase error offset. An integrator may be used to filter out the phase error offset input to the stuff/delete slicer.

Abstract: Method and system for carrier recovery and estimation of Doppler shift from a signal source that is moving relative to a signal receiver. A pure carrier preamble for the received signal is processed through each of two stages of a linear predictor to obtain a successively more accurate estimation of a Doppler frequency offset for the carrier. The received signal is downconverted by each stage estimation of the Doppler frequency offset, and the downconverted signal is processed through a decision feedback phase locked loop to provide a signal in which substantially all of the Doppler offset and/or phase angle are identified and removed. The system has low complexity, is fast, and is accurate to within an estimated few tens of Hertz and will work with signals having relatively low signal-to-noise ratios. The invention is useful for receipt of signals from satellites in low earth orbits (LEOs) and other non-geosynchronous orbits, and wherever a transmitter and receiver are moving relative to each other.