Patents Examined by Anita K Alanko
  • Patent number: 10460926
    Abstract: A method for processing a semiconductor wafer is provided. The method includes transferring the semiconductor wafer from an interface tool to a Chemical Mechanical Polishing (CMP) tool. The method further includes polishing the semiconductor wafer with the CMP tool. The method also includes transferring the semiconductor wafer back to the interface tool from the CMP tool. In addition, the method includes converting a mixture to a mist spray and discharging the mist spray over the semiconductor wafer in the interface tool after the semiconductor wafer is polished by the CMP tool.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: October 29, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-I Peng, Hsiu-Ming Yeh, Yi-Chang Liu
  • Patent number: 10446453
    Abstract: A method is disclosed for monitoring and controlling a process of plasma-assisted surface modification of a layer formed on a substrate. The method includes flowing a surface modification gas into a plasma processing chamber of a plasma processing system, igniting a plasma in the plasma processing chamber to initiate a surface modification process for a layer formed on a substrate, and acquiring optical emission spectra from an optical emission spectroscopy system attached to the plasma processing chamber, during the surface modification process for the layer. For one embodiment, the method includes altering at least one parameter of the surface modification process based on the acquired optical emission spectra. For one embodiment, the acquired optical emission spectra can include an intensity of a spectral line, a slope of a spectral line, or both to enable endpoint control of the surface modification process. Additional methods and related systems are also disclosed.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: October 15, 2019
    Assignee: Tokyo Electron Limited
    Inventors: Brian J. Coppa, Viswas Purohit, Seiichi Watanabe, Kenji Komatsu
  • Patent number: 10438810
    Abstract: Example embodiments relate to a method of forming a photoresist pattern and a method of fabricating a semiconductor device using the same. The method of fabricating a semiconductor device comprises forming a mask layer on a substrate, forming a photoresist pattern on the mask layer, the photoresist pattern having pattern portions at a first height and recess portions, applying a first liquid onto the photoresist pattern, filling the recess portions with a pattern filler at a second height, the pattern filler having an higher etch rate than the etch rate of the pattern portions to the same etchant, removing the first liquid, etching the pattern filler after removing the first liquid, etching the mask layer via the photoresist pattern to form a mask pattern, and etching the substrate via the mask pattern to form a fine pattern.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: October 8, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cha-Won Koh, Cheol-Hong Park, Hyun-Woo Kim, Jin-Kyu Han
  • Patent number: 10410914
    Abstract: A method of forming at least one lithography feature, the method including: providing at least one lithography recess on a substrate, the or each lithography recess having at least one side-wall and a base, with the at least one side-wall having a width between portions thereof; providing a self-assemblable block copolymer having first and second blocks in the or each lithography recess; causing the self-assemblable block copolymer to self-assemble into an ordered layer within the or each lithography recess, the ordered layer including at least a first domain of first blocks and a second domain of second blocks; causing the self-assemblable block copolymer to cross-link in a directional manner; and selectively removing the first domain to form lithography features of the second domain within the or each lithography recess.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: September 10, 2019
    Assignee: ASML Netherlands B.V.
    Inventors: Sander Frederik Wuister, Andre Bernardus Jeunink, Emiel Peeters
  • Patent number: 10410878
    Abstract: A method for using a hydrofluorocarbon etching compound selected from the group consisting of 2,2,2-Trifluoroethanamine (C2H4F3N), 1,1,2-Trifluoroethan-1-amine (Iso-C2H4F3N), 2,2,3,3,3-Pentafluoropropylamine (C3H4F5N), 1,1,1,3,3-Pentafluoro-2-Propanamine (Iso-C3H4F5N), 1,1,1,3,3-Pentafluoro-(2R)-2-Propanamine (Iso-2R—C3H4F5N) and 1,1,1,3,3-Pentafluoro-(2S)-2-Propanamine (Iso-2S—C3H4F5N), 1,1,1,3,3,3-Hexafluoroisopropylamine (C3H3F6N) and 1,1,2,3,3,3-Hexafluoro-1-Propanamine (Iso-C3H3F6N) to selectively plasma etching silicon containing films, such as a dielectric antireflective coat (DARC) layer (e.g., SiON), alternating SiO/SiN layers, alternating SiO/p-Si layers, versus a photoresist layer and/or a hard mask layer (e.g., amorphous carbon layer), wherein the photoresist layer is reinforced and SiO/SiN and/or SiO/p-Si are etched non-selectively.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: September 10, 2019
    Assignees: American Air Liquide, Inc., Air Liquide Electronics US. LP, L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude
    Inventors: Hui Sun, Fabrizio Marchegiani, James Royer, Nathan Stafford, Rahul Gupta
  • Patent number: 10410873
    Abstract: A method of etching a substrate is described. The method includes disposing a substrate having a surface exposing a first material and a second material in a processing space of a plasma processing system, and performing a modulated plasma etching process to selectively remove the first material at a rate greater than removing the second material. The modulated plasma etching process comprises a power modulation cycle having sequential power application steps that includes: applying a radio frequency (RF) signal to the plasma processing system at a first power level, applying the RF signal to the plasma processing system at a second power level, and applying the RF signal to the plasma processing system at a third power level. Thereafter, the power modulation cycle is repeated at least one more cycle, wherein each modulation cycle includes a modulation time period.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: September 10, 2019
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hiroto Ohtake, Takuya Mori
  • Patent number: 10400127
    Abstract: Methods of preparing porous wood products for painting or finishing are described. The methods comprise applying to a porous wood product a UV-curable coating and curing by UV light the top UV curable coating to 70% to 95% cure, preferably 85% to 95% for spray-applied top UV curable coatings to produce a partially cured porous wood product. The methods typically further include the step of sanding the surface of the partially cured porous wood product and painting or staining, for example with a water-based or solvent-based stain or paint.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: September 3, 2019
    Assignee: Pressing Developments, L.L.C.
    Inventor: Adam Fuhr
  • Patent number: 10390441
    Abstract: This invention provides methods for processing of platinum metallized high temperature co-fired ceramic (HTCC) components with minimum deleterious reaction between platinum and the glass constituents of the ceramic-glass body. The process comprises co-firing a multilayer laminate green ceramic-glass body with via structures filled with a platinum powder-based material in a reducing atmosphere with a specified level of oxygen partial pressure. The oxygen partial pressure should be maintained above a minimum threshold value for a given temperature level.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: August 20, 2019
    Assignee: Second Sight Medical Products, Inc.
    Inventors: Jerry Ok, Honggang Jiang
  • Patent number: 10332687
    Abstract: A tunable capacitor that incorporates teachings of the subject disclosure may include: a substrate; a first dielectric layer over the substrate; a plurality of bias lines encapsulated between the substrate and the tunable dielectric layer; a first metal layer over the tunable dielectric layer (wherein the first metal layer has a plurality of first gaps); an upper bias layer over the first metal layer (herein each of a plurality of portions of the upper bias layer extend through a respective one of the plurality of first gaps to come into contact with the first dielectric layer, and wherein at least a second gap is disposed in the upper bias layer); and a second metal layer (wherein a portion of the second metal layer extends through the second gap to come into contact with the first metal layer). Other embodiments are disclosed.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: June 25, 2019
    Assignee: BlackBerry Limited
    Inventors: Marina Zelner, Andrew Vladimir Claude Cervin
  • Patent number: 10330941
    Abstract: A method for production of window elements which can be soldered into a housing in a hermetically tight manner with optical coating and free-form window elements are disclosed. After application of optical coatings, a protective layer is applied to the optical coating, the two layer systems are selectively removed by means of a machining beam of high-energy radiation for the purpose of ablation of a desired optically active free-form surface for window elements with any geometric shape through a localized machining beam in edge regions of the optically active free-form surface such that the protective layer remains on the optical coating as lift-off mask which is lifted off after applying a metallization for a solder layer by an etching process that acts selectively only on the protective layer but not on the optical coating, and the metallization remains only on the peripheral edge regions circumscribing the free-form surfaces.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: June 25, 2019
    Assignee: JENOPTIK Optical Systems GmbH
    Inventors: Elvira Gittler, Steffen Biermann, Wolfgang Brode, Falko Stoerzner
  • Patent number: 10316218
    Abstract: The present invention provides aqueous CMP polishing compositions comprising a from 0.5 to 30 wt. %, based on the total weight of the composition of a dispersion of a plurality of elongated, bent or nodular silica particles which contain a cationic nitrogen atom, and from 0.001 to 0.5 wt. %, preferably from 10 to 500 ppm, of a cationic copolymer of a diallylamine salt having a cationic amine group, such as a diallylammonium halide, or a diallylalkylamine salt having a cationic amine group, such as a diallylalkylammonium salt, or mixtures of the copolymers, wherein the compositions have a pH of from 1 to 4.5. Preferably, the cationic copolymer of a diallylamine salt having a cationic amine group comprises a copolymer of diallylammonium chloride and sulfur dioxide and the copolymer of the diallylalkylamine salt having a cationic amine group comprises a copolymer of diallylmonomethylammonium halide, e.g. chloride, and sulfur dioxide.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: June 11, 2019
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Naresh Kumar Penta, Julia Kozhukh, David Mosley, Kancharla-Arun K. Reddy, Matthew Van Hanehem
  • Patent number: 10316414
    Abstract: During a material removal method, a component is received that includes a component body and a coating on the component body. The component body includes metallic first material. The coating includes second material that is different from the first material. A solution is received that includes nitric acid and hydrogen peroxide. At least a portion of the coating is subjected to the solution in order to remove at least some of the second material from the component.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: June 11, 2019
    Assignee: United Technologies Corporation
    Inventors: Zhongfen Ding, Mark R. Jaworowski
  • Patent number: 10297450
    Abstract: Provided is a manufacturing method for manufacturing a SiC substrate having a flattened surface, including etching the surface of the SiC substrate by irradiating the surface of the SiC substrate with atomic hydrogen while the SiC substrate having an off angle is heated. In the etching, the SiC substrate may be heated within a range of 800° C. or higher and 1200° C. or lower.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: May 21, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takeshi Fujii, Mariko Sato, Takuro Inamoto
  • Patent number: 10297496
    Abstract: In a method for processing a target object including a conductive layer and an insulating film formed on the conductive layer, the insulating film is etched by plasma treatment of a fluorine-containing gas to form an opening in the insulating film. A barrier film is formed to cover a surface of the insulating film and a surface of the conductive layer which is exposed through the opening formed in the insulating film. The target object having the barrier film is placed in an atmospheric environment, and the barrier film is removed from the target object by isotropically etching the barrier film. The target object is maintained in a depressurized environment from start of etching the insulating film to end of forming the barrier film. The barrier film is conformally formed on the surfaces of the insulating film and the conductive layer exposed through the opening formed in the insulating film.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: May 21, 2019
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yasutaka Hama, Seiji Yokoyama
  • Patent number: 10292384
    Abstract: The method comprises contacting a silicon substrate with a silver salt and an acid for a time effective to produce spikes having a first end disposed on the silicon substrate and a second end extending away from the silicon substrate. The spikes have a second end diameter of about 10 nm to about 200 nm, a height of about 100 nm to 10 micrometers, and a density of about 10 to 100 per square microns. The nanostructures provide antimicrobial properties and can be transferred to the surface of various materials such as polymers.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: May 21, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stacey M. Gifford, Huan Hu, Pablo M. Rojas, Gustavo A. Stolovitzky
  • Patent number: 10293436
    Abstract: Forming holes in a material includes focusing a pulsed laser beam into a laser beam focal line oriented along the beam propagation direction and directed into the material, the laser beam focal line generating an induced absorption within the material, the induced absorption producing a defect line along the laser beam focal line within the material, and translating the material and the laser beam relative to each other, thereby forming a plurality of defect lines in the material, and etching the material in an acid solution to produce holes greater than 1 micron in diameter by enlarging the defect lines in the material. A glass article includes a stack of glass substrates with formed holes of 1-100 micron diameter extending through the stack.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: May 21, 2019
    Assignee: Corning Incorporated
    Inventors: Sasha Marjanovic, Garrett Andrew Piech, Shyamala Shanmugam, Sergio Tsuda, Robert Stephen Wagner
  • Patent number: 10272647
    Abstract: Described herein are methods for improved transfer of graphene from formation substrates to target substrates. In particular, the methods described herein are useful in the transfer of high-quality chemical vapor deposition-grown monolayers of graphene from metal, e.g., copper, formation substrates via non-polymeric methods. The improved processes provide graphene materials with less defects in the structure.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: April 30, 2019
    Assignee: Corning Incorporated
    Inventors: Benedict Yorke Johnson, Prantik Mazumder, Kamal Kishore Soni
  • Patent number: 10269559
    Abstract: Methods and apparatuses for depositing material into high aspect ratio features, features in a multi-laminate stack, features having positively sloped sidewalls, features having negatively sloped sidewalls, features having a re-entrant profile, and/or features having sidewall topography are described herein. Methods involve depositing a first amount of material, such as a dielectric (e.g., silicon oxide), into a feature and forming a sacrificial helmet on the field surface of the substrate, etching some of the first amount of the material to open the feature opening and/or smoothen sidewalls of the feature, and depositing a second amount of material to fill the feature. The sacrificial helmet may be the same as or different material from the first amount of material deposited into the feature.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: April 23, 2019
    Assignee: Lam Research Corporation
    Inventors: Joseph Abel, Pulkit Agarwal, Richard Phillips, Purushottam Kumar, Adrien LaVoie
  • Patent number: 10246335
    Abstract: A method of modifying surfaces of diamond particles comprises forming spinodal alloy coatings over discrete diamond particles, thermally treating the spinodal alloy coatings to form modified coatings each independently exhibiting a reactive metal phase and a substantially non-reactive metal phase, and etching surfaces of the discrete diamond particles with at least one reactive metal of the reactive metal phase of the modified coatings. Diamond particles and earth-boring tools are also described.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: April 2, 2019
    Assignee: Baker Hughes, a GE company, LLC
    Inventors: Anthony A. DiGiovanni, Steven W. Webb, Marc W. Bird
  • Patent number: 10240239
    Abstract: This manufacturing method of a metal component enables precision processing of a corner portion, and the radius of curvature of a cog tip of a gear and the like can be made smaller than before. The manufacturing method of a metal component includes: (a) forming a mask film having, in plan view, a first side, a second side, and an extension portion that extends from a region between the first side and the second side on a metal film; and (b) forming a corner portion having, in plan view, a third side and a fourth side by etching the metal film.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: March 26, 2019
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Tomoyoshi Yamamura, Hiroyuki Sugawara, Satoru Nishimura