Abstract: A connector for non-cylindrical composite tubing and methods for making the same. The method may involve assembling a connector for a non-cylindrical composite tubing by loosely fastening a pair of bonding plates to an end plate; arranging the bonding plates in an inward configuration; applying an epoxy adhesive onto the outer faces of the bonding plates, inserting the bonding plates into the open end of the composite tubing, inserting the bonding plate fasteners through the through-holes of the composite tubing and tightly fastening the bonding plate fasteners into the bonding plates until the bonding plates engage against the inner surface of the composite tubing until the epoxy adhesive is uniformly distributed. The method may also include steps of removing the bonding plate screw fasteners and adding shims between each bonding plate and the inner surface of the composite tubing in order to maintain a predetermined thickness of the epoxy adhesive.

Abstract: In a method of treating a semiconductor substrate, a plurality of active regions and a plurality of trench isolation regions are formed by selectively etching the semiconductor substrate. The semiconductor substrate is washed by providing deionized water to the semiconductor substrate. A silicon-based solution is provided to the semiconductor substrate by replacing the deionized water disposed on the semiconductor substrate with the silicon-based solution. A silicon oxide material is formed from the silicon-based solution by performing a heat treatment on the silicon-based solution and the semiconductor substrate. The silicon oxide material fills the trench isolation regions.

Abstract: A method for forming semiconductor devices with spacers is provided. SiCO spacers are formed on sides of features. Protective coverings are formed over first parts of the SiCO spacers, wherein second parts of the sidewalls of the SiCO spacers are not covered by the protective coverings. A conversion process is provided to the second parts of the SiCO spacers which are not covered by the protective coverings, which changes a physical property of the second parts of the SiCO spacers which are not covered by the protective coverings, wherein the protective coverings protects the first parts of the SiCO spacers from the conversion process.

Abstract: Provided is a method of manufacturing a semiconductor device. The method of manufacturing a semiconductor device includes forming a target etching layer on a substrate, patterning the target etching layer to form a pattern layer including a pattern portion having a first height and a first width and a recess portion having a second width, providing a first gas and a second gas on the pattern layer, and performing a reaction process including reacting the first and second gases with a surface of the pattern portion by irradiating a laser beam on the pattern layer. The performing the reaction process includes removing a portion of sidewalls of the pattern portion so that the pattern portion has a third width that is smaller than the first width.

Abstract: In a plasma processing apparatus including a first radio-frequency power supply which supplies first radio-frequency power for generating plasma in a vacuum chamber, a second radio-frequency power supply which supplies second radio-frequency power to a sample stage on which a sample is mounted, and a matching box for the second radio-frequency power supply, the matching box samples information for performing matching during a sampling effective period which is from a point of time after elapse of a prescribed time from a beginning of on-state of the time-modulated second radio-frequency power until an and of the on-state and maintains a matching state attained during the sampling effective period from after the end of the on-state until a next sampling effective period.

Abstract: There is provided a method for manufacturing a ferroelectric thin film device including: a lower electrode film formation step of forming a lower electrode film on a substrate; a ferroelectric thin film formation step of forming a ferroelectric thin film made of a potassium sodium niobate on the lower electrode film; a ferroelectric thin film etching step of shaping the ferroelectric thin film into a desired micro-pattern by etching; and a thin film laminated substrate cleaning step of cleaning the substrate provided the ferroelectric thin film having a desired micro-pattern as a whole with a predetermined cleaning solution after the ferroelectric thin film etching step. The predetermined cleaning solution is a solution mixture containing hydrofluoric acid and ammonium fluoride, the hydrofluoric acid in the solution mixture having a molarity of 0.5 M or more and less than 5 M.

Abstract: The present disclosure relates to an etching solution capable of suppressing particle appearance including a first silane compound in which three or more hydrophilic functional groups are independently bonded to a silicon atom and a second silane compound in which one or two hydrophilic functional groups are independently bonded to a silicon atom.

Abstract: The present disclosure provides a method for forming patterns in a semiconductor device. In accordance with some embodiments, the method includes providing a substrate, a patterning-target layer over the substrate, and a hard mask layer over the patterning-target layer; forming a first pattern in the hard mask layer; removing a trim portion from the first pattern in the hard mask layer to form a trimmed first pattern; forming a first resist layer over the hard mask layer; forming a main pattern in the first resist layer; and etching the patterning-target layer using the main pattern and the trimmed first pattern as etching mask elements to form a final pattern in the patterning-target layer. In some embodiments, the final pattern includes the main pattern subtracting a first overlapping portion between the main pattern and the trimmed first pattern.

Abstract: Polishing slurries for polishing semiconductor substrates are disclosed. The polishing slurry may include first and second sets of colloidal silica particles with the second set having a silica content greater than the first set.

Abstract: A plasma processing apparatus 1 includes a chamber 10, a mounting table 16, a focus ring 24a, a first electrode plate 36 and a second electrode plate 35. The focus ring 24a is provided around the mounting table 16 to surround a mounting surface of the mounting table 16. The first electrode plate 36 is provided above the mounting table 16. The second electrode plate 35 is provided around the first electrode plate 36 to surround the first electrode plate 36 and is insulated from the first electrode plate 36. The plasma processing apparatus 1, in a first process, performs a preset processing on a semiconductor wafer W mounted on the mounting surface with plasma generated within the chamber, and, in a second process, increases an absolute value of a negative DC voltage applied to the second electrode plate 35 depending on an elapsed time of the first process.

Abstract: An object of the present invention is to provide a semiconductor device including a film to be processed having a uniform height. A first coating film made of photosensitive material is formed so as to cover step parts and to become thicker in a central part of a semiconductor substrate in planar view and to become thinner in an outer peripheral part. Next, a first pattern part located on the central part side relative to the step parts and a second pattern part located on the outer peripheral part side relative to the step parts are formed. The first pattern part and the second pattern part are formed so that the occupied area of the first pattern part in planar view becomes smaller than that of the second pattern part in planar view. Next, the first pattern part and the second pattern part are sagged by heating. Next, a second coating film is formed by spin coating so as to cover the step parts.

Abstract: A plasma etching apparatus performs plasma etching on a substrate having a resist pattern formed thereon and an outer edge portion where the substrate surface is exposed. The plasma etching apparatus includes a support part that supports the substrate, a cover member that covers the outer edge portion of the substrate and prevents plasma from coming around the outer edge portion, and a control unit that generates plasma by controlling high frequency power application and supply of a processing gas for etching, and uses the generated plasma to etch the substrate that is supported by the support part and has the outer edge portion covered by the cover member. After etching the substrate, the control unit generates plasma by controlling high frequency power application and supply of a processing gas for ashing, and uses the generated plasma to perform ashing on the resist pattern on the etched substrate.

Abstract: Systems, devices, and methods for micro-electro-mechanical system (MEMS) tunable capacitors can include a fixed actuation electrode attached to a substrate, a fixed capacitive electrode attached to the substrate, and a movable component positioned above the substrate and movable with respect to the fixed actuation electrode and the fixed capacitive electrode. The movable component can include a movable actuation electrode positioned above the fixed actuation electrode and a movable capacitive electrode positioned above the fixed capacitive electrode. At least a portion of the movable capacitive electrode can be spaced apart from the fixed capacitive electrode by a first gap, and the movable actuation electrode can be spaced apart from the fixed actuation electrode by a second gap that is larger than the first gap.

Abstract: Methods of producing a uniformly or substantially uniformly doped relatively large area multi-layered graphene element are described comprising the steps of placing the graphene element and a dopant under low pressure conditions, and holding the graphene element and dopant at an elevated temperature for a period of time while under the low pressure conditions. In one arrangement, openings are formed in a multi-layered graphene element of relatively large area prior to doping. In another arrangement, a relatively large area multi-layered graphene element formed by an epitaxial growth technique is used. The invention also relates to an element produced using the aforementioned techniques.

Abstract: Disclosed is an inductively coupled RF plasma source that provides both magnetic confinement to reduce plasma losses and Faraday shielding to suppress parasitic capacitive components. The inductively coupled RF plasma system comprises an RF power source, plasma chamber, an array of permanent magnets, and an antenna array. The plasma chamber is comprised of walls and a dielectric window having an inner and outer surface wherein the inner surface seals the volume of the plasma chamber. The array of parallel conductive permanent magnets is electrically interconnected and embedded within the dielectric window walls proximate to the inner surface and coupled to ground on one end. The permanent magnet array elements are alternately magnetized toward and away from plasma in the plasma chamber to form a multi-cusp magnetic field. The antenna array may be comprised of parallel tubes through which an RF current is circulated. The antenna array is oriented perpendicular to the permanent magnet array.

Abstract: A method of manufacturing a polarizer includes forming a first layer on a base substrate, forming a first partition wall layer on the first layer, forming a second partition wall layer on the first partition wall, forming a plurality of first partition wall patterns and a plurality of second partition walls disposed on the first partition wall patterns by etching the first partition wall and the second partition wall at the same time, forming a block copolymer layer on the first layer on which the plurality of first partition wall patterns are formed, forming a plurality of fine patterns from the block copolymer layer, and patterning the first layer using the fine patterns and the second partition wall patterns as a mask.

Abstract: A polishing agent comprises: a fluid medium; an abrasive grain containing a hydroxide of a tetravalent metal element; a first additive; a second additive; and a third additive, wherein: the first additive is at least one selected from the group consisting of a compound having a polyoxyalkylene chain and a vinyl alcohol polymer; the second additive is a cationic polymer; and the third additive is an amino group-containing sulfonic acid compound.

Abstract: A manufacturing process of wafer thinning includes a step of wafer-grinding to grind a surface of a wafer to a first predetermined thickness, and a step of wafer-etching to etch the grinded face of the wafer with the first predetermined thickness to a second predetermined thickness.

Abstract: Superhydrophobic films and methods of making such films are disclosed. More particularly, superhydrophobic films having durable nanostructures with high contrast ratios and various methods of producing such films are disclosed.

Abstract: A method can include placing a substrate over a chucking region, wherein the substrate has a primary surface; quantifying a distortion in the substrate, the lithographic template, the imprint apparatus, or any combination thereof; and dispensing a formable material based at least in part on the distortion. The distortion can include a deviation in planarity, a magnification or orthogonality error or the like. In another aspect, an imprint apparatus can include a substrate holder including a chucking region; a template having an imprint surface that includes protrusions, wherein the protrusions define a primary surface; and a processor configured to determine an amount of a formable material to dispense in a particular area based at least in part on an distortion in the substrate, the lithographic template, the imprint apparatus, or any combination thereof.