Patents Examined by Ann T. Hoang
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Patent number: 7633726Abstract: This invention provides protection against an electricity leak and prevents error in reverse wiring. Also, when the ground fault circuit interrupter has come to the end of its life and its functions fail, it can set off an alarm prompt signal, reminding the user to replace the interrupter in a prompt manner; when a certain part or accessory of the ground fault circuit interrupter fails, especially when the primary electromagnetic coil cannot work in a normal manner, the power output of the interrupter may be cut off through the secondary electromagnetic coil; or the test button may be pressed to mechanically cut off the power output of the interrupter. This invention has powerful applications, with good safe guard and is safe to use, thus effectively ensuring the personal safety of the user as well as the safety of the appliances.Type: GrantFiled: February 27, 2006Date of Patent: December 15, 2009Inventors: Huadao Huang, Huayang Lu
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Patent number: 7633733Abstract: A power supply adapted to provide power for one or more field devices over a protocol bus based network, such as a fieldbus network, which includes an oscillator circuit and a power control switch mounted at the output of a conditioned power supply. The oscillator circuit is adapted to detect a cable fault such as a short circuit. When a cable fault is detected, the oscillator circuit sends a signal to the power control switch to stop the power supply from feeding current to the network and to activate an alarm signal to alert a host of the cable fault.Type: GrantFiled: August 18, 2005Date of Patent: December 15, 2009Assignee: Moore Industries International, Inc.Inventor: Hassan M. El-Sayed
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Patent number: 7626790Abstract: An electrostatic discharge protection circuit includes a first NMOS transistor and a second NMOS transistor cascode-connected between a high-voltage supply terminal (VDD) and an input pad (PAD), a third NMOS transistor and a fourth NMOS transistor cascode-connected between PAD and a low-voltage supply terminal (VSS), a first capacitor connected between VDD and a node VT that is connected to gate terminals of the second NMOS transistor and the third NMOS transistor, a second capacitor connected between the node VT and PAD, and a diode connected between VDD and the node VT.Type: GrantFiled: October 5, 2007Date of Patent: December 1, 2009Assignee: Smartech Worldwide LimitedInventor: Kenneth Wai Ming Hung
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Patent number: 7626791Abstract: A DC electrical current busbar associated with electrical load circuits and devices as well as sources requires protection. In order to provide such protection Kirchoff's laws are utilized such that electrical current values are substantially simultaneously taken and summed in order to identify deviations from expected differential threshold values. Upon detection of such deviations and generally as a result of a number of successive deviations an electrical isolation device is utilized in order to isolate electrical current to the busbar. The data set of electrical current values can be utilized in order to provide a back up protection system for individual electrical load devices and circuits, by similar comparison with expected values for those devices and circuits.Type: GrantFiled: April 3, 2007Date of Patent: December 1, 2009Assignee: Rolls-Royce plcInventors: Richard D Newman, Campbell D Booth
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Patent number: 7626792Abstract: In a power supply control apparatus for controlling supplying of power from a battery to a load including a battery terminal connectable to the battery, an output terminal connectable to the load, and a ground terminal, a transistor is connected between the battery terminal and the output terminal to turn ON and OFF a connection between the battery and the load. An overcurrent detecting circuit is connected between the battery terminal and the output terminal to detect whether or not an overcurrent has flown through the transistor. A control circuit is connected between the battery terminal and the ground terminal to activate the transistor and the overcurrent detecting circuit.Type: GrantFiled: July 7, 2004Date of Patent: December 1, 2009Assignee: NEC Electronics CorporationInventor: Tsuyoshi Mitsuda
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Patent number: 7623328Abstract: When a variable valve mechanism which varies an opening characteristic of an engine valve is malfunctioned, the power supply to a drive circuit for the variable valve mechanism is stopped, and also a control signal to the drive circuit is cleared.Type: GrantFiled: February 2, 2005Date of Patent: November 24, 2009Assignee: Hitachi, Ltd.Inventors: Kenichi Machida, Hidekazu Yoshizawa
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Patent number: 7619865Abstract: A circuit protective device includes a current sensing circuit adapted to be coupled to an output power switch to provide a feedback signal representative of the output current, an overcurrent sensor responsive to the feedback signal exceeding a presettable reference level to provide an overcurrent alert signal, a function generator responsive to the feedback signal to generate a first signal related to the output current according to a preset functional relationship, an integration circuit coupled to the output of the function generator to provide a second signal representative of the product of the first signal and t, where t is the elapsed time following generation of an overcurrent alert signal, and a control circuit responsive to a presettable value of the second signal to disable a gating circuit for the power switch, the shut-down signal being provided at a time which depends on the magnitude of the overcurrent signal.Type: GrantFiled: July 29, 2005Date of Patent: November 17, 2009Assignee: International Rectifier CorporationInventors: Vincent Thiery, David Jacquinod
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Patent number: 7616419Abstract: A switchgear control apparatus includes a zero point interval detecting circuit, an interruption time judgment circuit and a reclosing time decision circuit. The zero point interval detecting circuit detects time intervals between successive zero points of a main circuit current. The interruption time judgment circuit judges that interruption time of the main circuit current is time of a zero point immediately preceding a zero point at which a difference between the time interval between two successive zero points and half the period of a commercial AC voltage exceeds a specific value. Upon detecting the gradient of the main circuit current at the interruption time, the reclosing time decision circuit sets reclosing time at a point in phase where the AC voltage has a maximum negative value if the gradient is positive, and at a point in phase where the AC voltage has a maximum positive value if the gradient is negative.Type: GrantFiled: October 9, 2007Date of Patent: November 10, 2009Assignee: Mitsubishi Electric CorporationInventors: Haruhiko Koyama, Tomohito Mori, Kenji Kamei, Sadayuki Kinoshita
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Patent number: 7609498Abstract: An inverter circuit overcurrent protection device in which an overcurrent detection resistor (Rs) is incorporated in a hybrid integrated circuit, in which a detection voltage from the overcurrent detection resistor (Rs) is divided by voltage dividing resistors (R1 and R2) and is compared with a reference voltage in an overcurrent detection circuit, for carrying out an overcurrent protection, and an external resistor is connected in series or in parallel with one of the voltage dividing resistors (R1 and R2) to change a division ratio so that the level of overcurrent protection can be adjusted; and an embodiment wherein, in the vicinity of a current detection terminal, a first pad (P1) is connected to a detection voltage from the overcurrent detection resistance, a second pad (P2) is connected to a detection voltage from the amplifier, and a third pad (P3) is connected to the voltage dividing resistors, and a bonding wire (10) is connected between the current detection terminal one of said pads, to select oneType: GrantFiled: September 19, 2006Date of Patent: October 27, 2009Assignee: Sanyo Electric Co., Ltd.Inventors: Junichi Iimura, Katsumi Okawa, Yasuhiro Koike, Soichi Izutani
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Patent number: 7593200Abstract: A circuit for detecting faults in a converter, the converter including a switching stage having high- and low-side series switches connected together at a switching node and fault circuitry for managing a plurality of fault conditions, an input voltage source being provided at one terminal of the high-side switch. The circuit including a gate driver circuit connected to gate terminals of the high- and low-side switches for providing PWM signals to control the switching stage; a comparator circuit for comparing a voltage at the switching node to the input voltage and providing an output signal, the comparator circuit having output, positive and negative terminals; a capacitor connected to the output terminal of the comparator circuit to generate an AC component of the comparator circuit output signal; and a rectifier circuit connected to the capacitor for rectifying the AC component of the comparator circuit output signal and providing a fault-indicating signal to the gate driver circuit.Type: GrantFiled: August 14, 2007Date of Patent: September 22, 2009Assignee: International Rectifier CorporationInventors: Wenkai Wu, George Schuellein
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Patent number: 7589945Abstract: An integrated circuit includes a first I/O cell disposed at a substrate, the first I/O cell including a first electrostatic discharge (ESD) clamp transistor device. The first ESD clamp transistor device includes a control electrode, a first current electrode coupled to a first voltage reference bus, and second current electrode coupled to a second voltage reference bus. The first ESD clamp transistor device has a first channel width. The integrated circuit further includes a second I/O cell including a second ESD clamp transistor device. The second ESD clamp transistor device includes a control electrode, a first current electrode coupled to the first voltage reference bus, and second current electrode coupled to the second voltage reference bus. The second ESD clamp transistor device has a second channel width different than the first channel width.Type: GrantFiled: August 31, 2006Date of Patent: September 15, 2009Assignee: Freescale Semiconductor, Inc.Inventors: James W. Miller, Melanie Etherton, Michael G. Khazhinsky, Michael Stockinger
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Patent number: 7589943Abstract: A device for reducing Geomagnetically-Induced Currents (GIC) in transformer apparatus of an AC power system that comprises a resistor (R10) in parallel with a protective varistor (V10) forming a passive-circuit arrangement. Such passive-circuit arrangement is connected on one end (N) to the neutral of the transformer and grounded on the other end (G). The combination of these elements produces a conductive path from said neutral to ground resulting in a proper reduction of said GIC currents, while substantially sustaining the neutral-grounding characteristics of said transformer.Type: GrantFiled: March 24, 2007Date of Patent: September 15, 2009Inventors: Vanessa de los Angeles Ramirez, Alberto Raul Ramirez
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Patent number: 7589947Abstract: A surge absorption circuit in accordance with an embodiment comprises: a pair of input terminals; a pair of output terminals; a first inductor device connecting one of the pair of input terminals and one of the pair of output terminals to each other; a second inductor device connecting the other of the pair of input terminals and the other of the pair of output terminals to each other; a first surge absorption part having a first surge absorbing device and connected in series between the one of the pair of input terminals and the other of the pair of output terminals; and a second surge absorption part having a second surge absorbing device and connected in series between the other of the pair of input terminals and the one of the pair of output terminals.Type: GrantFiled: June 16, 2006Date of Patent: September 15, 2009Assignee: TDK CorporationInventor: Yuji Terada
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Patent number: 7586723Abstract: A fault detection apparatus of a power source provided with a central processing unit, a power source, a power receiver supplied with current from a power source, a unit periodically accessing the power receiver from the central processing unit so as to supply a periodic current periodically repeatedly turning on and off from the power source to the power receiver, and a unit judging the power source to be defective when the output voltage of the power source exceeds a predetermined threshold value and a method and program for the same. By this, it is possible to judge a power source to be defective when fluctuations in the output voltage of a power source due to the periodic supply of current to the power receiver (voltage load fluctuations) exceed a predetermined threshold value.Type: GrantFiled: May 25, 2006Date of Patent: September 8, 2009Assignee: Fujitsu LimitedInventors: Fumio Ichikawa, Naoki Hayashi
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Patent number: 7586718Abstract: An electrical wiring device includes a housing, and a circuit protection component and a light source operably mounted within the housing. In various aspects, the circuit protection component is a ground fault circuit interrupter (GFCI) or an arc fault circuit interrupter (AFCI). The light source can function to provide increased illumination in an environment surrounding the electrical wiring device (e.g., a darkened bathroom or a darkened kitchen), or to indicate the status of the circuit protection component (e.g., tripped or normal). The light source may be one or more LEDs, neon sources, incandescent sources, etc. Embodiments of the invention include, in addition, a sensor for controlling the on/off state of the light source and/or a trip indicator separate from the light Source for indicating a status condition of the circuit protection component. The device is illustratively represented by a grounded plug receptacle, but may be embodied in a switch, a dimmer, or other application device.Type: GrantFiled: November 29, 2004Date of Patent: September 8, 2009Assignee: Pass & Seymour, Inc.Inventors: Dejan Radosavljevic, Kenneth D. Vought, Gerald R. Savicki, Jr., Richard Weeks, Gary O. Wilson
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Patent number: 7580234Abstract: A circuit which limits current to a first value until a predetermined time has elapsed, then permits the current to rise to a second, acceptable value. The current limiting can be carried out during a predetermined time interval by a biased semiconductor switch. Subsequent to the current limiting time interval, the semiconductor switch can be saturated enabling the current to increase.Type: GrantFiled: January 20, 2005Date of Patent: August 25, 2009Assignee: Honeywell International Inc.Inventor: Anthony Tamosaitis
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Patent number: 7580233Abstract: Circuits and methods for protecting a circuit from an electrostatic discharge (ESD) event are disclosed herein. One such method includes detecting when a circuit to be protected is powering up and disabling an output driver of the circuit to be protected when the circuit is powering up. The power up sequence, for example, may be the result of a sensed ESD event. In addition, the present disclosure includes a circuit that comprises an ESD sensing circuit and a disable circuit. The ESD sensing circuit includes an RC circuit connected between VDD and VSS and a first inverter connected between a second inverter and a node that connects a resistor with a capacitor of the RC circuit. The disable circuit includes a first PMOS transistor and a first NMOS transistor, the first PMOS transistor configured to receive an EN signal from the second inverter, and the first NMOS transistor configured to receive an EN signal from the first inverter.Type: GrantFiled: October 21, 2005Date of Patent: August 25, 2009Assignee: Via Technologies, Inc.Inventor: Timothy Davis
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Patent number: 7570468Abstract: An ESD protection circuit incorporates an ESD shunt device triggered by an ESD trigger network. In non-powered situations, a first RC time constant in the ESD trigger network, corresponds with the time range of the onset an ESD event and controls application of the ESD shunt device in response to the ESD event. A second RC time constant in a shunt trigger network is selected to be longer than the first RC time constant and holds-off triggering of a shunt device during ESD shunt protection. When activated during powered-on operation, the shunt device shunts a resistive element in the ESD trigger network forming a third time constant. The shunt device guards against false triggering during noise on a power rail by maintaining the third time constant in the ESD trigger network. The third time constant ensures that power rail voltage buildup due to noise dissipates before a false trigger develops.Type: GrantFiled: June 7, 2007Date of Patent: August 4, 2009Assignee: Atmel CorporationInventors: David Bernard, Antoine Riviere
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Patent number: 7570464Abstract: In an overload protective apparatus of a compressor and its method capable of preventing damage of a compressor due to overload by removing an overload protector and using an operation control device operating the compressor, the overload protective apparatus includes a reference current setting unit for presetting a reference current value for operating the compressor normally; a microcomputer for generating a power cutoff signal when the detected current value is greater than the reference current value and generating a power supply signal when the detected current value is smaller than the reference current value; and a power supply unit for cutting off power applied to the compressor on the basis of the power cutoff signal or applying power to the compressor on the basis of the power supply signal.Type: GrantFiled: October 11, 2002Date of Patent: August 4, 2009Assignee: LG Electronics Inc.Inventors: Young-Hoan Jun, Dong-Hee Shin, Gyoo-Jong Bae, Woo Geun Lee
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Patent number: 7567414Abstract: Nanotube ESD protective devices and corresponding nonvolatile and volatile nanotube switches. An electrostatic discharge (ESD) protection circuit for protecting a protected circuit is coupled to an input pad. The ESD circuit includes a nanotube switch electrically having a control. The switch is coupled to the protected circuit and to a discharge path. The nanotube switch is controllable, in response to electrical stimulation of the control, between a de-activated state and an activated state. The activated state creates a current path so that a signal on the input pad flows to the discharge path to cause the signal at the input pad to remain within a predefined operable range for the protected circuit. The nanotube switch, the input pad, and the protected circuit may be on a semiconductor chip. The nanotube switch may be on a chip carrier. The deactivated and activated states may be volatile or non-volatile depending on the embodiment.Type: GrantFiled: November 2, 2005Date of Patent: July 28, 2009Assignee: Nantero, Inc.Inventors: Claude L. Bertin, Brent M. Segal, Thomas Rueckes, Jonathan W. Ward