Abstract: An intelligent automatic bypass for a motor control device determines if a fault that is occurring is a restricted or non-restricted fault. A restricted fault is one that may damage or destroy the motor if an automatic switch to bypass is allowed to occur for all faults. The intelligent automatic bypass allows the automatic switch to bypass only if the fault is a non-restricted fault and blocks the automatic switch to bypass if the fault is a restricted fault.

Abstract: An improvement to a digital integrated circuit of the type having a functional circuit that is susceptible to damage from an electrostatic discharge. An electrostatic discharge protection element is placed in series with the functional circuit and disposed upstream in a normal direction of current flow from the functional circuit. The electrostatic discharge protection element includes at least one of a resistive choke that exhibits thermal runaway and an inductive choke.

Abstract: In a high voltage pulse generating circuit, inductive energy is accumulated in an inductor due to electrical continuity of a first semiconductor switch by turning on a second semiconductor switch, and a high voltage pulse is generated by the inductor due to turning off of the first semiconductor switch by turning off the second semiconductor switch. In the case where both edge voltages of the first semiconductor switch and the second semiconductor switch are off the normal range, a failure diagnosis circuit is provided for stopping drive of the second semiconductor switch.

Abstract: The present invention relates to an SCR (Silicon Controlled Rectifier) for the ESD (electrostatic discharge) protection comprising two terminal electrodes of a first electrode and a second electrode, a PMOS, an NMOS and an SCR structure. By utilizing an embedded SCR, a whole-chip ESD protection circuit design can be obtained. The present invention is suitable for IC products, and for applications by IC design industries and IC foundry industries.

Abstract: A circuit with protection against electrostatic destruction comprises at least two sections (A, B) composed of a first and second section (A, B). Each of the sections (A, B) has its own working voltage system with a fundamental voltage (USS or USS1) and a supply voltage (UDD or UDD1), and at least one connection (SC) between an information terminal (SA) of the first section (A) and an information terminal (SB) of the second section (B) to transfer information between the first section (A) and the second section (B). The connection (SC) has a transistor circuit with at least one transistor (X) of the first section (A), a resistance (R1), and a first transistor (E) of the second section (B), wherein the first transistor (X) is connected between the fundamental voltage (USS) of the first section (A) and the resistance (R1), and the first transistor (E) of the second section (B) is connected between the resistance (R1) and the supply voltage (UDD1) of the second section (B).

Abstract: A representative system for providing an electric field comprises an electrically insulated frame, guard members and endplates. The frame incorporates a top, a bottom, opposing sides and opposing ends, with the sides extending between the top and the bottom. Each of the ends engages the top, the bottom and the sides. The frame defines an interior. The guard members are suspended within the interior of the frame, with each of the guard members being formed of metal tubing. The guard members are spaced from each other and located along a length of the frame such that the guard members are oriented substantially parallel to the ends of the frame. The endplates are positioned at the ends of the frame. The frame, guard members and endplates are operative to form an electric field within the interior of the frame responsive to an electric potential being applied to at least one of the endplates.

Abstract: Diode strings and electrostatic discharge circuits characterized by low current leakage. Each diode region provides a diode and has first and second regions. The first region is of a first conductive type and formed on a substrate, acting as a first electrode of a diode. The second region is of a second conductive type opposite to the first conductive type, formed in the first region and acting as a second electrode of a corresponding diode. The diodes are forward connected in series to form major anode and cathode of the diode string. An isolation region is of the second conductive type to isolate those diode regions. A bias resistor is connected between the isolation region and a first power line. During normal operation, the voltage of the first power line is not within the range between the voltages of the major anode and cathode.

Abstract: A radio frequency integrated circuit (RFIC) having sectional electrostatic discharge (ESD) protection includes an analog receive section, an analog transmit section, a digital section, a first inductor assembly and a second inductor assembly. The analog receive section is operably coupled to convert inbound RF signals into inbound low IF signals and includes an analog receive ground connection. The analog transmit section is operably coupled to convert outbound low IF signals into outbound RF signals and includes an analog transmit ground connection. The digital section is operably coupled to convert the inbound low IF signals into inbound digital baseband signals and to convert outbound digital baseband signals into the outbound low IF signals, wherein the digital section has a digital ground connection. The first inductor assembly operably couples the analog receive ground connection to the digital ground connection.

Abstract: A controller and method for a switched-mode power converter adaptively provides overcurrent protection by detecting a current in the power converter exceeding a current limit during substantially a minimum on time of a power switch. A count N is computed for the number of consecutive active switching cycles that a current exceeds a current limit during substantially the minimum on time of the power switch. Conduction of the power switch is inhibited for a number of cycles that is a function of the count N, which is an increasing function of N. The function of the count N is preferably the function 2N?1. The count N is reset to zero if the current in the power converter does not exceed the current limit substantially during the minimum on time of the power switch. The controller can be easily implemented with a digital integrated circuit for a wide range of applications.

Abstract: One embodiment of the disclosures made herein is a network equipment protection module configured for being removably mounted on a network equipment protector block. In accordance with such a network equipment protection module, the network equipment protection module includes surge protection circuitry configured for providing surge protection functionality, AC coupling-DC blocking circuitry configured for providing AC coupling-DC blocking functionality and DC blocking circuitry configured for providing DC blocking functionality. The DC blocking circuitry enables the DC blocking functionality to be selectively activated and deactivated. In this manner, such a network equipment protection module enables the combination of surge protection, DSL signal transmission, full metallic loop testing (MLT) and bridging of a DC voltage to be facilitated in association with a twisted pair transmission line.

Abstract: A switch provided between a first terminal and a second terminal with a varying cross terminal voltage. The switch contains two transistors, with the source terminal of the first transistor being coupled to the first terminal and a drain terminal of the second transistor being coupled to the second terminal. The gate terminal of the first transistor is coupled to the first terminal, the gate terminal of the second transistor is coupled to the second terminal, and the drain terminal of the first transistor is coupled to the source terminal of the second transistor. Due to such a topology, the cross-terminal voltage across the first and second terminals can be substantially higher than the voltage of the control signal indicating whether the switch is to be in on or off state.

Abstract: An ESD protection circuit for protecting a circuit from an ESD event occurring between a first voltage supply node and a second voltage supply node associated with the circuit to be protected includes an MOS device having a gate terminal, a first source/drain terminal and a second source/drain terminal. The first source/drain terminal is connected to the first voltage supply node and the second source/drain terminal is connected to the second voltage supply node. The ESD protection circuit further includes a trigger circuit coupled to the gate terminal of the MOS device. The trigger circuit is configured to generate a control signal at the gate terminal of the MOS device for activating the MOS device during the ESD event.

Abstract: A power abnormal protection circuit includes a power detection unit, a voltage drop correction unit, a drop out detection unit, a delay unit and a delay masking unit. By detecting an input power average value of a power supply occurring of a brown out condition can be determined. The power supply includes a power factor correction unit which has an output capacitor. By detecting the voltage of the output capacitor a drop out condition can be determined. When a power abnormal condition occurs all units of the power supply can be set off sequentially according to a delay time to protect circuit elements and a connecting computer.

Abstract: A quench protection circuit for a superconducting magnet, comprises at least one heater associated with a corresponding coil of the superconducting magnet. The at least one heater is arranged to be driven by an inductor which is connected in series with it and is arranged to derive a voltage from variation in a magnetic field of the superconducting magnet. The at least one heater and the inductor are arranged in a series circuit which further comprises a non-linear positive temperature coefficient resistors.

Abstract: Techniques for preventing electrostatic discharge (ESD) and circuit noise are provided. More particularly, the present invention provides a method to prevent ESD damage during the assembly of computer disk commonly called a hard disk for memory applications. The coating mainly involves a ion-deposition process. Merely by way of example, the present invention is implemented by using filtered cathodic vacuum arc (FCVA) with a dissipative crystalline and/or amorphous carbon base thin film coating on a flexible circuit to drain the potential electrostatic charges during circuit assembly and interconnect processes, yet it would be recognized that the invention has a much broader range of applicability on any electronic apparatus that is susceptible to electrostatic damage and static noise.

Abstract: The present invention proposes an over-power protection apparatus for a power converter. An oscillator outputs a clock signal. By comparing a sense signal with a threshold signal, an over-power comparative unit outputs a protection signal to an accumulating trigger unit. The accumulating trigger unit is accumulating and counting the protection signal in response to the clock signal. The accumulating trigger unit further outputs an off signal to a latch unit as a period of the protection signal reaches a predetermined clock counts. In response to the off signal, the latch unit outputs a latch signal to a driving output unit for disabling a switching signal to a power switch. Therefore, the power switch is turned off and the over-power protection can be accomplished.

Abstract: A solenoid driving apparatus that drives a solenoid by intermittently supplying an exciting current comprises a first current switching element turned ON and OFF so as to switchably allow and block passage of the exciting current supplied to the solenoid L, a loop current circuit 3 being connected to the first current switching element and passing a loop current caused by stored energy in the solenoid when the supply of the exciting current to the solenoid is stopped by the first current switching element, and a second current switching element being disposed between the solenoid and a junction of the first current switching element and the loop current circuit, and being turned ON and OFF so as to switchably allow and block passage of the exciting current and the loop current.

Abstract: A circuit for controlling at least one circuit breaker switch that is series connected between a source of electrical power and an electrical load. The circuit includes a programmed controller having at least two inputs and at least one output. A current sensor senses the current between the source and the load and has an output connected to a controller input. Another controller input is connected to the control input of a load power switch. The control output of the controller is connected to the control input of the circuit breaker switch. The circuit is operated by sensing the current between the source of electrical power and the electrical load and monitoring the control input of the load power switch to detect whether the load power switch is commanded to be closed or open. If the load power switch is commanded to be open, the circuit breaker switch will be opened if the sensed current value is greater than a first maximum current value.

Abstract: A method and apparatus are provided for protecting elements of a receiver from overvoltages in a pseudo-differential signal having a true signal and a reference voltage. The method and apparatus limit the true signal to a protection voltage, which is correlated to the reference voltage, to produce a protected true signal. The protected true signal and the reference voltage are applied to inputs of the receiver.

Abstract: A protection apparatus (48) is provided which in addition to protecting electronic equipment (5) from overvoltage transients is also able to provide an indication of whether or not said transients are due to impedances associated with poor earthing. In one embodiment the protection apparatus (48) includes an input terminal (42), an output terminal (60) and a ground reference terminal (62) with a transient blocking unit (50) arranged to isolate the output terminal (60) in response to the destructive transient voltages. A gas discharge tube (46) is provided to conduct transient currents associated with the destructive transient voltages to the earth reference connection point (62); and an indicator (58), such as a fuse or circuit breaker is placed in series with the transient blocking unit (50) to indicate the presence of a voltage resulting from an interaction of the transient currents with an earthing impedance.