Abstract: An oscillator driver system includes an oscillator structure and a driver circuit. The oscillator structure includes a rotor terminal configured to receive a rotor voltage and a stator terminal configured to receive a stator voltage, and is driven about a rotation axis according to a voltage difference between the rotor and stator voltages. The driver circuit is configured to generate a driving signal and output the driving signal as the rotor voltage, wherein the driving signal toggles between low and high voltage levels at an actuation frequency to drive the oscillator structure about the rotation axis, and wherein the stator voltage is a fixed voltage. The low and high voltage levels are greater than the stator voltage such that the voltage difference toggles between a low voltage difference and a high voltage difference as the driving signal toggles between the low voltage level and the high voltage level, respectively.

Abstract: A proximity sensor is provided with multiple channels and a proximity sensor chip (IC) connected to the multiple channels through a sensing line. The proximity sensor chip (IC) includes an internal temperature sensor, senses a first sensing value through the multiple channels, senses a second sensing value through the internal temperature sensor, and compensates the first sensing value through addition or subtraction of the second sensing value with respect to the first sensing value. The internal temperature sensor includes: a clock signal generator including a first oscillator and generating first clock signals variable according to temperature characteristics; and a temperature compensator generating second clock signals according to a setting condition corresponding to the first clock signals generated from the clock signal generator and outputting the second sensing value by counting the second clock signals through a second oscillator generating reference clock signals independent of temperature change.

Abstract: Josephson junction (JJ) structures are disclosed. In some embodiments, a JJ structure may include alternating planar superconducting structures and planar non-superconducting structures arranged along a direction away from a wafer surface.

Abstract: The oscillation circuit includes a drive circuit and an amplitude limiting circuit. A vibrator-output signal is input to the drive circuit from one end of the vibrator, and the drive circuit outputs a drive signal obtained by inverting the vibrator-output signal. The amplitude limiting circuit is disposed between an output node of the drive circuit and the other end of the vibrator, and outputs an amplitude-limited drive signal obtained by reducing an amplitude of the drive signal to the other end of the vibrator.

Abstract: Piezoelectric acoustic metamaterial resonators include a piezoelectric substrate having a top surface and a bottom surface and a plurality of magnetostrictive members disposed on the top surface of the piezoelectric substrate and extending along a length of the piezoelectric substrate and spaced across a width of the piezoelectric substrate.

Abstract: Apparatus and methods enable active compensation for unwanted discrepancies in the superconducting elements of a quantum processor. A qubit may include a primary compound Josephson junction (CJJ) structure, which may include at least a first secondary CJJ structure to enable compensation for Josephson junction asymmetry in the primary CJJ structure. A qubit may include a series LC-circuit coupled in parallel with a first CJJ structure to provide a tunable capacitance. A qubit control system may include means for tuning inductance of a qubit loop, for instance a tunable coupler inductively coupled to the qubit loop and controlled by a programming interface, or a CJJ structure coupled in series with the qubit loop and controlled by a programming interface.

Abstract: Preparing a metrologically-relevant entangled state includes: providing a plurality of atoms in a regular lattice, wherein each atom is in an initial quantum state of a first state in a ground state manifold; initializing a central atom in the regular lattice to a (|0+|1)/?2 state while all other atoms remain in the first state |0 as remaining atoms; and proceeding, starting with the central atom, to propagate preparation of Greenberger-Horne-Zeilinger (GHZ) states in a nonlinear progression by increasing a number of GHZ states in each iteration through the remaining atoms in a recursive manner, to produce an intermediate GHZ state, such that the intermediate GHZ state acts as an initial GHZ state for a next iteration, until a final GHZ state is formed to prepare the metrologically-relevant entangled state of the atoms.

Abstract: Embodiments of the invention provide for integrated circuits for testing one or more transistors for process variation effects. According to an embodiment, the integrated circuit can include: a plurality of ring oscillator macro circuits, wherein each ring oscillator macro circuit includes two ring oscillators, a first multiplexer, and a first divide-by-two circuit; a multiplexer stage; a divide-by-two circuit stage; a second multiplexer; a second divide-by-two circuit; and frequency measurement circuit. According to another embodiment, the integrated circuit can include: a first shift register including a plurality of devices-under-test; a second shift register including a plurality of static latches; a first multiplexer configured to receive outputs from each of the plurality of DUTs; a second multiplexer configured to receive outputs from each of the plurality of static latches; and a comparator configured to compare an output from the first multiplexer with an output from the second multiplexer.

Abstract: A crystal oscillator internally includes a package storing a crystal unit. The crystal oscillator is configured to include: a substrate having one surface side on which the crystal unit is disposed and another surface side on which a circuit component and a heating element are disposed, the circuit component including an oscillator circuit that oscillates the crystal unit, and the heating element regulating a temperature inside the package; a stepped portion formed at an inner wall of the package to support only an end portion of the substrate from the one surface side such that the crystal unit, the circuit component, and the heating element are spaced from a wall portion of the package; and a wire that connects between a terminal disposed at the heating element and a terminal disposed inside the package without via the substrate.

Abstract: A circuit is disclosed. The circuit includes a time-to-digital converter (TDC), and an evaluation circuit coupled to the TDC and a phase-locked loop (PLL) external to the circuit.

Abstract: An apparatus including: a phase lock loop (PLL), including: a phase detector and loop pass filter (PD/LF), including: a phase/frequency detector including a first input configured to receive a reference signal, and a second input configured to receive a feedback signal, and an output configured to produce an output signal based on the reference and feedback signals; a first capacitor; and a charge pump, including: a charging path configured to generate a charging current to charge the first capacitor based on the output signal; and a discharging path including a first resistor configured to discharge the first capacitor.

Abstract: A circuit device includes a waveform-shaping circuit that waveform-shapes an oscillation signal and provides an output clock signal based on a clock signal. A bias voltage output circuit of the circuit device provides a bias voltage of the oscillation signal that is input to the waveform-shaping circuit. A comparator of the circuit device compares a DC voltage obtained by smoothing the clock signal with a reference voltage. A logic circuit of the circuit device sets an adjustment value of the bias voltage. In a test mode of the logic circuit, the logic circuit changes the adjustment value to determine a set value of the adjustment value based on output of the comparator when the adjustment value is changed and stores the determined set value in a storage circuit.

Abstract: Circuits, methods, and apparatus that can reduce or suppress phase noise in a frequency synthesizer. A phase-noise-suppression system can detect phase noise in an input signal, amplify the detected phase noise, subtract the detected phase noise from the input signal, and provide an output signal having reduced phase noise.

Abstract: One or more devices, systems, and/or methods are provided. In an example of the techniques presented herein, an oscillator comprises a voltage controlled oscillator configured to generate an output clock based on a drive signal, a frequency to voltage converter having a time constant and configured to generate a feedback voltage having a decay cycle based on the time constant and a frequency based on a frequency of the output clock, and an integrator configured to generate the drive signal based on an integration of the feedback voltage and a reference voltage.

Abstract: The present invention aims at enabling a gate-type quantum computer to deal with actual problems. There is provided a quantum computer including: a quantum register holding qubits, a control gate performing an operation on the quantum register, and a readout unit observing a state of the quantum register; and the quantum computer repeating longitudinal relaxation to the ground state by gradually changing Hamiltonian H(t) for a predetermined time, wherein the unitary operation determined by the Hamiltonian H(t) at each time is performed with the control gate for a time of about a longitudinal relaxation time, the quantum state is relaxed every time of about the longitudinal relaxation time, and the ground state prepared for an initial state is time-evolved to the ground state of the Hamiltonian which is defined as a problem.

Abstract: Measurement apparatus, for generating a first output signal indicative of a measurand, comprises: a first oscillator circuit and a second oscillator circuit, each oscillator circuit being arranged to generate a respective oscillating output signal and comprising at least a respective first component having a property determining a respective output frequency of the respective oscillating output signal; a sensor for sensing said measurand, the sensor comprising said first component of the first oscillator circuit, said property of said first component of the first oscillator circuit being dependent upon said measurand; and circuitry arranged to receive said oscillating output signals and generate said first output signal, said first output signal being indicative of a number of cycles of one of the first and second oscillating output signals in a time period determined by a period of the other of said first and second oscillating output signals.

Abstract: The present invention relates to a frequency generator arrangement having an oscillator for generating an oscillator signal having an oscillator frequency and an oscillator output for outputting the oscillator signal, the frequency generator arrangement further comprising a frequency multiplier coupled and/or connected to an oscillator output for generating an output signal of the frequency generator arrangement having a multiplier frequency corresponding to a multiple of the oscillator frequency, wherein the frequency multiplier comprises a frequency multiplier core directly causative of the frequency multiplication, the frequency multiplier core having a power supply, and the frequency generator arrangement having a control input for controlling the power supply to the frequency multiplier core, whereby an output power of the output signal is adjustable by controlling the power supply to the frequency multiplier core.

Abstract: In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror and an amplifier, where the amplifier is coupled to a pin of the chip. The oscillator circuit also includes a first switch coupled to the pin, a second switch coupled to the pin and to a charging resistor, and a third switch coupled to the amplifier and an internal resistor, where the internal resistor is internal to the chip. The oscillator circuit includes a bias current source coupled to the current mirror. The system includes an external resistor coupled to the pin, where the external resistor is external to the chip. The system also includes an external capacitor coupled to the pin and coupled in parallel to the external resistor, where the external capacitor is external to the chip.

Abstract: The disclosed apparatus and method is a closed loop system that obtains, stores and transfers motive energy. Preferably, the majority of the electricity generated is utilized to service a load or supplied to the grid. A portion of the electric power produced is used to recharge the batteries for subsequent use of the electric motor. The system controls and manages the battery power by controlling the charging and discharging of the battery reservoir via a series of electrical and mechanical innovations controlled by electronic instruction using a series of devices to analyze, optimize and perform power production and charging functions in sequence to achieve its purpose.

Abstract: An electronic component is formed by a semiconductor component or a semiconductor-like structure having gate electrode assemblies, for reading out the quantum state of a qubit in a quantum dot. The electronic component comprises a substrate having a two-dimensional electron gas or electron hole gas. Electrical contacts connect the gate electrode assemblies to voltage sources. The gate electrode assemblies have gate electrodes, which are arranged on a surface of the electronic component, for producing potential wells in the substrate.