Abstract: A method of operating an oscillator circuit comprising a resonator is provided. The method comprises maintaining a resonance of the resonator by a) connecting the resonator to an input voltage (Vbuf) for a first pulse period to charge the resonator only partially towards the input voltage (Vbuf); b) connecting the resonator to a second, lower, voltage for a second pulse period to discharge the resonator at least partially; and repeating steps a) and b) at a rate corresponding to the resonance of the resonator and with a phase corresponding to the resonance of the resonator, so as to maintain the resonance of the resonator.

Abstract: A rechargeable battery jump starting device is provided that includes a first 12V battery, a second 12V battery, a supplemental power supply, a first switching circuit electrically coupled to the first and second 12V batteries and configured to select the first 12V battery and/or the second 12V battery to provide either a 12V operating voltage or a 24V operating voltage, and a second switching circuit for switching in the supplemental power supply with the first 12V battery and/or the second 12V battery for increasing the 12V operating voltage or the 24V operating voltage for jump starting a depleted or discharged vehicle battery.

Abstract: A power source supply circuit supplies an output power source of a battery to a vehicle control apparatus that includes a first instrument control portion that selectively receives a voltage applied to a first power source input portion or a voltage applied to a second power source input portion as an operation voltage and a second instrument control portion that receives a voltage applied to a second power source input portion or a third power source input portion as the operation voltage.

Abstract: An electronic device may include a transceiver with mixer circuitry that up-converts or down-converts signals based on a voltage-controlled oscillator (VCO) signal. The transceiver circuitry may include first, second, third, and fourth VCOs. Each VCO may include a VCO core that receives a control voltage and an inductor coupled to the VCO core. Fixed linear capacitors may be coupled between the VCO cores. A switching network may be coupled between the VCOs. Control circuitry may place the VCO circuitry in one of four different operating modes and may switch between the operating modes to selectively control current direction in each of the inductors. The VCO circuitry may generate the VCO signal within a respective frequency range in each of the operating modes. The VCO circuitry may exhibit a relatively wide frequency range across all of the operating modes while introducing minimal phase noise to the system.

Abstract: Methods of using vapor cells may involve providing a vapor cell including a body defining a cavity within the body. At least a portion of at least one surface of the vapor cell within the cavity may include at least one pore having an average dimension of about 500 microns or less, as measured in a direction parallel to the at least one surface. A vapor pressure of a subject material within the cavity may be controlled utilizing the at least one pore by inducing an exposed surface of a subject material in a liquid state within the at least one pore to have a shape different than a shape the exposed surface of the subject material in a liquid state would have on a flat, nonporous surface.

Abstract: A voltage controlled oscillator (VCO) has a VCO core and a tuning bank. The tuning bank includes first and second tuning capacitors. A main switch is coupled between the first and second tuning capacitors. The tuning bank also includes control switches that receive a control signal to selectively activate the tuning bank. The main switch receives a level-shifted control signal to activate the tuning bank.

Abstract: A method for performing long-range multi-qubit measurements in a quantum circuit utilizes a graph that maps qubits of the quantum circuit to nodes that are connected to one another by edges. The method provides for identifying sets of the nodes on the graph corresponding to sets of qubits targeted by multi-qubit operations in a quantum algorithm and for defining a group of edge-disjoint paths connecting the nodes of each set. The group of edge-disjoint paths is defined such that no two of the paths in the group share an edge. The method further provides for performing a set of operations to entangle the qubits corresponding to the to the identified set of nodes that are included in each path in the group and for performing the set of multi-qubit operations on the entangled sets of the qubits.

Abstract: Systems and methods are provided for compensating for mechanical acceleration at a reference oscillator. A reference oscillator provides an oscillator output signal and an accelerometer on a same platform as the reference oscillator, such that mechanical acceleration at the reference oscillator is detected at the accelerometer to produce a measured acceleration. A filter assembly, having an associated set of filter weights, receives the measured acceleration from the accelerometer and provides a tuning control signal responsive to the measured acceleration to a frequency reference associated with the system. An adaptive weighting component receives the oscillator output signal of the reference oscillator and an external signal that is provided from a source external to the platform and adjusts the set of filter weights for the filter assembly based on a comparison of the external signal and the oscillator output signal.

Abstract: A semiconductor device including a first inverter circuit connected in parallel to a crystal vibrating element; a second inverter circuit connected to the first inverter circuit so as to share an input therewith, and outputting an oscillation signal; and a wave filter connected to the second inverter circuit and having a passband that is determined in advance and includes an oscillation frequency of the oscillation signal.

Abstract: A detection circuit for detecting a clock signal includes a multiplexer, a digital-to-analog converter, a comparator, and a counter. The multiplexer outputs either a first signal or a second signal as a selection signal. The digital-to-analog converter outputs a reference voltage according to the selection signal. The comparator compares the clock signal to the reference voltage to generate a comparison signal. The counter counts a reference clock signal to generate an overflow signal, and resets the overflow signal according to the comparison signal. The overflow signal indicates the amplitude of the clock signal.

Abstract: An oscillator includes a resonator, sustaining circuit and detector circuit. The sustaining circuit receives a sense signal indicative of mechanically resonant motion of the resonator generates an amplified output signal in response. The detector circuit asserts, at a predetermined phase of the amplified output signal, one or more control signals that enable an offset-reducing operation with respect to the sustaining amplifier circuit.

Abstract: A first three state driver injects a first clock signal into a crystal through an input node during a startup phase of a crystal oscillator and a second three state driver injects a second signal into the crystal through an output node during the startup phase. The first and second signals are anti-phase signals. The crystal oscillator circuit includes a first amplifier that is used during starting up and steady-state operation and includes a second amplifier. The injection through the input and output nodes is disabled after a fixed time. After injection ends, the second amplifier is turned on if voltage on the output node has reached a desired voltage and left off otherwise. If the second amplifier is turned on, the second amplifier is turned off when the voltage on the output node reaches the desired voltage.

Abstract: An apparatus comprises a first circuit, a second circuit, a first transistor, a second transistor, a third transistor, a first programmable resistance, and a second programmable resistance. The first circuit may be configured to generate a reference signal and a bias signal in response to a supply voltage and a first input signal. The first circuit generally provides supply noise rejection to variations in the supply voltage. The second circuit may be connected to the first circuit and a ring oscillator. The first transistor may be connected to the first circuit and configured to set a first reference current of the first circuit based on the first input signal and the first programmable resistance. The second transistor may be connected in parallel with the first transistor. The second transistor is generally diode-connected.

Abstract: Systems and methods for efficiently routing qubits in a quantum computing system include selecting bubble nodes and routing qubits to the bubble nodes. The systems and methods further include dividing a system of nodes into regions and selecting a bubble node for each region. The systems and methods further include using super bubble nodes with reliable links connected to other super bubble nodes and bubble nodes to improve cross-region operations.

Abstract: A frequency synthesizer on an integrated circuit provides a local oscillator (LO) signal for RF operations and also functions as an injection clock signal source during crystal oscillator startup. The integrated circuit goes into a sleep mode in which the crystal oscillator is off and responsive to a wakeup event the crystal oscillator starts up again using the injection clock signal sourced from the frequency synthesizer. Parameters that cause the injection clock signal to match the crystal oscillator frequency are stored. The frequency synthesizer includes a phase-locked loop having an LC oscillator. A digital to analog converter controls the LC oscillator during injection. During an initial power up of the integrated circuit, a PLL in the frequency synthesizer locks to the crystal oscillator frequency to determine the parameters to store for injection.

Abstract: Described herein is an apparatus and a method for a low noise infinite radio frequency (RF) delayed-locked loop (DLL). The apparatus comprises a phase detector having a first input configured to receive a first RF signal, a second input, and an output; an infinite phase shifter having a first input configured to receive a second RF signal, an input bus, and an output connected to the second input of the phase detector; and a controller having a first input connected to the output of the phase detector and an output bus connected to the input bus of the infinite phase detector, wherein the output of the infinite phase shifter comprises a low noise signal in phase alignment with the first RF signal.

Abstract: In a described example, an apparatus includes a package substrate having a device side surface and a board side surface opposite the device side surface, a physics cell mounted on the device side surface having a first end and a second end, a first opening extending through the package substrate and lined with a conductor, aligned with the first end, a second opening extending through the package substrate and lined with the conductor, aligned with the second end, a millimeter wave transmitter module on the board side, having a millimeter wave transfer structure including a transmission line coupled to an antenna aligned with the first opening, and a millimeter wave receiver module mounted on the board side surface of the package substrate and having a millimeter wave transfer structure including a transmission line coupled to an antenna for receiving millimeter wave signals, aligned with the second opening.

Abstract: A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a first bias circuit and a phase noise reduction circuit, the first bias circuit is coupled to an output terminal of the crystal oscillator core circuit, and the phase noise reduction circuit is coupled to the output terminal of the crystal oscillator core circuit. In operations of the crystal oscillator, the crystal oscillator core circuit is configured to generate a sinusoidal wave. The first bias circuit is configured to provide a first voltage level to be a bias voltage of the sinusoidal wave. The phase noise reduction circuit is configured to reset the bias voltage of the sinusoidal wave in response to a voltage level of the sinusoidal wave exceeding a specific voltage range. For example, the specific voltage range is determined according to a second voltage level.

Abstract: An accurate replica oscillator-based frequency tracking loop (FTL) is provided. The replica oscillator used in the FTL can be at a lower frequency and therefore can consume much lower power compared to a main oscillator, such as an injection locked oscillator (ILO). The proposed FTL accurately sets the free running frequency of an ILO across process, voltage and temperature (PVT). Techniques are also provided to compensate the gain and offset error between the replica oscillator and the ILO.

Abstract: A ring oscillator includes a first set of at least three laddered inverter quantizer (LIQAF) circuits connected in stages that are in series, including a first LIQAF circuit and a last LIQAF circuit, and a feedback circuit from the last LIQAF circuit to the first LIQAF circuit having a logical NOT output compared to the first LIQAF circuit. A voltage input creates a pair of phase shifted waveforms in the first of the at least three LIQAF circuits that propagate sequentially through the stages of the at least three LIQAF circuits. Each stage has a pair of outputs to the next stage that are then phase shifted from the previous stage in the next stage.