Patents Examined by Arnold M. Kinkead
  • Patent number: 11980107
    Abstract: A quantum computing system including plural base configurations each configured including a first quantum bit group configured from first quantum bits arranged so as to form a single column without mutual coupling, a second quantum bit group configured from second quantum bits arranged so as to form a single column with adjacent ones of the second quantum bits coupled together and each of the second quantum bits coupled to the first quantum bit that is arranged in a same row, and a third quantum bit coupled to all of the second quantum bits. The plural base configurations are arranged so as to form a single column with the third quantum bits in adjacent ones of the base configurations coupled together. In a quantum computing circuit configuration, a two-dimensional cluster state or a three-dimensional cluster state is accordingly realized with two-dimensional control wiring, or surface code is accordingly realized with a pseudo two-dimensional superconducting circuit.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: May 7, 2024
    Assignee: Tokyo University of Science Foundation
    Inventors: Jaw-Shen Tsai, Hiroto Mukai, Keiichi Sakata
  • Patent number: 11979164
    Abstract: In a semiconductor integrated circuit, a first oscillation circuit receives a first clock signal and outputs a second clock signal synchronized with the first clock signal in frequency and phase. A second oscillation circuit receives a control signal and outputs a third clock signal having a frequency corresponding to the received control signal. A detection circuit detects a frequency difference between the second clock signal and the third clock signal. A determination circuit determines whether a frequency locked state is established between the first clock signal and the second clock signal. A control circuit varies the control signal, such that the frequency difference decreases while the frequency locked state has not been established and increases after the frequency locked state is established.
    Type: Grant
    Filed: February 27, 2023
    Date of Patent: May 7, 2024
    Assignee: Kioxia Corporation
    Inventor: Kiyohito Sato
  • Patent number: 11973466
    Abstract: The present invention is an electronic circuit used to increase voltage levels of electrical signals from sources having low voltage levels for any required application in an electrical system. While the focus is to increase voltage levels, current levels can also be optimized per application requirements. It is built by electronically cascading a clamper circuit or a part of clamper circuit to an oscillator circuit. The oscillator circuit generates an AC signal. The basic functionality of a clamper circuit is to raise DC level of an AC signal. With an oscillator circuit feeding an AC signal to the clamper circuit, multiple applications can be achieved economically. Said invention can be used for driving LEDs at low voltage levels, charge a capacitors to higher voltage levels than a voltage applied to it, low frequency signal amplifiers, low frequency signal generators, AM/FM modulators, etc.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: April 30, 2024
    Inventor: Swaresh Borse
  • Patent number: 11973465
    Abstract: An oscillator circuit is provided. The oscillator circuit includes a first oscillator, a second oscillator, and a switch matrix. The first oscillator includes a first transconductance amplifier, a second transconductance amplifier, and a first resonator. The second oscillator includes a third transconductance amplifier, a fourth transconductance amplifier, and a second resonator. The first resonator includes a first capacitor element and a first inductor element. The second resonator includes a second capacitor element and a second inductor element. The first inductor element is coupled to the second inductor element. The switch matrix includes a first switch, a second switch, a third switch, and a fourth switch.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: April 30, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Huancheng You
  • Patent number: 11962301
    Abstract: Technologies for low jitter and low power ring oscillators with multi-phase signal reassembly are described. A ring oscillator circuit includes a ring oscillator with a set of M delay stages, each stage outputs a phase signal, where M is a positive integer greater than one. The ring oscillator circuit includes a phase selector circuit coupled to the ring oscillator. The phase selector circuit can receive M phase signals from the ring oscillator and generate N phase signals based on the M phase signals, where N is a positive integer less than M.
    Type: Grant
    Filed: August 18, 2022
    Date of Patent: April 16, 2024
    Assignee: Nvidia Corporation
    Inventors: Chun-Ju Shen, Chien-Heng Wong, Ying Wei
  • Patent number: 11960247
    Abstract: According to some aspects of the present disclosure, an atomic clock and methods of forming and/or using an atomic clock are disclosed. In one embodiment, an atomic clock includes: a light source configured to illuminate a resonance vapor cell; a narrowband optical filter disposed between the light source and the resonance vapor cell and arranged such that light emitted from the light source passes through the narrowband optical filter and illuminates the resonance vapor cell. The resonance vapor cell is configured to emit a signal corresponding to a hyperfine transition frequency in response to illumination from the light source, and a filter cell is disposed between the light source and the resonance vapor cell and configured to generate optical pumping. An optical detector is configured to detect the emitted signal corresponding to the hyperfine transition frequency.
    Type: Grant
    Filed: May 15, 2023
    Date of Patent: April 16, 2024
    Assignee: The Regents of the University of Colorado, a body corporate
    Inventors: Svenja Knappe, Sean Krzyzewski
  • Patent number: 11955930
    Abstract: This disclosure relates to multi-phase oscillators for electronic systems. An example system includes multiple level translator circuits and a ring oscillator circuit that includes multiple outputs. Each level translator circuit includes a first input transistor, a second input transistor, and an output. The ring oscillator circuit includes multiple outputs, and each output of the ring oscillator has a different phase. An output of the ring oscillator is coupled to only one input transistor of a level translator circuit, and the other input transistor of the level translator circuit is coupled to an output of another level translator circuit.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: April 9, 2024
    Assignee: Analog Devices, Inc.
    Inventors: Eric A. Sagen, Dheemanth Prabhu Hejamady
  • Patent number: 11953676
    Abstract: A method of synchronizing a first oscillation about a first axis with a second oscillation about a second axis includes: generating a first position signal that indicates a position of the first oscillation about the first axis; generating a second position signal that indicates a position of the second oscillation about the first axis; determining a phase difference between the first and the second position signals; comparing the phase difference to a threshold value to generate a comparison result; generating a first reference signal having a first frequency and a second reference signal having a second frequency; synchronizing the first oscillation to the first frequency and synchronizing the second oscillation to the second frequency; monitoring the comparison result; and synchronously triggering a start of the first reference signal and the second reference signal responsive to the comparison result indicating that the phase difference is less than the threshold value.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: April 9, 2024
    Assignee: Infineon Technologies AG
    Inventors: Norbert Druml, Alberto Garcia Izquierdo
  • Patent number: 11949346
    Abstract: The present disclosure relates to an inverter apparatus, a control module of the inverter apparatus, and control methods thereof, and more particularly, to an inverter apparatus enabling stable voltage control using active damping, a control module of the inverter apparatus, and control methods thereof.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: April 2, 2024
    Assignee: HL MANDO CORPORATION
    Inventor: Bong Yeon Choi
  • Patent number: 11949380
    Abstract: A method of manufacturing an oscillator including housing a first resonator and a first integrated circuit device configured to oscillate the first resonator in a first container to manufacture the first oscillator, and housing a second resonator and a second integrated circuit device configured to oscillate the second resonator in a second container to manufacture the second oscillator, wherein the first integrated circuit device includes a first oscillation circuit configured to oscillate the first resonator to output a first oscillation signal, and no PLL circuit, the second integrated circuit device includes a second oscillation circuit configured to oscillate the second resonator to output a second oscillation signal, and a PLL circuit to which the second oscillation signal is input, and which is configured to output a third oscillation signal, and the first container and the second container are containers same in type.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: April 2, 2024
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Naoki Il, Yosuke Itasaka
  • Patent number: 11942929
    Abstract: Methods and devices to control PCM switches are disclosed. The described devices include PCM switch drivers and logic and control circuits, all integrated with the PCM and the associated heater on the same chip. Various architectures for the driver are also presented, including architectures implement feedback mechanism to mitigate variations from process, temperature, and supply voltage.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: March 26, 2024
    Assignee: PSEMI CORPORATION
    Inventors: Jeffrey A. Dykstra, Jaroslaw Adamski, Edward Nicholas Comfoltey
  • Patent number: 11942948
    Abstract: An apparatus for forming wideband pseudo random noise signals includes a set of channels each comprising an NCO having a controlled frequency and phase and a PRN code generator, the NCO generating a strobe that is output to the PRN code generator. The PRN code generator forms a new sequence element of +1 or ?1 in response to the strobe. The apparatus also comprises a first modulator having a plurality of weight coefficients, a plurality of multipliers each multiplying one of the weight coefficients, an adder outputting a sum of the plurality of multipliers output signals, and a mixer with a quadrature output signal multiplying the adder's output by sine and cosine of a low intermediate frequency. The apparatus also includes a processor controlling the set of channels, a transceiver module to receive and/or transmit quadrature signals, and an interface connecting the output of the mixer and the transceiver module.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: March 26, 2024
    Assignee: TOPCON POSITIONING SYSTEMS, INC.
    Inventors: Leonid Victorovich Purto, Sergey Sayarovich Bogoutdinov, Dmitry Anatolyevich Rubtsov
  • Patent number: 11934918
    Abstract: A method for quantum classification and operation control includes radiating a vacuum chamber having an ensemble of neutral atoms with laser so as to trap atoms and form a quantum register. The method further includes the step of configuring a laser controlling function with M unitary operations based on a cost function for classification problems and a training dataset about a monitored target, radiating the ensemble of atoms accordingly, reading the quantum register, and setting a quantum classifier if the cost function with the values of the quantum register meet a condition, keep changing the laser controlling function and radiating the ensemble of atoms otherwise until a convergence condition is met, at which point the quantum classifier is set.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: March 19, 2024
    Assignee: MULTIVERSE COMPUTING S.L.
    Inventors: Gianni Del Bimbo, Samuel Mugel, Román Orús
  • Patent number: 11936391
    Abstract: In some examples, a circuit includes a phase frequency detector (PFD) having a first input, a second input, and an output. The circuit also includes a control circuit having an input and an output, the control circuit input coupled to the output of the PFD. The circuit also includes a modulation circuit having an input and an output, the modulation circuit input coupled to the output of the control circuit. The circuit also includes an oscillator having an oscillator input and an oscillator output, the oscillator input coupled to the output of the modulation circuit and the output of the oscillator coupled to the second input of the PFD.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: March 19, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Ruediger Kuhn, Maciej Jankowski
  • Patent number: 11929710
    Abstract: An oscillator includes a resonator, an oscillation circuit, and first and temperature compensation circuits. The first temperature compensation circuit performs a first-order first temperature compensation processing in a first mode and performs the first-order first temperature compensation processing and a high-order first temperature compensation processing in a second mode for a frequency of a first clock signal generated by oscillation of the resonator by the oscillation circuit. The second temperature compensation circuit receives the first clock signal and outputs a second clock signal subjected to a high-order second temperature compensation processing based on the first clock signal.
    Type: Grant
    Filed: December 22, 2022
    Date of Patent: March 12, 2024
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Yosuke Itasaka
  • Patent number: 11923804
    Abstract: A temperature insensitive oscillator system. The system includes a substrate having a first surface and an opposing second surface, a CMOS device with one or more CMOS circuits attached to the first surface of the substrate, one or more piezoelectric transducers attached to an outer surface of the CMOS device, a voltage-controlled oscillator generating a RF frequency, which is transmitted as a plurality of short pulses to the one or more piezoelectric transducers, and one or more delays and oscillators using resistor and active components arranged alongside the piezoelectric transducers or on the CMOS device such that the voltage-controlled oscillator has minimal dependence on temperature, and has minimal deviation from a programmed frequency.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: March 5, 2024
    Assignee: Geegah, LLC
    Inventors: Amit Lal, Justin Kuo
  • Patent number: 11916350
    Abstract: A multi-quantum-reference (MQR) laser frequency stabilization system includes a laser system, an MQR system, and a controller. The laser system provides an output beam with an output frequency, and plural feedback beams with respective feedback frequencies. The feedback beams are directed to the MQR system which includes plural references, each including a respective population of quantum particles, e.g., rubidium 87 atoms, with respective resonant frequencies for respective quantum transitions. The degree to which the feedback frequencies match or deviate from the resonance frequencies can be tracked using fluorescence or other electro-magnetic radiation output from the references. The controller can stabilize the laser system output frequency based on plural reference outputs to achieve both short-term and long-term stability, e.g., in the context of an atomic clock.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: February 27, 2024
    Assignee: ColdQuanta, Inc.
    Inventors: Judith Olson, Gabriel Ycas
  • Patent number: 11914777
    Abstract: Integrated systems for force or strain sensing and haptic feedback are described herein. An example force-haptic system can include a sensor chip configured to receive an applied force, where the sensor chip includes at least one sensing element and an integrated circuit. The force-haptic system can also include a haptic actuator configured to convert an electrical excitation signal into mechanical vibration. Further, the force-haptic system can include a circuit board, where the sensor chip and the haptic actuator are electrically and mechanically coupled to the circuit board. The integrated circuit can be configured to process an electrical signal received from the at least one sensing element and to output the electrical excitation signal.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: February 27, 2024
    Assignee: NextInput, Inc.
    Inventors: Julius Minglin Tsai, Albert Bergemont, Christopher Edwards, Ali Foughi
  • Patent number: 11916056
    Abstract: A semiconductor integrated circuit device includes a standard cell having a plurality of height regions. A plurality of partial circuits having an identical function and each operating in response to common signals S and NS are arranged in any one of the height regions. A metal interconnect forming part of a supply path for the common signal S is arranged in the height region so as to be connected to the partial circuits, and a metal interconnect forming part of a supply path for the common signal S is arranged in the height region so as to be connected to the partial circuits.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: February 27, 2024
    Assignee: SOCIONEXT INC.
    Inventor: Junji Iwahori
  • Patent number: 11909392
    Abstract: Methods, systems, and apparatus for producing CCZ states and T states. In one aspect, a method for distilling a CCZ state includes preparing multiple target qubits, ancilla qubits and stabilizer qubits in a zero state, performing an X gate for each stabilizer qubit on multiple ancilla qubits or multiple ancilla qubits and one of the target qubits using the stabilizer qubit as a control, measuring the stabilizer qubits, performing, on each of the ancilla qubits, a Z1/4 gate and a Hadamard gate, measuring each of the ancilla qubits, performing, conditioned on each measured ancilla qubit state, a NOT operation on a selected stabilizer qubit, or a NOT operation on the selected stabilizer qubit and a Z gate on one or more respective target qubits, performing, on each target qubit and conditioned on a measured state of a respective stabilizer qubit, a Z gate on the target qubit, and performing an X gate on each of the target qubits.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: February 20, 2024
    Assignee: Google LLC
    Inventors: Craig Gidney, Austin Greig Fowler