Abstract: The embodiment of the application provides a method of manufacturing a semiconductor structure, which comprises the following steps: forming a target layer, a first mask layer, an isolation layer and an intermediate layer sequentially on a substrate, wherein first trench is disposed in the intermediate layer in the first region and second trench is disposed in the intermediate layer in the second region; forming a fill layer, and the difference in the height between the top surface of the fill layer in the first region and in the second region is less than or equal to a first preset value; removing a portion of the fill layer in the first region until the top surface of the sacrificial layer is exposed; removing the sacrificial layer; and etching a portion of the target layer through the first opening, wherein the remaining target layer forms a target pattern.

Abstract: Provided is a magnetoresistance effect element that suppresses re-adhesion of impurities during preparation and allows a write current to easily flow. The magnetoresistance effect element includes a first ferromagnetic layer, a second ferromagnetic layer; and a nonmagnetic layer interposed between the first ferromagnetic layer and the second ferromagnetic layer. In the magnetoresistance effect element, the nonmagnetic layer is a tunnel barrier layer constituted by an insulator, a side surface of the first ferromagnetic layer, a side surface of the second ferromagnetic layer and a side surface of the nonmagnetic layer form a continuous inclined surface in any side surface, and a thickness of inside the nonmagnetic layer is thicker than a thickness of outside the nonmagnetic layer.

Abstract: A semiconductor device including a fin structure formed on a first semiconductor region, and a first semiconductor structure controlling the first semiconductor region, the first semiconductor structure formed on a substrate and spaced apart from the first semiconductor region including the fin structure.

Abstract: Methods for forming a laminate film on substrate by a plasma-enhanced cyclical deposition process are provided. The methods may include: providing a substrate into a reaction chamber, and depositing on substrate a metal oxide laminate film by alternatingly depositing a first metal oxide film and a second metal oxide film different from the first metal oxide film, wherein depositing the first metal oxide film and the second metal oxide film comprises, contacting the substrate with sequential and alternating pulses of a metal precursor and an oxygen reactive species generated by applying RF power to a reactant gas comprising at least nitrous oxide (N2O).

Abstract: The present disclosure discloses a passivation layer and a preparation method thereof, a flexible thin film transistor and a preparation method thereof, and an array substrate. The passivation layer of the present disclosure is a self-assembled monolayer formed by hydrophobic substances with a melting point of less than 100° C. The flexible thin film transistor of the present disclosure comprises a flexible substrate, a gate electrode, a gate dielectric layer, an active layer, a source-drain electrode layer and the passivation layer of the present disclosure.

Abstract: The present disclosure provides a processing method for semiconductor surface defects and a preparation method for semiconductor devices. The processing method for semiconductor surface defects includes: placing a semiconductor device in a plasma processing device, the semiconductor device comprising a semiconductor substrate and deposition layers formed on the surface of the semiconductor substrate, bubbles being formed in the deposition layers; and plasma bombarding the surface of the deposition layer to break the bubbles, so that the surface of the deposition layer is flat.

Abstract: Methods and related systems for filling a gap feature comprised in a substrate are disclosed. The methods comprise a step of providing a substrate comprising one or more gap features into a reaction chamber. The one or more gap features comprise an upper part comprising an upper surface and a lower part comprising a lower surface. The methods further comprise a step of subjecting the substrate to a plasma treatment. Thus, the upper surface is inhibited while leaving the lower surface substantially unaffected. Then, the methods comprise a step of selectively depositing a silicon-containing material on the lower surface.

Abstract: A first layer that includes a metal seed layer, a refractive seed or a refractive dopant is formed on a dielectric substrate. A peg of a near-field transducer is formed on the first layer such that a first surface of the peg is formed on and is in contact with the metal seed. An adhesive layer is formed over the peg using atomic layer deposition. The adhesive layer includes alumina and is 4 nm or less in thickness. A silicon dioxide overcoat is deposited over the adhesive layer. The alumina bonds the silicon dioxide to the peg.

Abstract: The embodiments described herein are directed to a method for mitigating the fringing capacitances generated by patterned gate structures. The method includes forming a gate structure on fin structures disposed on a substrate; forming an opening in the gate structure to divide the gate structure into a first section and a second section, where the first and second sections are spaced apart by the opening. The method also includes forming a fill structure in the opening, where forming the fill structure includes depositing a silicon nitride liner in the opening to cover sidewall surfaces of the opening and depositing silicon oxide on the silicon nitride liner.

Abstract: A method for forming a semiconductor structure includes the following steps: providing a substrate having a trench in a surface; forming an isolation layer on the surface of the substrate, the isolation layer covering a side wall and a bottom wall of the trench; pretreating the isolation layer such that an initial oxide layer is formed on a surface of the isolation layer; forming an advanced oxide layer on a surface of the initial oxide layer with an atomic layer deposition process; and forming a dielectric layer on a surface of the advanced oxide layer with a spin-on dielectrics (SOD) process such that the dielectric layer fills the trench.

Abstract: Methods and techniques for deposition of amorphous carbon films on a substrate are provided. In one example, the method includes depositing an amorphous carbon film on an underlayer positioned on a susceptor in a first processing region. The method further includes implanting a dopant or the inert species into the amorphous carbon film in a second processing region. The implant species, energy, dose & temperature in some combination may be used to enhance the hardmask hardness. The method further includes patterning the doped amorphous carbon film. The method further includes etching the underlayer.

Abstract: Described herein are methods and apparatuses for filling semiconductor substrate structures with conductive material. The methods involve depositing multi-layer bulk metal films in structures with one or more deposition conditions changed when transitioning from layer-to-layer. The methods result in high fill quality, high throughput, low precursor consumption, and low roughness. Multi-station chambers to perform the methods are also provided.

Abstract: The embodiments described herein are directed to a method for mitigating the fringing capacitances generated by patterned gate structures. The method includes forming a gate structure on fin structures disposed on a substrate; forming an opening in the gate structure to divide the gate structure into a first section and a second section, where the first and second sections are spaced apart by the opening. The method also includes forming a fill structure in the opening, where forming the fill structure includes depositing a silicon nitride liner in the opening to cover sidewall surfaces of the opening and depositing silicon oxide on the silicon nitride liner.

Abstract: Provided are a substrate processing method and a substrate processing apparatus for forming a low-resistance metal-containing nitride film. The substrate processing method includes: a step of providing a substrate in a processing container; a step of forming a metal-containing nitride film on the substrate by repeating supplying an organic metal-containing gas and a nitrogen-containing gas alternately for a first predetermined number of cycles; a step of modifying the metal-containing nitride film by generating plasma in the processing container; and a step of repeating the step of forming the metal-containing nitride film and the step of modifying the metal-containing nitride film for a second predetermined number of cycles.

Abstract: A method of forming an integrated circuit structure includes forming a first source/drain contact plug over and electrically coupling to a source/drain region of a transistor, forming a first dielectric hard mask overlapping a gate stack, recessing the first source/drain contact plug to form a first recess, forming a second dielectric hard mask in the first recess, recessing an inter-layer dielectric layer to form a second recess, and forming a third dielectric hard mask in the second recess. The third dielectric hard mask contacts both the first dielectric hard mask and the second dielectric hard mask.

Abstract: A method for improving a bias temperature instability of a SiO2 layer comprises exposing the SiO2 layer to atomic hydrogen.

Abstract: Effective use is achieved of a region in a proximity of a joining plane of semiconductor substrates in a semiconductor device including a stacked semiconductor substrate in which multilayer wiring layers of a plurality of semiconductor substrates are electrically connected to each other. The stacked semiconductor substrate includes plural semiconductor substrates on each of which a multilayer wiring layer is formed. In this stacked semiconductor substrate, the multilayer wiring layers are joined together and electrically connected to each other. In the proximity of a joining plane of the plurality of semiconductor substrates, a conductor is formed. This conductor is formed such that it is electrified in a direction of the joining plane.

Abstract: Provided is a pixel defining layer of an organic light-emitting diode display panel. The pixel defining layer includes: an insulating transparent cladding layer; and a reflecting layer in the transparent cladding layer, wherein the reflecting layer is configured to reflect light emitted from a light-emitting layer of the organic light-emitting diode display panel. Organic light-emitting diode display panels and methods for manufacturing an organic light-emitting diode display panel are also provided.

Abstract: This disclosure describes a micromechanical device comprising a first device part and a second device part. One of the first and second device parts is a mobile rotor and the other of the first and second device parts is a fixed stator. The micromechanical device further comprises a motion limiter which extends from the first device part to the second device part. The motion limiter comprises an elongated lever, and the motion limiter is configured to bring a stopper into contact with a counter-structure by rotating the elongated lever.

Abstract: The present invention provides a product with incorporated operation display panel that further improves visibility at the time of light emission. The product with incorporated operation display panel includes a transparent conductive sheet, a display panel with a touch sensor furnished at least with light emitting elements consisting of light emitting elements arranged in two dimensions and being the product with incorporated operation display panel furnished with a thin layer that covers the total or a part of the front surface of a display panel, and a transparent substrate that forms a light guiding path is disposed at an opening between a transparent conductive sheet and a thin layer, or at an opening between a transparent conductive sheet and a light emitting device array substrate. The transparent base has micropores provided in a resin base material made of a transparent resin, and the micropores are formed by a lattice-like louver.