Patents Examined by Asok K. Sarkar
  • Patent number: 11732354
    Abstract: A layer forming method according to one embodiment of the present invention contains a source gas dosing/pressurizing step of dosing a source gas into a chamber having a substrate loaded therein in a state in which the outlet of the chamber is closed, thereby increasing the pressure in the chamber and adsorbing the source gas onto the substrate; a first main purging step of purging the chamber, after the source gas dosing/pressurizing step; a reactive gas dosing step of dosing a reactive gas into the chamber, after the first main purging step; and a second main purging step of purging the chamber, after the reactive gas dosing step.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: August 22, 2023
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Myung Mo Sung, Jinwon Jung, Jin Seon Park
  • Patent number: 11728165
    Abstract: There is included (a) forming a first film containing at least oxygen and carbon and having a concentration of carbon, which is 20 at % or more, on a substrate by supplying a film-forming gas to the substrate at a first temperature; and (b) modifying the first film into a second film by supplying an oxygen- and hydrogen-containing gas to the substrate on which the first film is formed, at a second temperature that is equal to or higher than the first temperature.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: August 15, 2023
    Assignee: KOKUSAI ELECTRIC CORPORATION
    Inventors: Hiroki Yamashita, Yoshitomo Hashimoto
  • Patent number: 11728219
    Abstract: A method for fabricating a semiconductor device includes forming a fin extending along a first direction on a semiconductor substrate and forming a sacrificial gate electrode structure extending along a second direction substantially perpendicular to the first direction over the fin. The sacrificial gate electrode structure comprises a sacrificial gate dielectric layer and a sacrificial gate electrode layer disposed over the sacrificial gate dielectric layer. Opposing gate sidewall spacers are formed extending along the second direction, on opposing sides of the sacrificial gate electrode layer. The sacrificial gate electrode layer is removed to form a gate space. Fluorine is implanted into the gate sidewall spacers after removing the gate electrode layer by performing a first fluorine implantation. The sacrificial gate dielectric layer is removed and a high-k gate dielectric layer is formed in the gate space.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsan-Chun Wang, Chun-Feng Nieh, Chiao-Ting Tai
  • Patent number: 11728160
    Abstract: A method of forming an oxide film including two non-oxygen elements includes providing a first source material on a substrate, the first source material including a first central element, providing an electron donor compound to be bonded to the first source material, providing a second source material on the substrate after the providing of the electron donor compound, the second source material including a second central element, and providing an oxidant on the substrate.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: August 15, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Younsoo Kim, Haeryong Kim, Seungmin Ryu, Sunmin Moon, Jeonggyu Song, Changsu Woo, Kyooho Jung, Younjoung Cho
  • Patent number: 11728162
    Abstract: There is provided a technique that includes: forming an oxide film having a predetermined thickness on a surface of a substrate by performing a cycle a plurality of times, the cycle including non-simultaneously performing: (a) forming a nitride film by supplying a film-forming gas to the substrate; and (b) oxidizing and changing the nitride film into a first oxide film by supplying an oxidizing gas to the substrate, wherein a maximum distance from an interface between the nitride film formed in (a) and a base of the nitride film to a surface of the nitride film is set to 2 nm or more and 4 nm or less.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: August 15, 2023
    Assignee: KOKUSAI ELECTRIC CORPORATION
    Inventors: Tsukasa Kamakura, Kiyohisa Ishibashi, Ryota Kataoka
  • Patent number: 11721545
    Abstract: Embodiments of the present disclosure generally relate to methods of depositing carbon film layers greater than 3,000 ? in thickness over a substrate and surface of a lid of a chamber using dual frequency, top, sidewall and bottom sources. The method includes introducing a gas to a processing volume of a chamber. A first radiofrequency (RF) power is provided having a first frequency of about 40 MHz or greater to a lid of the chamber. A second RF power is provided having a second frequency to a bias electrode disposed in a substrate support within the processing volume. The second frequency is about 10 MHz to about 40 MHz. An additional third RF power is provided having lower frequency of about 400 kHz to about 2 MHz to the bias electrode.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: August 8, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Anup Kumar Singh, Rick Kustra, Vinayak Vishwanath Hassan, Bhaskar Kumar, Krishna Nittala, Pramit Manna, Kaushik Comandoor Alayavalli, Ganesh Balasubramanian
  • Patent number: 11713507
    Abstract: Methods for plasma enhanced atomic layer deposition (PEALD) of low-? films are described. A method of depositing a film comprises exposing a substrate to a silicon precursor having the general formula (I) wherein R1, R2, R3, R4, R5, and R6 are independently selected from hydrogen (H), substituted alkyl, or unsubstituted alkyl; purging the processing chamber of the silicon precursor; exposing the substrate to a carbon monoxide (CO) plasma to form one or more of a silicon oxycarbide (SiOC) or silicon oxycarbonitride (SiOCN) film on the substrate; and purging the processing chamber.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: August 1, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Shuaidi Zhang, Ning Li, Mihaela A. Balseanu
  • Patent number: 11710631
    Abstract: Exemplary semiconductor processing methods may include flowing deposition gases that may include a nitrogen-containing precursor, a silicon-containing precursor, and a carrier gas, into a substrate processing region of a substrate processing chamber. The flow rate ratio of the nitrogen-containing precursor to the silicon-containing precursor may be greater than or about 1:1. The methods may further include generating a deposition plasma from the deposition gases to form a silicon-and-nitrogen containing layer on a substrate in the substrate processing chamber. The silicon-and-nitrogen-containing layer may be treated with a treatment plasma, where the treatment plasma is formed from the carrier gas without the silicon-containing precursor. The flow rate of the carrier gas in the treatment plasma may be greater than a flow rate of the carrier gas in the deposition plasma.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: July 25, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Michael Wenyoung Tsiang, Yichuen Lin, Kevin Hsiao, Hang Yu, Deenesh Padhi, Yijun Liu, Li-Qun Xia
  • Patent number: 11699623
    Abstract: Embodiments of the present technology may include semiconductor processing methods that include depositing a film of semiconductor material on a substrate in a substrate processing chamber. The deposited film may be sampled for defects at greater than or about two non-contiguous regions of the substrate with scanning electron microscopy. The defects that are detected and characterized may include those of a size less than or about 10 nm. The methods may further include calculating a total number of defects in the deposited film based on the sampling for defects in the greater than or about two non-contiguous regions of the substrate. At least one deposition parameter may be adjusted as a result of the calculation. The adjustment to the at least one deposition parameter may reduce the total number of defects in a deposition of the film of semiconductor material.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: July 11, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Mandar B. Pandit, Man-Ping Cai, Wenhui Li, Michael Wenyoung Tsiang, Praket Prakash Jha, Jingmin Leng
  • Patent number: 11699585
    Abstract: Embodiments of the present disclosure generally relate to methods of forming hardmasks. Embodiments described herein enable, e.g., formation of carbon-containing hardmasks having reduced film stress. In an embodiment, a method of processing a substrate is provided. The method includes positioning a substrate in a processing volume of a processing chamber and depositing a diamond-like carbon (DLC) layer on the substrate. After depositing the DLC layer, the film stress is reduced by performing a plasma treatment, wherein the plasma treatment comprises applying a radio frequency (RF) bias power of about 100 W to about 10,000 W.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: July 11, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jui-Yuan Hsu, Pramit Manna, Bhaskar Kumar, Karthik Janakiraman
  • Patent number: 11699628
    Abstract: Embodiments of the present disclosure generally relate to nitrogen-rich silicon nitride and methods for depositing the same, and transistors and other devices containing the same. In one or more embodiments, methods for depositing silicon nitride materials are provided and include heating a workpiece to a temperature of about 200° C. to about 250° C., exposing the workpiece to a deposition gas during a plasma-enhanced chemical vapor deposition process, and depositing a nitrogen-rich silicon nitride layer on the workpiece. The deposition gas contains a silicon precursor, a nitrogen precursor, and a carrier gas. A molar ratio of the silicon precursor to the nitrogen precursor to the carrier gas within the deposition gas is about 1:a range from about 4 to about 8:a range from about 20 to about 80, respectively.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: July 11, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Rodney S. Lim, Jung Bae Kim, Jiarui Wang, Yi Cui, Dong Kil Yim, Soo Young Choi
  • Patent number: 11664214
    Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the embodiments described herein provide techniques for depositing nitrogen-doped diamond-like carbon films for patterning applications. In one or more embodiments, a method for processing a substrate includes flowing a deposition gas containing a hydrocarbon compound and a nitrogen dopant compound into a processing volume of a process chamber having a substrate positioned on an electrostatic chuck, and generating a plasma at or above the substrate by applying a first RF bias to the electrostatic chuck to deposit a nitrogen-doped diamond-like carbon film on the substrate. The nitrogen-doped diamond-like carbon film has a density of greater than 1.5 g/cc and a compressive stress of about ?20 MPa to less than ?600 MPa.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: May 30, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jui-Yuan Hsu, Pramit Manna, Karthik Janakiraman
  • Patent number: 11664215
    Abstract: Methods for depositing a metal containing material formed on a certain material of a substrate using an atomic layer deposition process for semiconductor applications are provided. In one example, a method of forming a metal containing material on a substrate comprises pulsing a first gas precursor comprising a metal containing precursor to a surface of a substrate, pulsing a second gas precursor comprising a carboxylic acid to the surface of the substrate, and forming a metal containing material selectively on a first material of the substrate. In another example, a method of forming a metal containing material on a substrate includes selectively forming a metal containing layer on a silicon material or a metal material on a substrate than on an insulating material on the substrate by an atomic layer deposition process by alternatively supplying a metal containing precursor and a water free precursor to the substrate.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: May 30, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Christopher Ahles, Jong Choi, Andrew C. Kummel, Keith Tatseun Wong, Srinivas D. Nemani
  • Patent number: 11664226
    Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the embodiments described herein provide methods for producing reduced-stress diamond-like carbon films for patterning applications. In one or more embodiments, a method includes flowing a deposition gas containing a hydrocarbon compound into a processing volume of a process chamber having a substrate positioned on an electrostatic chuck and generating a plasma above the substrate in the processing volume by applying a first RF bias to the electrostatic chuck to deposit a stressed diamond-like carbon film on the substrate. The stressed diamond-like carbon film has a compressive stress of ?500 MPa or greater. The method further includes heating the stressed diamond-like carbon film to produce a reduced-stress diamond-like carbon film during a thermal annealing process. The reduced-stress diamond-like carbon film has a compressive stress of less than ?500 MPa.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: May 30, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jui-Yuan Hsu, Pramit Manna, Karthik Janakiraman
  • Patent number: 11658026
    Abstract: Methods for depositing a silicon-containing film on a substrate are described. The method comprises heating a processing chamber to a temperature greater than or equal to 200° C.; maintaining the processing chamber at a pressure of less than or equal to 300 Torr; coflowing a silicon precursor and nitrous oxide (N2O) into the processing chamber, and depositing a conformal silicon-containing film on the substrate. The silicon-containing film has dielectric constant (k-value) in a range of from about 3.8 to about 4.0, has a breakdown voltage of greater than 8 MV/cm at a leakage current of 1 mA/cm2 and has a leakage current of less than 1 nA/cm2 at 2 MV/cm.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: May 23, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick
  • Patent number: 11658025
    Abstract: Chalcogen silane precursors are described. Methods for depositing a silicon nitride (SixNy) film on a substrate are described. The substrate is exposed to the chalcogen silane and a reactant to deposit the silicon nitride (SixNy) film. The exposures can be sequential or simultaneous. The chalcogen silane may be substantially free of halogen. The chalcogen may be selected from the group consisting of sulfur (S), selenium (Se), and tellurium (Te).
    Type: Grant
    Filed: January 18, 2021
    Date of Patent: May 23, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Chandan Kr Barik, Michael Haverty, Muthukumar Kaliappan, Cong Trinh, Bhaskar Jyoti Bhuyan, John Sudijono, Anil Kumar Tummanapelli, Richard Ming Wah Wong, Yingqian Chen
  • Patent number: 11646201
    Abstract: A method for preparation of orientation-patterned (OP) templates comprising the steps of: depositing a first layer of a first material on a common substrate by a far-from-equilibrium process; and depositing a first layer of a second material on the first layer of the first material by a close-to-equilibrium process, wherein a first assembly is formed. The first material and the second material may be the same material or different materials. The substrate material may be Al2O3 (sapphire), silicon (Si), germanium (Ge), GaAs, GaP, GaSb, InAs, InP, CdTe, CdS, CdSe, or GaSe. The first material deposited on the common substrate may be one or more electronic or optical binary materials from the group consisting of AlN, GaN, GaP, InP, GaAs, InAs, AlAs, ZnSe, GaSe, ZnTe, CdTe, HgTe, GaSb, SiC, CdS, CdSe, or their ternaries or quaternaries. The far-from-equilibrium process is one of MOCVD and MBE, and the close-to-equilibrium process is HVPE.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: May 9, 2023
    Assignee: United States of America as represented by the Secretary of the Air Force
    Inventors: Vladimir Tassev, Shivashankar Vangala, David H Tomich
  • Patent number: 11646206
    Abstract: Described are methods for forming a multilayer conductive structure for semiconductor devices. A seed layer is formed comprising a metal and an additional constituent that in combination with the metal inhibits nucleation of a fill layer of the metal formed over the seed layer. Tungsten may be doped or alloyed with silicon to form the seed layer, with a tungsten fill being formed over the seed layer.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: May 9, 2023
    Assignee: Micron Technology, Inc.
    Inventors: David Ross Economy, Brian Beatty, John Mark Meldrim, Yongjun Jeff Hu, Jordan D. Greenlee
  • Patent number: 11646195
    Abstract: The present application discloses a method for fabricating the semiconductor device including providing a substrate in a reaction chamber, forming an untreated silicon nitride film on the substrate, and forming a treated silicon nitride film on the untreated silicon nitride film. Forming the untreated silicon nitride film includes the steps of: (a) supplying a first silicon precursor into the reaction chamber, thereby allowing chemical species from the first silicon precursor to be adsorbed on the substrate, and (b) supplying a first nitrogen precursor into the reaction chamber, thereby nitriding the chemical species to deposit resultant silicon nitride. The step (a) and the step (b) are sequentially and repeatedly performed to form the untreated silicon nitride film.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: May 9, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Shih-En Lin, Wei-Zeng Wu, Wei-Lun Zeng, Wen-Chieh Wu
  • Patent number: 11647665
    Abstract: A method of manufacturing a flexible display device includes forming a graphene adhesive layer on a carrier substrate, forming a flexible substrate on the graphene adhesive layer, forming a first barrier layer on the flexible substrate, forming a display element part on the first barrier layer, forming a protective film on the display element part, separating the flexible substrate from the carrier substrate, removing a remaining portion of the graphene adhesive layer from a surface of the flexible substrate, and forming a second barrier layer on the surface of the flexible substrate, after removing the remaining portion of the graphene adhesive layer from the surface of the flexible substrate.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: May 9, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Heekyun Shin, Taewook Kang, Seungjun Moon, Woojin Cho, Jeongmin Park