Abstract: A method for preventing contamination caused by residues of etched off patterns etched by photolithographic etching. A considerable amount of small contamination spots on a semiconductor chip are found to be caused by tiny residues of etched off patterns. These residues are formed primarily around the periphery of device areas and mark patterns when their outsides are etched off. The occurence of such residues of etching is increased by anisotropic etching. These residues are dislodged by succeeding steps of the pattern making process, and disperse over the substrate causing small contamination spots. To avoid the detrimental effects of the etching residues, the edges of the mark patterns and device areas are covered with an edge cover which is formed in a step to following the pattern etching process.

Abstract: A process for obtaining a multifunctional, ion-selective-membrane sensor is disclosed, which process comprises the following steps:a) preparation of a siloxanic prepolymer, followed by one or more deposition(s) of said siloxanic prepolymer on a device of MOS or ISFET type;b) preparation of a solution containing an ionophore, a monomer of a polymerisable olefin, 2,4-toluenediisocyanate and a dialcohol or a diamine or a glycol or a trialcohol or a triamine, which preparation is followed, after that said solution has been kept stirred for at least 48 hours at room temperature, by the deposition thereof on the siloxanic prepolymer, which deposition is carried out by means of a spinner;c) photochemical treatment in the presence of a photoinitiator by means of UV light, with a suitable mask being used, which allows the exposure to UV light to take place on one gate only;d) chemical washing of the sensor, by means of an organic solvent;e) thermal treatment ("thermal curing"), so as to complete the reactions of polym

Abstract: A semiconductor device producing method wherein a patterned transparent electrode, a patterned amorphous silicon semiconductor layer and a patterned backside electrode are formed on a substrate sequentially in this order, and the patterning of at least one of the amorphous silicon semiconductor layer and the backside electrode is carried out in a step of forming at least one of the amorphous silicon semiconductor layer and the backside electrode with a wire mask being brought into substantially close contact with a surface subjected to film forming and a step of removing a thin film formed at a region between the wire mask and the surface subjected to film forming in the forming step; and a film forming apparatus used in the producing method comprising a holder which holds a substrate having a surface subjected to film forming, a mechanism for fixing and positioning the substrate on the holder and a plurality of wires which are disposed on the film forming surface side of the substrate and are to be brought i

Abstract: In a method for treating the surface of either crystalline or amorphous silicon a silicon material is maintained in a non-oxidizing atmosphere with a reduced pressure, a gas selected from among hydrides of phosphorus, fluorides of phosphorus, hydrides of arsenic, fluorides of arsenic, hydrides of boron, fluorides of boron and fluorides of silicon is excited and the excited gas is supplied onto the surface of the silicon material for a prescribed period of time. During this period the temperature of the silicon material is maintained within a range higher than the temperature at which the molecules of the selected gas would, were the gas not excited, liquefy at the reduced pressure and deposit on the material and lower than the temperature at which the gas decomposes. The method enables the silicon material surface to be cleaned and/or protected by treatment at a relatively low temperature.

Abstract: There is disclosed a method of manufacturing a semiconductor device comprising the steps of: forming a semiconductor element on one of major surfaces of a GaAs substrate; a grinding the substrate to make the GaAs substrate to a predetermined thickness by grinding the other surface of the GaAs substrate with a grinding stone having an average grain size of 6 micro-meters or larger; and an chemical etching the other surface of the substrate by 0.6 micro-meters or more just after the grinding step, without any further grinding treatment done on the other surface, just after the grinding step.

Abstract: A reactant gas is fed to a dispersing chamber which is disposed under a reaction chamber, and both disposed within a vacuum chamber. The reactant gas is dispersed and then fed through a plurality of communicating holes to the reaction chamber. A second reactant gas is fed to a lower dispersing chamber. After dispersion, this second gas is fed through pipes through the first dispersing chamber and into the reaction chamber around the first reaction gas. Said first reactant gas is blown off downward from the end opening of the feeding pipe and dispersed in parallel along the collar portion and dispersed homogeneously in the first reactant gas dispersing chamber, and in the state, is introduced to the reaction chamber via communicating holes.

Abstract: Si.sub.2 H.sub.6 and PH.sub.3 are introduced into a heated reaction tube in which a plurality of substrates are contained under vacuum pressure, thereby forming phosphor-doped silicon films on the substrates. By changing the flow of Si.sub.2 H.sub.6, a first layer consisting of a silicon film containing phosphor of low density, a second layer substantially consisting of phosphor, and a third layer consisting of substantially the same composition as that of the first layer are deposited in the order mentioned. Thereafter, the first through third layers are heated, thereby diffusing phosphor contained in the second layer. Thus, an integral film of uniform impurity density is formed from the first through third layers.

Abstract: A diamond n-type semiconductor including a substrate and a phosphorus element-doped diamond thin film disposed on the substrate. The diamond thin film is deposited by vaporizing a solution comprising a liquid organic compound as the diamond material with diphosphorus pentoxide (P.sub.2 O.sub.5) dissolved therein, and subjecting the resultant gas to a hot filament CVD method.

Abstract: A bipolar hetero-junction transistor has an emitter formed which consists of doped and hydrogenated semiconductor material which is at least partly in amorphous form. A high current gain (.beta.) is obtained due to the wide bandgap in the emitter material. Preferably, the layer forming the emitter consists of microcrystalline silicon which is doped and hydrogenated. This yields a small base resistance which is preferable for high frequency purposes. The amorphous bipolar hetero-junction transistor can be produced by a CVD-technique, by using a plasma or by photodissociation. The transistor having a microcrystalline emitter layer can be produced by one of the above methods or by heating an amorphous emitter layer.

Abstract: An antireflection coating (21) for use in integrated circuit processing consists of a film of tungsten silicide (WSi.sub.0.45) or tungsten silicon nitride (WSiN). These coatings are preferably made by sputtering, with the tungsten silicon nitride coating being made by sputtering in a nitrogen-containing atmosphere.

Abstract: The present invention relates to a method for polishing a silicon wafer. The method comprises the steps of: (a) supplying a polishing fluid to a polishing surface, the polishing fluid including an alkaline fluid and polishing particles of high-purity silica dispersed in the alkaline fluid, the polishing surface being planar; (b) bringing a silicon wafer in contact with the polishing surface; and (c) moving at least one of the silicon wafer and the polishing surface relative to the other, thereby polishing the silicon wafer. The method is characterized by the following: the polishing surface is made of a ceramic material harder than the silicon wafer and more resistant to mechanochemical polishing than silicon, and the maximum roughness of the ceramic is less than 0.02 .mu.m.

Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for provessing a semiconductor device is shown. According to the invention, gaps produced in fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes. By virtue of this configuration, short current paths do not result even if transparent electrode is provided on the semiconductor layer.

Abstract: In plasma enhanced chemical vapor deposition (PECVD) of silicon dioxide on a substrate, voids and discontinuities are reduced by first depositing silicon dioxide in a sputter each chamber (22) in which a magnetic field is produced within the rf plasma for depositing the silicon dioxide. Simultaneous sputter etch and deposition occurs which inhibits net deposition at the corners of metal conductors over which the silicon dioxide is deposited. The substrate is then removed and transferred through a load lock (27) to a conventional PECVD deposition chamber (23).

Abstract: A method of manufacturing a semiconductor device in which a portion of a monocrystalline silicon layer protruded from a surface of an insulating member is polished up to the surface by a chemical-mechanical polishing is disclosed. A polycrystalline silicon layer and a leveling material are formed in sequence on the protruded portion of the monocrystalline silicon layer and on an exposed part of the surface of the insulating member, and a reactive ion etching and the chemical-mechanical polishing are carried out.

Abstract: Method and apparatus are disclosed for depositing a uniform layer of material, such as titanium dioxide, on the surface of an object, such as a silicon sphere of a solar array (7). Component gases are injected at predetermined rates into a heated reaction chamber (5) where they react. Because of the reaction rate and injection velocities of the gases, the reaction is substantially completed at a calculated location inside the reaction chamber (5). The object which is to receive the layer, such as the solar array (7), is placed at the calculated location in the reaction chamber (5). The platform (68) to which the solar array (7) is attached is simultaneously tilted and rotated such that all areas of the surface of the array (7) are uniformly exposed to the titanium dioxide reactant.

Abstract: The sensor comprises a chip of a semiconductor material wherein a field-effect transistor is formed the drain and source regions whereof are provided on a first face of the chip, onto which an ion-selective membrane is applied which is coupled to said field-effect transistor.The membrane covers said first face of the chip completely, and terminals are provided in addition which comprise conductive elements applied to the other face of the chip and being connected to said drain and source regions by connections which extend through the chip.These connections are formed by a method providing for the formation in the chip of buried layers of semiconductor material.

Abstract: A method and apparatus are disclosed for removing one or more materials deposited on the backside and end edges of a semiconductor wafer which comprises urging the front side of the wafer against a faceplate in a vacuum chamber; flowing one or more gases through a space maintained between the front side of the wafer and the faceplate; and forming a plasma in a gap maintained between the backside of the wafer and susceptor to remove materials deposited on the backside and end edge of the wafer; the gas flowing through the space between the front side of the wafer and the faceplate acting to prevent the plasma from removing materials on the front side of the wafer.

Abstract: A plasma containing both beryllium ions and beryllium fluoride ions is achieved. Beryllium crystals are used as a cathode in an ionization chamber containing boron trifluoride gas. The boron trifluoride gas and the beryllium are ionized to produce both beryllium fluoride ions (BeF.sup.+) and beryllium ions (Be.sup.+). Beryllium fluoride ions are emitted to impact a semiconductor target and where they divide thereby implanting beryllium and fluorine.

Abstract: An antireflection coating (21) for use in integrated circuit processing consists of a film of x-silicon-nitride, where x is a metal from the group consisting of titanium, vanadium, chromium, zirconium, niobium, molybdenum, hafnium, tantalum and tungsten. These coatings are preferably made by sputtering, with the x silicon nitride coating being made by sputtering in a nitrogen-containing atmosphere.

Abstract: A method for applying photoresist to a top surface of a semiconductor wafer for defining an electronic circuit pattern. The wafer is placed on a horizontal turntable and liquid solvent is dispensed onto the wafer's top surface. Spinning the wafer distributes the solvent to a substantially uniform film thickness over the entire top surface. Liquid photoresist is dispensed onto the top surface over the solvent film, preferably while spinning the wafer, to distribute a photoresist layer over the entire top surface. Photoresist discharge is controlled so that the wafer sirface remains entirely wetted by the solvent film during distribution of the liquid photoresist. The solvent viscosity is lower than the liquid photoresist viscosity and the solvent film thickness is sufficient to enable the photoresist to fully cover any bare silicon, high density or undercut circuit features, generally in a range of 500 to 10,000 Angstroms and preferably 1,000 to 5,000 Angstroms.