Abstract: Embodiments of mechanisms for forming an image sensor device are provided. The image sensor device includes a semiconductor substrate and an isolation structure in the semiconductor substrate. The image sensor device also includes an active region in the semiconductor substrate and surrounded by the isolation structure. The active region includes a light sensing region and a doped region, and the doped region has a horizontal length and a vertical length. A ratio of the horizontal length to the vertical length is in a range from about 1 to about 4.

Abstract: A method of manufacturing a microelectronic assembly (100) and a microelectronic device (4100) that include a stacked structure (101). The stacked structure includes a heat spreader (104), at least one die (106) thermally coupled to at least a portion of one side of the heat spreader, at least one other die (108) thermal coupled to at least a portion of an opposite side of the heat spreader, at least one opening (401) in the heat spreader located in a region of between the two die, an insulator (603) disposed in the at least one opening, and electrically conductive material (1308, 1406) in an insulated hole (705) in the insulator. The heat spreader allows electrical communication between the two die through the opening while the insulator isolates the electrically conductive material and the heat spreader from each other.

Abstract: Semiconductor devices are provided which have a tensile and/or compressive strain applied thereto and methods of manufacturing. The structure includes a gate stack comprising an oxide layer, a polysilicon layer and sidewalls with adjacent spacers. The structure further includes an epitaxially grown straining material directly on the polysilicon layer and between portions of the sidewalls. The epitaxially grown straining material, in a relaxed state, strains the polysilicon layer.

Abstract: A method for manufacturing a semiconductor device includes the following steps. At first, two gate stack layers are formed on a semiconductor substrate, wherein each of the gate stack layers includes a top surface and two side surfaces. A conductive material layer is deposited to conformally cover the top surface and the two side surfaces of each of the gate stack layers. Then, a cap layer is deposited to conformally cover the conductive material layer. Finally, the cap layer and the conductive material layer above the top surface of each of the gate stack layers are removed to leave the cap layer adjacent to the two side surfaces of each of the gate stack layers and covering a portion of the conductive material layer.

Abstract: A method of manufacturing a thin-film photovoltaic module in which a photoelectric conversion element is deposited on a substrate, includes removing the photoelectric conversion element at a frame shape area from sides of the substrate toward inside with a predetermined width by a first removing step of scanning a first photoelectric conversion element removing device at the area along the sides of the substrate to remove the photoelectric conversion element for the predetermined width, and a second removing step of scanning a second photoelectric conversion element removing device within the area along the sides of the substrate to remove the photoelectric conversion element that is not removed in the first removing step at a width narrower than the predetermined width and without superimposing a center line of a scanning path on a center line of a scanning path of the first photoelectric conversion element removing device.

Abstract: A silicon carbide semiconductor device that reduces an influence of an off-angle of a silicon carbide substrate on characteristics of the semiconductor device and achieves improved operational stability and reduced resistance. In a trench-gate silicon carbide MOSFET semiconductor device, a high-concentration well region is formed in a well region, and a distance from a first sidewall surface of a trench of the silicon carbide semiconductor to the high-concentration well region is smaller than a distance from a second sidewall surface of the trench to the high-concentration well region, the second sidewall surface facing the first sidewall surface of the trench through the gate electrode.

Abstract: A method of manufacturing a semiconductor substrate includes forming a first semiconductor layer on a substrate, forming a metallic material layer on the first semiconductor layer, forming a first portion of a second semiconductor layer on the first semiconductor layer and the metallic material layer, removing the metallic material layer under the first portion of the second semiconductor layer by dipping the substrate in a solution, forming a second portion of the second semiconductor layer on the first portion of the second semiconductor layer, and forming a cavity in a portion of the first semiconductor layer located under where the metallic material layer was removed.

Abstract: Quantum dot light emitting diodes (QD-LEDs) are formed that are transparent and emit light from the top and bottom faces. At least one electrode of the QD-LEDs is a dielectric/metal/dielectric layered structure, where the first dielectric comprises metal oxide nanoparticles or polymer-nanoparticle blends and is 10 to 40 nm in thickness, the metal layer is 5 to 25 nm in thickness, and the second dielectric layer is a nanoparticulate, polymer-nanoparticle blend or continuous layer of 30 to 200 nm in thickness and is situated distal to the light emitting layer of the QD-LED.

Abstract: A method includes forming a sacrificial layer over a bottom substrate. The sacrificial layer is patterned based on a desired etching distance. A top layer is formed over the sacrificial layer. At least one release hole is formed through the top layer. The sacrificial layer is etched through the at least one release hole.

Abstract: A semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch. A first terminal of the first transistor is connected to a first wiring. A second terminal of the first transistor is connected to a second wiring. A gate and a first terminal of the second transistor are connected to the first wiring. A second terminal of the second transistor is connected to a gate of the first transistor. The first switch is connected between the second wiring and a third wiring. The second switch is connected between the second wiring and the third wiring. The third switch is connected between the gate of the first transistor and the third wiring.

Abstract: In an approach to fabricating a silicon on insulator wafer, one or more semiconductor device elements are implanted and one or more shallow trench isolations are formed on a top surface of a first semiconductor wafer. A first dielectric material layer is deposited over the top surface of the first semiconductor wafer, filling the shallow trench isolations. A dielectric material layer on a bottom surface of a second semiconductor wafer is bonded to a dielectric material layer on the top of the first semiconductor wafer and one or more semiconductor devices are formed on a top surface of the second semiconductor wafer. Then, one or more through silicon vias are created connecting the one or more semiconductor devices on the top surface of the second semiconductor wafer and the one or more semiconductor device elements on the top surface of the first semiconductor wafer.

Abstract: A low resistivity interface material is provided between a self-aligned vertical heater element and a contact region of a selection device. A phase change chalcogenide material is deposited directly on the vertical heater element. In an embodiment, the vertical heater element in L-shaped, having a curved vertical wall along the wordline direction and a horizontal base. In an embodiment, the low resistivity interface material is deposited into a trench with a negative profile using a PVD technique. An upper surface of the low resistivity interface material may have a tapered bird-beak extension.

Abstract: A photoelectric conversion section contains a semiconductor element having a laminated structure which contains an electroconductor, a semiconductor, and an insulator provided between the electroconductor and the semiconductor, in which the insulator is a silicon oxide film containing nitrogen in a main portion located between the electroconductor and the semiconductor.

Abstract: In accordance with the present invention, there is provided a semiconductor device comprising a semiconductor die or chip, a package body and a through package body via. The semiconductor chip includes a plurality of conductive pads. The package body encapsulates a sidewall of the semiconductor chip, and has at least one hole formed therein having a sidewall which is of a prescribed first surface roughness value. The through package body via is disposed in the hole of the package body and comprises a dielectric material and at least one conductive interconnection metal. The dielectric material is disposed on the sidewall of the hole and defines at least one bore having a sidewall which is of a second surface roughness value less than the first surface roughness value. The interconnection metal is disposed within the bore.

Abstract: A microphone system has an output and at least a first transducer with a first dynamic range, a second transducer with a second dynamic range different than the first dynamic range, and coupling system to selectively couple the output of one of the first transducer or the second transducer to the system output, depending on the magnitude of the input sound signal, to produce a system with a dynamic range greater than the dynamic range of either individual transducer. A method of operating a microphone system includes detecting whether a transducer output crosses a threshold, and if so then selectively coupling another transducer's output to the system output. The threshold may change as a function of which transducer is coupled to the system output. The system and methods may also combine the outputs of more than one transducer in a weighted sum during transition from one transducer output to another, as a function of time or as a function of the amplitude of the incident audio signal.

Abstract: Integrated passive devices for silicon on insulator (SOI) FinFET technologies and methods of manufacture are disclosed. The method includes forming a passive device on a substrate on insulator material. The method further includes removing a portion of the insulator material to expose an underside surface of the substrate on insulator material. The method further includes forming material on the underside surface of the substrate on insulator material, thereby locally thickening the substrate on insulator material under the passive device.

Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a plurality of fin shaped structures and an insulating layer. The substrate has a fin field-effect transistor (finFET) region, a first region, a second region and a third region. The first region, the second region and the third region have a first surface, a second surface, and a third surface, respectively, where the first surface is relatively higher than the second surface and the second surface is relatively higher than the third surface. The fin shaped structures are disposed on a surface of the fin field-effect transistor region. The insulating layer covers the first surface, the second surface and the third surface.

Abstract: An organic light emitting diode (OLED) display includes a light-emitting region including an organic emission layer and a non-light-emitting region neighboring the light-emitting region. The OLED display includes a first electrode positioned at the light-emitting region and including a plurality of division regions divided according to a virtual cutting line crossing the light-emitting region, an organic emission layer positioned on the first electrode, a second electrode positioned on the organic emission layer, a driving thin film transistor connected to the first electrode, and a plurality of input terminals positioned at the non-light-emitting region and respectively connecting between each of division regions and the driving thin film transistor.

Abstract: A microelectronic device includes a heat spreader layer on an electrode of a component and a metal interconnect on the heat spreader layer. The heat spreader layer is disposed above a top surface of a substrate of the semiconductor device. The heat spreader layer is 100 nanometers to 3 microns thick, has an in-plane thermal conductivity of at least 150 watts/meter-° K, and an electrical resistivity less than 100 micro-ohm-centimeters.

Abstract: In aspects of the present invention, a method of forming a semiconductor device is disclosed, wherein amorphous regions are formed at an early stage during fabrication and the amorphous regions are conserved during subsequent processing sequences, and an intermediate semiconductor device structure with amorphous regions are provided at an early stage during fabrication. Herein a gate structure is provided over a semiconductor substrate and amorphous regions are formed adjacent the gate structure. Source/drain extension regions or source/drain regions are formed in the amorphous regions. In some illustrative embodiments, fluorine may be implanted into the amorphous regions. After the source/drain extension regions and/or the source/drain regions are formed, a rapid thermal anneal process is performed.