Abstract: Circuit having a first printed circuit board and a second printed circuit board. In the circuit, the printed circuit boards spaced apart from one another by means of an air gap are mechanically connected together by at least one power semiconductor.

Abstract: A semiconductor device includes: a conductive-patterned insulating substrate; conductive blocks fixed to conductive patterns of the conductive-patterned insulating substrate; a semiconductor chip fixed to each conductive block; a printed circuit board that has a conductive post fixed to the semiconductor chip; and a resin. The semiconductor device is configured such that the average volume of a conductive film per unit area of each conductive pattern around a section thereof, to which the corresponding conductive block is fixed, is reduced from the conductive block toward the outside.

Abstract: A composite electronic component may include: a composite body including a capacitor and an inductor coupled to each other, the capacitor having a ceramic body in which dielectric layers and internal electrodes facing each other with the dielectric layers interposed therebetween are stacked, and the inductor having a magnetic body in which magnetic layers having conductive patterns are stacked; an input terminal disposed on a first end surface of the composite body; an output terminal including a first output terminal disposed on a second end surface of the composite body and a second output terminal disposed on any one or more of upper and lower surfaces and a second side surface of the capacitor; and a ground terminal disposed on any one or more of the upper and lower surfaces and a first side surface of the capacitor and connected to the internal electrodes.

Abstract: A semiconductor package includes a metal baseplate, a semiconductor die having a reference terminal attached to the baseplate and an RF terminal facing away from the baseplate, and a multilayer circuit board having a first side attached to the baseplate and a second side facing away from the baseplate. The multilayer circuit board includes a plurality of interleaved signal and ground layers. One of the signal layers is at the second side of the multilayer circuit board and electrically connected to the RF terminal of the semiconductor die. One of the ground layers is at the first side of the multilayer circuit board and attached to the metal baseplate. Power distribution structures are formed in the signal layer at the second side of the multilayer circuit board. RF matching structures are formed in a different one of the signal layers than the power distribution structures.

Abstract: Provided is a display apparatus. The display apparatus includes a display panel including a substrate including a display region in which a display unit is located, a non-display region that extends outward from the display region and in which a plurality of pads are located, and a sealing portion that covers the display unit. The display apparatus also includes a circuit board including a flexible film and a plurality of terminals on the flexible film that are electrically coupled to the plurality of pads. The plurality of pads are spaced from each other along a first direction of the display panel and pad central points of the plurality of pads are located at at least two different locations along the first direction.

Abstract: According to a power semiconductor device of the present invention, it comprises a plurality of lead frames formed into like a wiring pattern, a power semiconductor element joined onto the lead frame, and a capacitor placed between mutually adjacent two lead frames, and is encapsulated with a mold resin. The capacitor is characterized in that external electrodes of that capacitor are connected to the lead frames each through a stress-relaxation structure portion that is lower in rigidity than the capacitor.

Abstract: A wiring substrate includes a first multi-layer wiring layer having a stacked via structure including a first electrode pad, a second multi-layer wiring layer having a non-stacked via structure including a second electrode pad. The second electrode pad is formed on an uppermost first insulating layer. The first electrode pad is formed on a second insulating layer which is located to a position lower by one layer than the first insulating layer, and the first electrode pad is arranged in an opening portion of the first insulating layer such that the upper face and the side face of the first electrode pad are exposed.

Abstract: Apparatus, systems, and methods for signal referencing for memory are described. In one embodiment, connector for a memory device comprises a housing having a first panel and a second panel opposite the first panel to be positioned adjacent a circuit board, the first panel and second panel defining a slot to receive a portion of the memory device, a first plurality of electrically conductive pins disposed in the slot and proximate the first panel to establish electrical connections with a plurality of electrical connectors on the memory device, wherein at least one of the first plurality of pins is a ground pin and a layer of conductive material disposed proximate the second surface. The ground pin is electrically coupled to the layer of conductive material. Other embodiments are also disclosed and claimed.

Abstract: A stacked semiconductor device includes a first semiconductor package and a second semiconductor package stacked thereon, and further includes a plate member interposed between the first semiconductor package and the second semiconductor package. The plate member has a plate body, protruding strips protruding toward its edges from the plate body, and leg portions respectively provided on the protruding strips. Each of the leg portions is disposed on a surface, which opposes one surface of a wiring substrate, of the protruding strip, and contacts the one surface of the wiring substrate. Thus, defective connection of connecting terminals due to warping of the wiring substrate and loading inclination of the first semiconductor package is reduced, resulting in an improved yield.

Abstract: The present invention is a backplane board including a first circuit board, a second circuit board, a first slot in which a first connector is connected with the first circuit board, and a second slot in which a second connector is connected with the second circuit board. The first connector and the second connector are arranged so that pin arrangement of the first connector may be shifted by at least one column in a longitudinal direction against pin arrangement of the second connector.

Abstract: A display device includes a display panel including a substrate having a display area and a non-display area outside the display area, a display unit being in the display area, and a plurality of pads in the non-display are, a sealing unit covering the display unit, and a circuit board including a plurality of terminals electrically coupled to the plurality of pads. The circuit board has a plurality of folding portions such that the circuit board is folded at least two times in directions different from each other.

Abstract: A component-embedded substrate includes a multilayer body formed by stacking up a plurality of resin layers in a predetermined direction, a component embedded in the multilayer body, the component having a plurality of terminal electrodes, a plurality of joining conductors provided in the multilayer body and joined to the plurality of terminal electrodes, a plurality of wiring conductors provided in the multilayer body and electrically coupled to the plurality of joining conductors and at least one auxiliary member enclosed within an outer boundary of the component provided in the multilayer body. The auxiliary member may be electrically insulated from each of the plurality of wiring conductors and arranged to balance pressures acting on the plurality of terminal electrodes when pressure is applied on the multilayer body.

Abstract: Electronic devices may have housings in which components are mounted. Some of the components may be sensitive to moisture. Other components may be insensitive to moisture and may form openings in a device housing that allow moisture to escape from within the housing. Components may be mounted on substrates such as printed circuit board substrates. Moisture repelling layers and moisture attracting layers may be patterned to form channels and other structures that guide moisture away from sensitive components towards insensitive components. Moisture repelling and attracting layers may also be used to limit the lateral spread of a conformal coating layer when coating components.

Abstract: A window member includes: a glass member; a display member wherein the glass member has a bottom surface which faces and overlays the display member and a pattern layer provided on a first surface of the glass member and having a fine pattern. The pattern layer is silk-screen printed on the first surface of the glass member to directly contact the surface of the glass member. A method of manufacturing a window member, includes: forming a pattern layer such that the pattern layer contacts a surface of the glass member along a periphery of the glass member. The pattern layer is formed at a location which is offset inward from a periphery of the glass member.

Abstract: A removable video module for a backlit liquid crystal display (LCD) contained within a chassis and having a timing and control board (TCON) with a board edge connector and an access opening in the chassis. The module preferably having a video input connection and means for generating a Low Voltage Differential Signaling (LVDS) video. The video module also preferably has a board edge connector adapted to connect with the board edge connector on the TCON, where the video module is adapted to fit through the access opening to connect with the TCON. Other embodiments may utilize a backplane where the video module and a power module are adapted to connect with the backplane and electrically communicate with the rest of the display. Outputs for either the video signal, power supply, or both may be provided so that a plurality of displays may be daisy-chained together.

Abstract: A cable manager includes one or more cable manager units. Each cable manager unit includes a pair of side cable guides, each comprised of a plurality of finger-like projections extending forwardly from a support column. At least one of the pair of support columns has a socket arranged at a side thereof. Each cable manager unit further includes a separate midsection member capable of insertion into the socket for interconnecting the pair of side cable guides.

Abstract: A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. The devices in each group are connected in parallel so that each group acts as a single device. In one embodiment, about 10 devices are contained in each group so the redundancy makes each group very reliable. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.

Abstract: A wiring board includes a first insulating layer coating a first wiring layer. A first through hole is opened in a surface of the first insulating layer and exposes a surface of the first wiring layer. A first via arranged in the first through hole includes an end surface exposed to the surface of the first insulating layer. A gap is formed between the first insulating layer and the first via in the first through hole. A second wiring layer is stacked on the surface of the first insulating layer and the end surface of the first via. The second wiring layer includes a pad filling the gap. The pad is greater in planar shape than the first through hole.

Abstract: In the wiring board of the present invention, the land pattern for power supply, connected to the semiconductor element connection pad for power supply through a via conductor and arranged below the segment region, includes a strip-shaped continued portion in the position corresponding to the outer peripheral portion except the outer peripheral side of the mounting portion in the segment region, and the strip-shaped continued portion and the power supply plane arranged therebelow are connected through a via conductor.

Abstract: Techniques are disclosed for integrating capacitors among the metal interconnect for embedded DRAM applications. In some embodiments, the technique uses a wet etch to completely remove the interconnect metal (e.g., copper) that is exposed prior to the capacitor formation. This interconnect metal removal precludes that metal from contaminating the hi-k dielectric of the capacitor. Another benefit is increased height (surface area) of the capacitor, which allows for increased charge storage. In one example embodiment, an integrated circuit device is provided that includes a substrate having at least a portion of a DRAM bit cell circuitry, an interconnect layer on the substrate and including one or more metal-containing interconnect features, and a capacitor at least partly in the interconnect layer and occupying space from which a metal-containing interconnect feature was removed. The integrated circuit device can be, for example, a processor or a communications device.