Patents Examined by Binh X Tran
  • Patent number: 11944965
    Abstract: A microfluidic device, a diagnostic device including the microfluidic device and a method for making the microfluidic device are provided. The microfluidic device includes: (i) a transparent substrate comprising a cavity, the cavity opening up to a top of the transparent substrate; (ii) a transparent layer covering the cavity, and (iii) a semiconductor substrate over the transparent layer and the transparent substrate, wherein the semiconductor substrate comprises a through hole overlaying the cavity and exposing the transparent layer.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: April 2, 2024
    Assignee: Imec vzw
    Inventors: Giuseppe Fiorentino, Simone Severi, Aurelie Humbert
  • Patent number: 11942329
    Abstract: A method for forming a semiconductor device is provided. The method includes forming a semiconductor protruding structure over a substrate and surrounding the semiconductor protruding structure with an insulating layer. The method also includes forming a dielectric layer over the insulating layer. The method further includes partially removing the dielectric layer and insulating layer using a planarization process. As a result, topmost surfaces of the semiconductor protruding structure, the insulating layer, and the dielectric layer are substantially level with each other. In addition, the method includes forming a protective layer to cover the topmost surfaces of the dielectric layer. The method includes recessing the insulating layer after the protective layer is formed such that the semiconductor protruding structure and a portion of the dielectric layer protrude from a top surface of a remaining portion of the insulating layer.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wan-Yi Kao, Che-Hao Chang, Yung-Cheng Lu, Chi On Chui
  • Patent number: 11931854
    Abstract: A method of chemical mechanical polishing includes rotating a polishing pad about an axis of rotation, positioning a substrate against the polishing pad, the polishing pad having a groove that is concentric with the axis of rotation, oscillating the substrate laterally across the polishing pad such that a central portion of the substrate and an edge portion of the substrate are positioned over a polishing surface of the polishing pad for a first duration, and holding the substrate substantially laterally fixed in a position such that the central portion of the substrate is positioned over the polishing surface of the polishing pad and the edge portion of the substrate is positioned over the groove for a second duration.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: March 19, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Jimin Zhang, Jianshe Tang, Brian J. Brown, Wei Lu, Priscilla Diep LaRosa
  • Patent number: 11932947
    Abstract: Compositions and methods for etching an implantable device having a cobalt chrome surface are disclosed. The compositions generally include at least two mineral acids, iron (Fe), and certain component metals of the cobalt chrome to be etched. For example, when etching a cobalt chromium molybdenum alloy, the metals may include chromium (Cr), molybdenum (Mo), and optionally, cobalt (Co). The at least two mineral acids may include hydrochloric acid (HCl), nitric acid (HNO3), and hydrofluoric acid (HF). Alternatively, the composition may be an electrolyte composition useful for electrochemical etching of the implantable device. These compositions and methods may generate nanoscale geometry on the surface of the implantable device to provide implants with improved osseointegration, biocompatibility, and healing after surgery.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: March 19, 2024
    Assignee: Tech Met, Inc.
    Inventors: Michael Vidra, Jordan Incerpi, Daniel Jon Schutzer
  • Patent number: 11929291
    Abstract: Controlling an etch process applied to a multi-layered structure, by calculating a spectral derivative of reflectance of an illuminated region of interest of a multi-layered structure during an etch process applied to the multi-layered structure, identifying in the spectral derivative a discontinuity that indicates that an edge of a void formed by the etch process at the region of interest has crossed a layer boundary of the multi-layered structure, determining that the crossed layer boundary corresponds to a preselected layer boundary of the multi-layered structure, and applying a predefined control action to the etch process responsive to determining that the crossed layer boundary corresponds to the preselected layer boundary of the multi-layered structure.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: March 12, 2024
    Assignee: NOVA LTD.
    Inventors: Gil Loewenthal, Shay Yogev, Yoav Etzioni
  • Patent number: 11919188
    Abstract: The invention relates to a method (100) for cutting cut parts (1, 2, 3, 4, 5, 6; 12, 13, 14, 15, 16, 17, 18), wherein the cut parts (1, 2, 3, 4, 5, 6; 12, 13, 14, 15, 16, 17, 18) produce a cutting pattern (7), said method having the following method step: cutting (106) the cut parts (1, 2, 3, 4, 5, 6; 12, 13, 14, 15, 16, 17, 18), wherein the cut parts (1, 2, 3, 4, 5, 6; 12, 13, 14, 15, 16, 17, 18) are arranged in a rectangular, repeating portion (9, 9?) of an endless single ply material web (19), wherein the portion (9) at least one cut part (1, 2, 3, 4, 5, 6; 12, 13, 14, 15, 16, 17, 18) or at least one cutting pattern (7) is contained in part (10, 11). The method additionally comprises a computer program product and a device for cutting by means of a cutting tool.
    Type: Grant
    Filed: November 23, 2018
    Date of Patent: March 5, 2024
    Assignee: HEFA Holding GmbH
    Inventors: Gunnar Held, Achim Zinke
  • Patent number: 11915910
    Abstract: A method of plasma processing includes generating a glow phase of an electropositive plasma in a plasma processing chamber containing a first species, a second species, and a substrate comprising a major surface and generating an electronegative plasma in an afterglow phase of the electropositive plasma in the plasma processing chamber by combining the electrons of the electropositive plasma with atoms or molecules of the second species. The electropositive plasma includes positive ions of the first species and electrons. The electronegative plasma includes the positive ions and negative ions of the second species. The method further includes, in the afterglow phase, cyclically performing steps of generating neutral particles by applying a negative bias voltage at the substrate and applying a non-negative bias voltage at the substrate. The average velocity of the neutral particles is towards and substantially normal to the major surface of the substrate.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: February 27, 2024
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Peter Ventzek, Mitsunori Ohata, Alok Ranjan
  • Patent number: 11917756
    Abstract: A method for manufacturing a printed wiring board includes forming metal posts on a conductor circuit formed on a resin insulating layer, forming the outermost resin layer on the resin insulating layer such that the metal posts is embedded in the outermost resin layer, forming a mask at a dam formation site for a dam structure of the outermost resin layer to surround at least part of a pad group including the metal posts on the outermost resin layer, and reducing a thickness of the outermost resin layer exposed from the mask such that end portions of the metal posts are exposed from the outermost resin layer, that the metal posts form the pad group, and that the outermost resin layer has the dam structure forming part of the outermost resin layer and formed to surround at least part of the pad group including the metal posts.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: February 27, 2024
    Assignee: IBIDEN CO., LTD.
    Inventor: Yuji Ikawa
  • Patent number: 11894215
    Abstract: A method for structuring a decorative or technical pattern in the thickness of an object made of an at least partially transparent amorphous, semi-crystalline or crystalline material, wherein the object is made of an at least partially transparent material including a top surface and a bottom surface which extends away from the top surface. The top or bottom surfaces is provided with a mask defining an opening whose outline corresponds to the profile of the pattern to be structured, the mask covering the top or bottom surface at the positions which are not to be structured. The pattern is structured with a mono- or multicharged ion beam through the opening of the mask, wherein the mechanical properties of the mask are sufficient to prevent the ions of the ion beam from etching the top or bottom surface at the positions where this top or bottom surface is covered by the mask.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: February 6, 2024
    Assignee: Comadur S.A.
    Inventors: Alexis Boulmay, Pierry Vuille, Julien Meier, Pierpasquale Tortora
  • Patent number: 11894236
    Abstract: A method for manufacturing a semiconductor structure includes: providing a base; forming multiple discrete first mask layers on the base; forming multiple sidewall layers, in which each sidewall layer is configured to encircle one of the first mask layers, and each sidewall layer is connected to closest sidewall layers, the side walls, away from the first mask layers, of multiple connected sidewall layers define initial first vias and each of the initial first vias is provided with chamfers; removing the first mask layers, and each sidewall layer defines a second via; after removing the first mask layers, forming repair layers which are located on the side walls, away from the second vias, of the sidewall layers and fill the chamfers of the initial first vias to form first vias; and etching the base along the first vias and the second vias to form capacitor holes on the base.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: February 6, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Qiang Wan, Jun Xia, Kangshu Zhan, Tao Liu, Penghui Xu, Sen Li, Yanghao Liu
  • Patent number: 11891689
    Abstract: Fabricating a nanopore sensor includes depositing a first and second oxide layers on first and second sides of a sapphire substrate. The second oxide layer is patterned to form an etch mask having a mask opening in the second oxide layer. A crystalline orientation dependent wet anisotropic etch is performed on the second side of the sapphire substrate using the etch mask to form a cavity having sloped side walls through the sapphire substrate to yield an exposed portion of the first oxide layer, each of the sloped side walls being a crystalline facet aligned with a respective crystalline plane of the sapphire substrate. A silicon nitride layer is deposited on the first oxide layer. The exposed portion of the first oxide layer in the cavity is removed, thereby defining a silicon nitride membrane in the cavity. An opening is formed through the silicon nitride membrane.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: February 6, 2024
    Assignee: Arizona Board of Regents on behalf of Arizona State University
    Inventors: Chao Wang, Pengkun Xia
  • Patent number: 11883923
    Abstract: A method of chemical mechanical polishing includes rotating a polishing pad about an axis of rotation, positioning a substrate against the polishing pad, the polishing pad having a groove that is concentric with the axis of rotation, oscillating the substrate laterally across the polishing pad such that a central portion of the substrate and an edge portion of the substrate are positioned over a polishing surface of the polishing pad for a first duration, and holding the substrate substantially laterally fixed in a position such that the central portion of the substrate is positioned over the polishing surface of the polishing pad and the edge portion of the substrate is positioned over the groove for a second duration.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: January 30, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Jimin Zhang, Jianshe Tang, Brian J. Brown, Wei Lu, Priscilla Diep LaRosa
  • Patent number: 11881410
    Abstract: A substrate processing apparatus includes: a chamber; a substrate support disposed in the chamber; a plasma generator configured to form a plasma in the chamber; and a controller configured to perform a process including: placing a substrate on the substrate support, the substrate including a first film, a second film and a third film, the first film containing a silicon, the second film having a second aperture, the first film being disposed between the second film and the third film; cooling the substrate to ?30° C. or less; etching the first film through the second aperture with a plasma formed from a first process gas containing a fluorocarbon gas, to form a first aperture of a tapered shape in the first film such that a width of the first aperture gradually decreases toward a bottom of the first aperture; and etching the third film through the first aperture.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: January 23, 2024
    Assignee: Tokyo Electron Limited
    Inventors: Yasutaka Hama, Motoki Noro, Shu Kino
  • Patent number: 11879174
    Abstract: The invention relates to a method for pickling steel sheets 8, the steel sheets being continuously dipped in a pickling bath 1, containing a pickling solution 10, the bath being connected to a treatment unit including a recirculation tank 3, circulators 12 and 13, a continuous entering flow 11 of the solution being fed into an ultrafiltration device 2 from the recirculation tank 3 and two flows exiting the ultrafiltration device, one filtered exiting flow 21 being then fed back inside the recirculation tank 3 and one unfiltered flow 22, the treatment unit including no storage tank.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: January 23, 2024
    Assignee: ArcelorMittal
    Inventors: Andrea Naves Arnaldos, Elena Piedra Fernandez, Vanesa Menendez Delmiro, Salome Lopez Gonzalez
  • Patent number: 11862474
    Abstract: A substrate processing apparatus includes a temperature detector, a calculation unit and an execution unit. The temperature detector is configured to detect a temperature of a substrate on which a processing liquid is discharged. The calculation unit is configured to calculate, by using a given calculation formula, an etching amount of the substrate based on the temperature detected by the temperature detector. The execution unit configured to perform an etching processing on the substrate by the processing liquid based on the etching amount.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: January 2, 2024
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Taisei Inoue, Hiroki Sakurai, Takashi Nakazawa
  • Patent number: 11850701
    Abstract: A polishing pad is provided. The polishing surface of the polishing pad corresponds to a two-dimensional orthogonal coordinate system having a first coordinate direction and a second coordinate direction, the rotating axis of the polishing pad corresponds to the original point of the two-dimensional orthogonal coordinate system, and the polishing pad includes a polishing layer and a surface pattern. The surface pattern is disposed in the polishing layer, and includes at least one first groove and at least one second groove respectively distributing along the first coordinate direction, wherein the at least one first groove has a first cutting trajectory direction, the first cutting trajectory direction is forward with the first coordinate direction, and the at least one second groove has a second cutting trajectory direction, the second cutting trajectory direction is reverse with the first coordinate direction.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: December 26, 2023
    Assignee: IV Technologies CO., Ltd.
    Inventors: Liang-Chi Tu, Yu-Piao Wang
  • Patent number: 11851363
    Abstract: A method for manufacturing an ultra-thin glass substrate includes: providing a glass base material preset with n substrate areas and a skeleton area surrounding the substrate areas; at least forming an etching protection layer on an upper surface and a lower surface of each substrate area of the glass base material, respectively; at least etching the skeleton area of the glass base material to separate the substrate areas from the glass base material, and form a stress dissipation edge along an edge of each substrate area; and removing the etching protection layer to get independent glass substrates. A method for manufacturing a display panel is also disclosed. An aim is to prevent quality of the ultra-thin glass substrate from damage caused by scribing wheel cutting or laser cutting, therefore the quality of the ultra-thin glass substrate is improved.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: December 26, 2023
    Assignee: Flexi Glass Co., Ltd.
    Inventors: Hao-Yu Chou, Cheng-Chung Chiang, Tian-Ming Wu, Chun-Chieh Huang, Feng Chen
  • Patent number: 11856832
    Abstract: An electronic device includes an electronic panel including an active area and a pad area and including an input sensing member and a circuit board overlapping at least a side of the pad area. The electronic panel includes a first conductive layer, a second conductive layer, a first organic insulation layer disposed between the first conductive layer and the second conductive layer, a pattern layer disposed on the second conductive layer, overlapping the plurality of second conductive patterns, and including a plurality of organic patterns, and a second organic insulation layer covering the pattern layer and the second conductive layer. The pattern layer covers an upper surface of the second conductive layer.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: December 26, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ji-hyun Kim, Junhong Park, Jun Chun, Euisuk Jung, Hoon Kang, Jeongmin Park
  • Patent number: 11854821
    Abstract: A method of removing a hard mask is provided. Gate stacks are patterned on a substrate, where the gate stacks include a polysilicon layer and the hard mask deposited over the polysilicon layer. A dielectric layer is deposited on the substrate and on the patterned gate stacks. A first portion of the dielectric layer is planarized by chemical mechanical polishing (CMP) to remove a topography of the dielectric layer. The hard mask and a second portion of the dielectric layer are removed by the CMP.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Che-Hao Tu, William Weilun Hong, Ying-Tsung Chen
  • Patent number: 11851584
    Abstract: The invention provides a chemical-mechanical polishing composition comprising (a) an abrasive, (b) a cobalt accelerator, and (c) an oxidizing agent that oxidizes a metal, wherein the polishing composition has a pH of about 4 to about 10. The invention further provides a method of chemically-mechanically polishing a substrate with the inventive chemical-mechanical polishing composition. Typically, the substrate contains cobalt.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: December 26, 2023
    Assignee: CMC MATERIALS, INC.
    Inventors: Steven Kraft, Phillip W. Carter, Andrew R. Wolff