Patents Examined by Binh X Tran
  • Patent number: 11189469
    Abstract: An etching method for etching an organic film on a substrate inside a processing container includes controlling a temperature of the substrate to be at most ?35° C., and supplying a gas containing O into an inside of the processing container.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: November 30, 2021
    Assignee: Tokyo Electron Limited
    Inventor: Yuki Azuma
  • Patent number: 11189496
    Abstract: Disclosed are a plasma reactor for ultra-high aspect ratio etching and an etching method therefor, wherein the plasma reactor comprises: a reaction chamber inside which a reaction space is formed; a base disposed at the bottom of the reaction space and configured for supporting a to-be-processed substrate; a gas showerhead disposed at the top inside the reaction chamber; wherein a first radio frequency power supply outputs a radio frequency power with a first frequency to the base or the gas showerhead so as to form and maintain plasma in the reaction chamber; and a second radio frequency power supply which outputs a radio frequency power with a second frequency to the base so as to control the ion energy incident to the base; wherein the first frequency is not less than 4 MHz, and the second frequency is not less than 10 KHz but not more than 300 KHz.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: November 30, 2021
    Assignee: ADVANCED MICRO-FABRICATION EQUIPMENT INC. CHINA
    Inventors: Gerald Zheyao Yin, Yichuan Zhang, Jie Liang, Xingcai Su, Tuqiang Ni
  • Patent number: 11180679
    Abstract: A composition for semiconductor processing comprises: polishing particles; a thiazolinone compound; and a solvent, wherein a logarithmic reduction factor of a microorganism in the composition, as calculated by Formula 1, is at least 4: Logarithmic reduction factor=log(CFU0/CFUX)??Formula 1 where CFU0 is an initial concentration (CFU/mL) of the microorganism, CFUX is a concentration (CFU/mL) of the microorganism remaining after standing at room temperature for X days, and X is 1, 2, 3, 4, 5 or 6.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: November 23, 2021
    Assignee: SKC SOLMICS CO., LTD.
    Inventor: Hyeongju Lee
  • Patent number: 11183383
    Abstract: Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and a plurality of protruding features comprising a second material (e.g., silicon or carbon). For example, 10-100 nm thick tin oxide layer can be deposited using atomic layer deposition. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the substrate. This is followed by etching the unprotected portions of the first material, without removal of the spacers. Next, underlying layer is etched, and spacers are removed. Tin-containing particles can be removed from processing chambers by converting them to volatile tin hydride.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: November 23, 2021
    Assignee: Lam Research Corporation
    Inventors: David Charles Smith, Richard Wise, Arpan Mahorowala, Patrick van Cleemput, Bart J. van Schravendijk
  • Patent number: 11171009
    Abstract: There is provided a processing method of a wafer. The processing method includes a frame unit preparation step of fixing the wafer in an opening of an annular frame by an adhesion tape to prepare a frame unit and a frame unit holding step of attracting and holding the wafer of the frame unit by an chuck table in an etching chamber with the intermediary of the adhesion tape. The processing method includes also a shielding step of covering the annular frame and (or) an annular region of the adhesion tape by a cover member to shield the annular frame and (or) the annular region from an external space and a dry etching step of supplying a gas to the etching chamber and executing dry etching for the wafer after execution of the frame unit holding step and the shielding step.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: November 9, 2021
    Assignee: DISCO CORPORATION
    Inventors: Hiroyuki Takahashi, Kentaro Wada, Yoshio Watanabe, Susumu Yokoo
  • Patent number: 11160171
    Abstract: The present invention relates to an etching solution composition for selectively etching only silver, a silver alloy, or a silver compound, and to a circuit forming method using the composition. The circuit forming method according to the present invention is characterized in that, in a substrate material in which an electrically conductive seed layer and a circuit layer are formed of heterogeneous metals, only the seed layer is selectively etched to enable the implementation of fine pitches. In addition, the present invention relates to a circuit forming method and an etching solution composition, wherein only a seed layer of silver (Ag), a silver alloy, or a silver compound is selectively etched without etching a copper (Cu) plated circuit.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: October 26, 2021
    Assignee: InkTee Co., Ltd.
    Inventors: Kwang-Choon Chung, Su Han Kim, Jung Yoon Moon, Hyeon-Jun Seong, Byung Woong Moon
  • Patent number: 11111413
    Abstract: A chemical-mechanical polishing slurry having high Silicon Nitride removal rate selectivity includes abrasive particles and a compound containing one or more carboxyl groups. The polishing slurry has high SiN removal rate, low TEOS removal rate, and high removal rate selectivity of SiN to TEOS. The polishing slurry can significantly reduce the defects on Oxide surface which has an excellent market application prospect.
    Type: Grant
    Filed: July 25, 2017
    Date of Patent: September 7, 2021
    Assignee: ANJI MICROELECTRONICS TECHNOLOGY (SHANGHAI) CO., LTD.
    Inventors: Wenting Zhou, Jianfen Jing
  • Patent number: 11111412
    Abstract: The present invention provides a polishing composition which can polish an object to be polished at a high polishing speed and with fewer scratches (defects). The present invention is a polishing composition containing silica of which a maximum peak height in a weight change rate distribution curve obtained by thermogravimetric measurement in a range of 25° C. or higher and 250° C. or lower is ?0.011 or more and less than 0, a pH at 25° C. of the polishing composition being less than 6.0.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: September 7, 2021
    Assignee: FUJIMI INCORPORATED
    Inventors: Shota Suzuki, Yoshihiro Izawa
  • Patent number: 11107738
    Abstract: Controlling an etch process applied to a multi-layered structure, by calculating a spectral derivative of reflectance of an illuminated region of interest of a multi-layered structure during an etch process applied to the multi-layered structure, identifying in the spectral derivative a discontinuity that indicates that an edge of a void formed by the etch process at the region of interest has crossed a layer boundary of the multi-layered structure, determining that the crossed layer boundary corresponds to a preselected layer boundary of the multi-layered structure, and applying a predefined control action to the etch process responsive to determining that the crossed layer boundary corresponds to the preselected layer boundary of the multi -layered structure.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: August 31, 2021
    Assignee: Nova Ltd.
    Inventors: Gil Loewenthal, Shay Yogev, Yoav Etzioni
  • Patent number: 11109171
    Abstract: A semiconductor device and its manufacturing method are presented. The manufacturing method includes providing a substrate structure; forming a first metal layer on the substrate structure; forming a second metal layer on the first metal layer; forming a first oxide layer on the second metal layer at a first temperature; and conducting the remaining manufacturing processes including thermal processes at a second temperature that is higher than the first temperature. This method reduces the concentration of the first metal diffused into the surface of the second metal layer during the thermal processes, thus reducing the amount of the oxide of the first metal formed on the surface of the second metal layer. Therefore, it is beneficial to the establishment of metal wire connections.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: August 31, 2021
    Inventors: Yijun Chen, Yu Hua, Kuanchieh Yu, Chao Wang, Shan Zhang
  • Patent number: 11107692
    Abstract: An etching method of etching a silicon nitride region with high selectivity is provided. In the etching method, a processing target object, having a silicon nitride region and a silicon-containing region having a composition different from the silicon nitride region, is accommodated in a processing vessel, and the silicon nitride region is selectively etched. In a first process, a deposit containing hydrofluorocarbon is formed on the silicon nitride region and the silicon-containing region by generating plasma of a processing gas containing a hydrofluorocarbon gas within the processing vessel. In a second process, the silicon nitride region is etched by radicals of the hydrofluorocarbon contained in the deposit. The first process and the second process are repeated alternately.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: August 31, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hikaru Watanabe, Ryosuke Ebihara
  • Patent number: 11101113
    Abstract: A method of etching uses an overhead electron beam source that generates an ion-ion plasma for performing an atomic layer etch process.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: August 24, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth S. Collins, Kartik Ramaswamy, James D. Carducci, Shahid Rauf, Leonid Dorf, Yang Yang
  • Patent number: 11101136
    Abstract: Embodiments of the present technology may include a method of etching. The method may include mixing plasma effluents with a gas in a first section of a chamber to form a first mixture. The method may also include flowing the first mixture to a substrate in a second section of the chamber. The first section and the second section may include nickel plated material. The method may further include reacting the first mixture with the substrate to etch a first layer selectively over a second layer. In addition, the method may include forming a second mixture including products from reacting the first mixture with the substrate.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: August 24, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Dongqing Yang, Tien Fak Tan, Peter Hillman, Lala Zhu, Nitin K. Ingle, Dmitry Lubomirsky, Christopher Snedigar, Ming Xia
  • Patent number: 11084981
    Abstract: A silicon etchant with high Si/SiO2 etching selectivity and its application are disclosed. The silicon etchant comprises at least one ketal and at least one quaternary ammonium hydroxide compound. The weight percentage of the ketal is 20˜99 wt. % based on the total weight of the etchant and the weight percentage of the quaternary ammonium hydroxide compound is 0.1˜10 wt. % based on the total weight of the etchant.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: August 10, 2021
    Assignee: CJ TECHNOLOGY CO., LTD.
    Inventor: Mo Hsun Tsai
  • Patent number: 11081368
    Abstract: The method of dicing a wiring substrate that includes a core substrate having a front surface and a rear surface at least one of which is provided with an adhesive layer and a rim pattern thereon. The adhesive layer is provided with a laminate that has wiring layers and insulating layers, laminating. The rim pattern is provided with the insulating layers laminated thereon. The method includes steps of forming separation grooves by removing portions of the insulating layers laminated on the rim pattern to expose the rim pattern; exposing at least one of the front and rear surfaces of the core substrate by dissolving and removing the rim pattern of the groove bottoms; and dicing the core substrate exposed at groove bottoms, along cutting margins each being smaller than a groove width of each of the groove bottoms.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: August 3, 2021
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventors: Koji Imayoshi, Yuki Nitta
  • Patent number: 11073764
    Abstract: A method for etching a light absorbing material permits directly writing a pattern of etching of silicon nitride and other light absorbing materials, without the need of a lithographic mask, and allows the creation of etched features of less than one micron in size. The method can be used for etching deposited silicon nitride films, freestanding silicon nitride membranes, and other light absorbing materials, with control over the thickness achieved by optical feedback. The etching is promoted by solvents including electron donor species, such as chloride ions. The method provides the ability to etch silicon nitride and other light absorbing materials, with fine spatial and etch rate control, in mild conditions, including in a biocompatible environment. The method can be used to create nanopores and nanopore arrays.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: July 27, 2021
    Assignee: Northeastern University
    Inventors: Meni Wanunu, Hirohito Yamazaki
  • Patent number: 11065405
    Abstract: An electronic cigarette includes a ceramic heating element having a current conducting heating member on and/or in a body of ceramic material which is impenetrable to the liquid; a liquid delivery member to deliver liquid from a liquid storage to the heating element; a battery; and an electric circuit for electrically connecting the heating element to the battery. The body of ceramic material is to contact or be in close proximity to the liquid delivery member, to vaporize the liquid when the ceramic heating element produces heat. The electronic cigarette further includes a cartomizer part, having the liquid storage and the liquid delivery member, and a battery holding part, having the battery, the ceramic heating element, and the electric circuit. In an assembled state, the cartomizer part and the battery holding part are assembled. In a disassembled state, the cartomizer part and the battery holding part are separated.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: July 20, 2021
    Inventor: Dick Paul Voerman
  • Patent number: 11069563
    Abstract: Planarization is performed on heterogeneous films with high accuracy. According to one embodiment, a method for processing a substrate is provided. The substrate is formed of an insulating film layer where a groove is formed, a barrier metal layer, and a wiring metal layer in order from a bottom in at least a part of a region. The method includes (3) while the wiring metal layer, the barrier metal layer, and the insulating film layer are exposed to the surface of the substrate: a step of bringing the surface of the substrate into contact with a catalyst; a step of supplying a process liquid between the catalyst and the surface of the substrate; and a step of flowing a current between the catalyst and the surface of the substrate.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: July 20, 2021
    Assignee: EBARA CORPORATION
    Inventors: Atsuo Katagiri, Itsuki Kobata
  • Patent number: 11062914
    Abstract: Methods for removing a passivation film from a copper surface can include exposing the passivation film to a vapor phase organic reactant, for example at a temperature of 100° C. to 400° C. In some embodiments, the passivation film may have been formed by exposure of the copper surface to benzotriazole, such as can occur during a chemical mechanical planarization process. The methods can be performed as part of a process for integrated circuit fabrication. A second material can be selectively deposited on the cleaned copper surface relative to another surface of the substrate.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: July 13, 2021
    Assignee: ASM IP Holding B.V.
    Inventors: Antti Juhani Niskanen, Jaakko Anttila
  • Patent number: 11062882
    Abstract: A plasma processing apparatus according to an exemplary embodiment includes a chamber, a substrate support, an upper electrode, a radio frequency power source, and a direct-current power source device. The substrate support includes a lower electrode. The lower electrode is provided in the chamber. The upper electrode is provided above the substrate support. The radio frequency power source generates a plasma in the chamber. The direct-current power source device is electrically connected to the upper electrode. The direct-current power source device is configured to periodically generate a pulsed negative direct-current voltage. An output voltage of the direct-current power source device is alternately switched between a negative direct-current voltage and zero volts.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: July 13, 2021
    Assignee: Tokyo Electron Limited
    Inventors: Yusuke Aoki, Shinya Morikita, Toshikatsu Tobana, Fumiya Takata