Patents Examined by Binh X Tran
  • Patent number: 11654526
    Abstract: A polishing pad includes: a polishing layer having a polyurethane sheet containing substantially spherical cells, wherein E?(90%)/E?(30%) falls within a range of 0.4 to 0.7, where E?(90%) represents a storage modulus of the polyurethane sheet that has been exposed to an environment with a temperature of 23° C. and a relative humidity of 90%, as measured in a tension mode at 40° C. with an initial load of 148 g, a strain range of 0.1%, and a measurement frequency of 1.6 Hz, and E?(30%) represents a storage modulus of the polyurethane sheet that has been exposed to an environment with a temperature of 23° C. and a relative humidity of 30%, as measured in a tension mode at 40° C. with an initial load of 148 g, a strain range of 0.1%, and a measurement frequency of 1.6 Hz. Also provided is a method for manufacturing the polishing pad.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: May 23, 2023
    Assignee: Fujibo Holdings, Inc.
    Inventors: Hirohito Miyasaka, Teppei Tateno, Ryuma Matsuoka, Hiroshi Kurihara, Takumi Mikuni
  • Patent number: 11658034
    Abstract: There is provided a method of patterning platinum on a substrate. A platinum layer is deposited on the substrate, and a patterned photoresist layer is formed over the platinum layer leaving partly exposed regions of the platinum layer. An aluminum layer is deposited over the partly exposed regions of the platinum layer. An alloy is formed of aluminum with platinum from the partly exposed regions. The platinum aluminum alloy is etched away leaving a remaining portion of the platinum layer to form a patterned platinum layer on the substrate. In an embodiment, a thin hard mask layer is deposited on the platinum layer on the semiconductor substrate before the patterned photoresist layer is formed.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: May 23, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Sebastian Meier, Helmut Rinck
  • Patent number: 11651970
    Abstract: Differences in ion mass of lighter ions (having a higher mobility) and heavier ions are utilized in conjunction with bias voltage modulation of an atomic layer etch (ALE) to provide a fast ALE process. The difference in ion mobility achieves surface modification with reactive neutral species in the absence of a bias voltage, and ion bombardment with lighter ions (e.g., inert or less reactive ions) in the presence of a bias voltage. By modulating the bias voltage, preferential ion bombardment is achieved with lighter ions without the need to physically separate or purge the reactive precursors and inert gases supplied to the process chamber for a given ALE cycle. A “fast” plasma ALE process is provided which improves etch rate, throughput and cost-efficiency by enabling the same gas chemistry composition (e.g., reactive precursor and inert gas combination) to be kept in the process chamber during a given ALE cycle.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: May 16, 2023
    Assignee: Tokyo Electron Limited
    Inventor: Sergey Voronin
  • Patent number: 11646171
    Abstract: The present disclosure provides a method to adjust asymmetric velocity of a scan in a scanning ion beam etch process to correct asymmetry of etching between the inboard side and the outboard side of device structures on a wafer, while maintaining the overall uniformity of etch across the full wafer.
    Type: Grant
    Filed: November 27, 2021
    Date of Patent: May 9, 2023
    Assignee: PLASMA-THERM NES LLC
    Inventors: Sarpangala Hariharakeshava Hegde, Vincent Lee
  • Patent number: 11637003
    Abstract: A method for etching a film includes: supplying a precursor gas to the substrate, thereby forming a precursor layer on a substrate; and etching the film with a chemical species from plasma formed from a processing gas so as to increase a depth of the opening, and form a protective region from the precursor layer with the chemical species or another chemical species from the plasma. A plurality of cycles each including the supplying the precursor gas and the etching the film is executed. A temperature of the substrate during execution of the etching the film included in at least one cycle of the plurality of cycles and a temperature of the substrate during execution of the etching the film included in at least one other cycle of the plurality of cycles are set to be different from each other.
    Type: Grant
    Filed: November 11, 2020
    Date of Patent: April 25, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Tomohiko Niizeki, Takayuki Katsunuma, Yoshihide Kihara, Maju Tomura
  • Patent number: 11629048
    Abstract: The invention relates to a method of fabricating a micro machined channel, comprising the steps of providing a substrate of a first material and having a buried layer of a different material therein, and forming at least two trenches in said substrate by removing at least part of said substrate. Said trenches are provided at a distance from each other and at least partly extend substantially parallel to each other, as well as towards said buried layer. The method comprises the step of forming at least two filled trenches by providing a second material different from said first material and filling said at least two trenches with at least said second material; forming an elongated cavity in between said filled trenches by removing at least part of said substrate extending between said filled trenches; and forming an enclosed channel by providing a layer of material in said cavity and enclosing said cavity.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: April 18, 2023
    Assignees: BERKIN B.V., UNIVERSITEIT TWENTE, STICHTING VOOR DE TECHNISCHE WETENSCHAPPEN
    Inventors: Yiyuan Zhao, Henk-Willem Veltkamp, Yaxiang Zeng, Joost Conrad Lötters, Remco John Wiegerink
  • Patent number: 11623304
    Abstract: Irregularly-shaped display panel and cutting method are provided. The display panel includes a display region and a non-display region surrounding the display region. The non-display region includes at least one irregularly-shaped boundary. The irregularly-shaped display panel further includes a substrate and the substrate includes a base substrate. The non-display region includes laser cutting trajectories. An orthographic projection of each of the laser cutting trajectories to the base substrate at least partially overlaps an orthographic projection of a corresponding irregularly-shaped boundary. Each of the laser cutting trajectories includes a cutting entry point and a cutting exit point at two ends thereof, and at least one of the cutting entry point and the cutting exit point does not overlap the orthographic projection of the corresponding irregularly-shaped boundary. The laser cutting trajectories are used as a laser cutting path.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: April 11, 2023
    Assignee: XIAMEN TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Jiansong Kang, Ping-Chung Yen, Jianan Wang, Tian Luo, Tsung-Han Tsai
  • Patent number: 11604183
    Abstract: A method for forming a nanopore device includes providing a sapphire substrate and forming oxide layers on the front and back sides of the sapphire substrate. The oxide layer on the back is patterned to form an etch mask. The method also includes performing a crystalline orientation dependent wet anisotropic etch on the backside of the sapphire substrate using the etch mask to form a cavity having sloped sides to expose a portion of the first oxide layer. A silicon nitride membrane layer is formed on the oxide layer on the front side of the sapphire substrate. Next, the exposed portion of the oxide layer in the cavity is removed to cause the exposed portion of the silicon nitride membrane layer to be suspended over the cavity in the sapphire substrate. Subsequently, an opening is formed in the suspended portion of the silicon nitride membrane layer to form the nanopore.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: March 14, 2023
    Assignee: Roche Sequencing Solutions, Inc.
    Inventor: Chao Wang
  • Patent number: 11605567
    Abstract: Disclosed are a method of monitoring a semiconductor device fabrication process and a method of fabricating a semiconductor device using the same. The monitoring method may include determining a normalization range of a target byproduct, which is a measurement target of byproducts produced in a chamber by an etching process, the byproducts including the target byproduct and a non-target byproduct, the target byproduct including first and second target byproducts, which are respectively produced by and before the etching process on a to-be-processed layer, obtaining a first index from a ratio of the target byproduct to the non-target byproduct, obtaining a second index by subtracting an emission intensity of the second target byproduct from the first index, obtaining a third index by integrating the second index on a time interval, and estimating a result of the etching process and presence or absence of a failure, based on the third index.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: March 14, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jitae Park, Youngjoo Lee, Taekyun Kang, Doo Young Gwak, Aekyung Kim, Hyowon Bae, Kyunggon You, Seongjin In, Sang Yoon Han
  • Patent number: 11600475
    Abstract: A plasma processing apparatus includes a main container, one or more radio frequency antennas, a plurality of metal windows, and a plasma detector. The one or more radio frequency antennas are configured to generate inductively coupled plasma in a plasma generation region in the main container. The metal windows are disposed between the plasma generation region and the radio frequency antennas while being insulated from each other and from the main container. Further, a plasma detector is connected to each of the metal windows and configured to detect a plasma state.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: March 7, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Taro Ikeda, Mikio Sato, Eiki Kamata
  • Patent number: 11597039
    Abstract: A wafer producing apparatus detects a facet area from an upper surface of an SiC ingot, sets X and Y coordinates of plural points lying on a boundary between the facet area and a nonfacet area in an XY plane, and sets a focal point of a laser beam having a transmission wavelength to SiC inside the SiC ingot at a predetermined depth from the upper surface of the SiC ingot. The predetermined depth corresponds to the thickness of the SiC wafer to be produced. A control unit increases the energy of the laser beam and raises a position of the focal point in applying the laser beam to the facet area as compared with the energy of the laser beam and a position of the focal point in applying the laser beam to the nonfacet area, according to the X and Y coordinates.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: March 7, 2023
    Assignee: DISCO CORPORATION
    Inventors: Ryohei Yamamoto, Kazuya Hirata
  • Patent number: 11594440
    Abstract: A method reduces differences in chucking forces that are applied by two electrodes of an electrostatic chuck, to a substrate disposed atop the chuck. The method includes providing initial chucking voltages to each of the two electrodes, and measuring an initial current provided to at least a first electrode of the two electrodes. The method further includes initiating a process that affects a DC voltage of the substrate, then measuring a modified current provided to at least the first electrode, and determining, based at least on the initial current and the modified current, a modified chucking voltage for a selected one of the two electrodes, that will reduce chucking force imbalance across the substrate. The method also includes providing the modified chucking voltage to the selected one of the two electrodes.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: February 28, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Jian Li, Juan Carlos Rocha-Alvarez, Dmitry A. Dzilno
  • Patent number: 11594424
    Abstract: A substrate processing method is a method of processing a substrate on which a metal-containing liquid for a film below a resist is applied, wherein prior to a heating process of performing a heat treatment on the substrate applied with the metal-containing liquid, the substrate processing method includes: a deprotection promoting process of promoting deprotection of functional groups in a material for the film included in the substrate on which the metal-containing liquid has been applied; a solvent removing process of removing a solvent included in the metal-containing liquid on the substrate; and a moisture absorbing process of bringing a surface of the substrate into contact with moisture.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: February 28, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takahiro Shiozawa, Masashi Enomoto
  • Patent number: 11594417
    Abstract: A technique of etching Si on a substrate having Si and another material with a high selectivity using a simple gas system is provided. In an etching method, the substrate having the Si and another material is provided, and the Si is selectively etched over the above-described another material by supplying a germanium-containing gas as an etching gas to the substrate.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: February 28, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kazuhito Miyata, Nobuhiro Takahashi, Takehiko Orii, Shunta Furutani, Shoi Suzuki
  • Patent number: 11591495
    Abstract: A neutral to alkaline chemical mechanical composition for polishing tungsten includes, as initial components: water; an oxidizing agent selected from an iodate compound, a periodate compound and mixtures thereof; colloidal silica abrasive particles including a nitrogen-containing compound; optionally, a pH adjusting agent; and, optionally, a biocide. The chemical mechanical polishing method includes providing a chemical mechanical polishing pad, having a polishing surface; creating dynamic contact at an interface between the polishing pad and the substrate; and dispensing the neutral to alkaline chemical mechanical polishing composition onto the polishing surface at or near the interface between the polishing pad and the substrate; wherein some of the tungsten is polished away from the substrate and, further, to at least inhibit static etch of the tungsten.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: February 28, 2023
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Yi Guo, Tony Quan Tran
  • Patent number: 11584989
    Abstract: Provided are a method of selectively etching a film primarily containing Si, such as polycrystalline silicon (Poly-Si), single crystal silicon (single crystal Si), or amorphous silicon (a-Si) as well as a method for cleaning by removing a Si-based deposited and/or attached matter inside a sample chamber of a film forming apparatus, such as a chemical vapor deposition (CVD) apparatus, without damaging the apparatus interior. By simultaneously introducing a monofluoro interhalogen gas (XF, where X is any of Cl, Br, and I) and nitric oxide (NO) into an etching or a film forming apparatus, followed by thermal excitation, it is possible to selectively and rapidly etch a Si-based film, such as Poly-Si, single crystal Si, or a-Si, while decreasing the etching rate of SiN and/or SiO2. It is also possible to perform cleaning by removing a Si-based deposited and/or attached matter inside a film forming apparatus, such as a CVD apparatus, without damaging the apparatus interior.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: February 21, 2023
    Assignee: KANTO DENKA KOGYO CO., LTD.
    Inventors: Yoshinao Takahashi, Katsuya Fukae, Korehito Kato
  • Patent number: 11587770
    Abstract: A substrate treating apparatus includes a chamber having a process space therein, a substrate support unit that supports a substrate in the process space, a gas supply unit that supplies gas into the process space, and a plasma generation unit that generates plasma from the gas, wherein the substrate support unit includes a substrate support part that supports the substrate, a focus ring that surrounds the substrate support part, an insulator located below the focus ring and having a groove formed therein, an electrode provided in the groove formed in the insulator, and an impedance controller that is connected with the electrode and that adjusts impedance of the electrode, and the impedance controller includes a resonance control circuit that adjusts a maximum value of current applied to the electrode and an impedance control circuit that controls an incidence angle of plasma ions in an edge region of the substrate.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: February 21, 2023
    Assignee: SEMES CO., LTD.
    Inventors: Jamyung Gu, Jong-Hwan An, Goon Ho Park, Taehoon Jo, Shant Arakelyan
  • Patent number: 11587581
    Abstract: A near-field transducer or heat sink is formed via a first process. The near-field transducer or heat sink is transfer-printed to a read/write head via a second process.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: February 21, 2023
    Assignee: Seagate Technology LLC
    Inventors: Mark Gubbins, Roger L. Hipwell, Jr., Marcus B. Mooney, Mark Ostrowski, Tong Zhao, Michael J. Hardy, Michael Christopher Kautzky, Neil Zuckerman, Declan Macken, Francis A. McGinnity
  • Patent number: 11574813
    Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which a substrate comprising a metal, metal oxide, metal nitride or metal oxynitride layer is contacted with an etch reactant comprising an vapor-phase N-substituted derivative of amine compound. In some embodiments the etch reactant reacts with the substrate surface to form volatile species including metal atoms from the substrate surface. In some embodiments a metal or metal nitride surface is oxidized as part of the ALE cycle. In some embodiments a substrate surface is contacted with a halide as part of the ALE cycle. In some embodiments a substrate surface is contacted with a plasma reactant as part of the ALE cycle.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: February 7, 2023
    Assignee: ASM IP HOLDING B.V.
    Inventors: Charles Dezelah, Varun Sharma
  • Patent number: 11566177
    Abstract: The present invention aims to provide a dry etching agent having less load on global environment and capable of anisotropic etching without the use of special equipment and obtaining a good processing shape and to provide a dry etching method using the dry etching agent. The dry etching agent according the present invention contains at least a hydrofluoroalkylene oxide represented by the following chemical formula: CF3—CxHyFzO (where x=2 or 3; y=1, 2, 3, 4 or 5; and z=2x?1?y) and having an oxygen-containing three-membered ring. The dry etching method according to the present invention includes selectively etching of at least one kind of silicon-based material selected from the group consisting of silicon dioxide, silicon nitride, polycrystalline silicon, amorphous silicon and silicon carbide with the use of a plasma gas generated by plasmatization of the dry etching agent.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: January 31, 2023
    Assignee: Central Glass Company, Limited
    Inventors: Hiroyuki Oomori, Akifumi Yao, Takashi Kashiwaba