Patents Examined by Brandon S Cole
  • Patent number: 10446195
    Abstract: Disclosed are apparatuses and methods for controlling gate-induced drain leakage current in a transistor device. An apparatus may include a first biasing circuit stage configured to provide a biasing voltage on a biasing signal line, the biasing voltage based on a current through a first resistor associated with the first biasing circuit stage, a voltage generation circuit stage coupled to the first biasing circuit stage, the voltage generation circuit stage having an output transistor that is coupled to the biasing signal line through a gate terminal of the output transistor, and an output line coupled to the voltage generation circuit stage and configured to provide an output voltage signal having a steady-state voltage that is less than a power supply voltage by an amount that corresponds to a voltage drop across the first resistor associated with the first biasing circuit stage.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: October 15, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Dong Pan, Jun Wu
  • Patent number: 10437305
    Abstract: A power apparatus having expandable outlet and outlet expanding method thereof, the power apparatus comprises a plurality of outlets, a first processor and a first network interface; the first processor is electrically connected a switch, the first processor can determine whether the switch be in an expandable outlet mode or not, the first network interface electrically connected to the first processor; wherein the first processor can be provided with a first user interface, the first user interface can be provided with outlet information of each outlet, when the switch be in the expandable outlet mode, the first user interface can increase expanded outlet information of amount X under at least one of the outlet information, therefore at least one outlet can be provided with expandability.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: October 8, 2019
    Assignee: CYBER POWER SYSTEMS, INC.
    Inventor: Hung-Chun Chien
  • Patent number: 10432018
    Abstract: A power supply bus circuit includes a high-voltage power supply circuit, the high-voltage power supply circuit includes at least two first alternating current/direct current converters and further includes at least two high-voltage direct current power supply buses, and the first alternating current/direct current converter connects to mains, adjusts the connected mains into a high-voltage direct current, and outputs the high-voltage direct current to the high-voltage direct current power supply bus that is electrically connected to the first alternating current/direct current converter, where the high-voltage power supply circuit further includes at least one first direct current/direct current converter, where the first direct current/direct current converter performs voltage conversion on the high-voltage direct current between two high-voltage direct current power supply buses connected to the first direct current/direct current converter.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: October 1, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Zhen Qin, Fanglin Li, Boning Huang
  • Patent number: 10431055
    Abstract: Disclosed is a battery interconnected detection and alert device system with building structure vibrational alert. The system includes of one or more alert devices wired into a dedicated circuit with a single location housing a DC power backup source, such as a rechargeable DC battery. The DC power backup source may be replaceable or rechargeable with DC current from an AC-DC transformer-rectifier, a photovoltaic cell, or other means. An electrical relay within the system provides a current to the dedicated circuit by selecting between the line-voltage alternating current source and the DC power backup. When activated, the detection and alert device generates a distinctive pulsed vibrational alert transmitted through the building structure to beds and other furniture resting on the floor, and additionally transmitted through the air as pressure waves which are perceived by hearing-impaired and other persons alerting them to a possible emergency situation.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: October 1, 2019
    Assignee: Vireo Tech, LLC
    Inventors: Preston Palmer, Wesley Palmer, Larkin Palmer
  • Patent number: 10425071
    Abstract: The present disclosure describes aspects of a fast settling peak detector. In some aspects, a peak detector circuit includes a first transistor having a gate coupled to an input of the circuit at which a signal is received and a drain coupled to a source of a second transistor. Current may flow in the first and second transistors responsive to the signal. The circuit also includes a third transistor having a gate coupled, via a signal-inverting component, to the input of the circuit and a drain coupled to a source of a fourth transistor. Through an inversion of the signal, other current flowing in the third and fourth transistor can reduce or cancel a frequency component of the current in the first and second transistors. In some cases, this precludes a need to filter the frequency component from an output of the circuit.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: September 24, 2019
    Assignee: QUALCOMM Incorporated
    Inventor: Rahul Karmaker
  • Patent number: 10423878
    Abstract: Artificial neuron apparatus includes first and second resistive memory cells. The first resistive memory cell is connected in first circuitry having a first input and output. The second resistive memory cell is connected in second circuitry having a second input and output. The first and second circuitry are operable in alternating read and write phases to apply a programming current to their respective memory cells on receipt of excitatory and inhibitory neuron input signals, respectively. During the write phase, resistance of the respective cells is changed in response to successive excitatory and inhibitory neuron input signals. During the read phase, a read current is applied to their respective cells to produce first and second measurement signals, respectively. An output circuit connected to the first and second outputs produces a neuron output signal at a neuron output when a difference between the first and second measurement signals traverses a threshold.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: September 24, 2019
    Assignee: International Business Machines Corporation
    Inventors: Evangelos S. Eleftheriou, Lukas Kull, Manuel Le Gallo-Bourdeau, Angeliki Pantazi, Abu Sebastian, Tomas Tuma
  • Patent number: 10418193
    Abstract: A controllable light source is provided that includes a load control circuit and an integrated lighting load. The controllable light source is configured to receive wirelessly communicated commands transmitted by a remote control device associated with the controllable light source, such as a rotary remote control device. The controllable light source may include an actuator for associating the controllable light source with the remote control device, such that the load control circuit is operable to adjust the intensity of the lighting load in response to wireless signals received from the remote control device. The controllable light source may support the actuator such that the actuator may be actuated when the controllable light source is installed in a fixture.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: September 17, 2019
    Assignee: Lutron Tehnology Company LLC
    Inventors: Matthew J. Swatsky, Daniel J. Osle, Robert C. Newman, Jr., Daniel Curtis Raneri
  • Patent number: 10415996
    Abstract: The invention relates to a universal interface (INT) arranged to be positioned between a detector (D) and a monitoring-control unit of equipment and comprising: a connector (40) with at least four input connection points configured for being connected to the detector (D) and notably comprising a connection point designed to be connected to a first output of the detector for receiving a first detector output signal (S1_D) and another connection point designed to be connected to a second output of the detector for receiving a second detector output signal (S2_D), a processing unit (UC) arranged for converting each detector output signal (S1_D, S2_D) into binary information to be sent to the monitoring-control unit of equipment and which is representative of a switched status or of a non-switched status of each output of the detector (D).
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: September 17, 2019
    Assignee: SCHNEIDER ELECTRIC INDUSTRIES SAS
    Inventors: Loic Caseras, Mireille Roger, Alain Tardivon
  • Patent number: 10418975
    Abstract: An apparatus is provided which comprises a clock inverter having an input coupled to a clock node, the clock inverter having an output, wherein the clock inverter has an N-well which is coupled to a first power supply; and a plurality of sequential logics coupled to the output of the clock inverter and also coupled to the clock node, wherein at least one sequential logics of the plurality of the sequential logics has an N-well which is coupled to a second power supply, wherein the second power supply has a voltage level lower than a voltage level of the first power supply.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: September 17, 2019
    Assignee: Intel Corporation
    Inventors: Amit Agarwal, Steven K. Hsu, Ram K. Krishnamurthy
  • Patent number: 10411472
    Abstract: A distributed method is provided for controlling electrical power in a microgrid, wherein a plurality of distributed generators supply electrical power to the microgrid, and each of the distributed generators is connected to a controller for controlling the real and reactive output power from the distributed generator.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: September 10, 2019
    Assignee: ABB SCHWEIZ AG
    Inventor: Ritwik Majumder
  • Patent number: 10404249
    Abstract: A system including a power supply and a clock circuitry to generate a plurality of clock signals. Each clock signal is synchronous with a primary clock signal. First, second, and third clock signals of the plurality of clock signals are asynchronous to each other. The system further includes a plurality of switches. Each switch of the plurality of switches is communicatively coupled to the power supply and the clock circuitry. A first switch of the plurality of switches receives the first clock signal, a second switch of the plurality of switches receives the second clock signal, and a third switch of the plurality of switches receives the third clock signal.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: September 3, 2019
    Assignee: Life Technologies Corporation
    Inventors: Jeremy Jordan, Todd Rearick
  • Patent number: 10404242
    Abstract: A two-stage high-power RF limiter circuit for an RF signal receiver incorporates a heavy limiting stage to limit high energy pulses of a received RF signal to a desired power threshold over a sustained time period, while a light limiting stage reacts quickly to high energy pulses to reduce spike leakage associated with the slower reaction time of the heavy limiting stage. Both heavy and light limiting stages incorporate PIN diodes biased to a voltage just below the desired power threshold (the light limiter biased to a slightly higher voltage than the heavy limiter) so the PIN diodes do not activate until power levels are high enough to warrant limiting. The holdoff voltage across the PIN diodes is maintained by Zener diodes biased to a voltage corresponding to the power threshold, allowing the PIN diodes to self-bias once the power threshold is reached.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: September 3, 2019
    Assignee: Rockwell Collins, Inc.
    Inventors: Timothy S. Lappe, John J. Jorgenson, Jeffrey D. Schmidt, Joseph F. Jiacinto, Steven R. Brown
  • Patent number: 10396778
    Abstract: A device is disclosed that includes a circuit block coupled to a local power node, and a power gating circuit coupled between the local power node and a global power supply. In one embodiment, the power gating circuit includes a first plurality of first switching devices with a first threshold voltage, and a second plurality of second switching devices with a second threshold voltage that is different from the first voltage threshold. The power gating circuit may isolate the local power node from the global power supply based on an isolation signal.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: August 27, 2019
    Assignee: Apple Inc.
    Inventors: Sambasivan Narayan, Suparn Vats, Sangeetha Mani
  • Patent number: 10396657
    Abstract: An electronic device includes: a clock booster configured to generate a boosted intermediate voltage greater than a source voltage, wherein the clock booster includes: a controller capacitor configured to store energy for providing a gate signal, wherein the gate signal is for controlling charging operations to generate the boosted intermediate voltage based on the source voltage, and a booster capacitor configured to store energy according to the gate signal for providing the boosted intermediate voltage, wherein the booster capacitor has greater capacitance level than the controller capacitor; and a secondary booster operatively coupled to the clock booster, the secondary booster configured to generate an output voltage based on the boosted intermediate voltage, wherein the output voltage is greater than both the source voltage and the boosted intermediate voltage.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: August 27, 2019
    Assignee: Micron Technology, Inc.
    Inventor: Michele Piccardi
  • Patent number: 10396771
    Abstract: A voltage supply circuit is provided. The voltage supply circuit is capable of generating a loading current at an output node. The voltage supply circuit includes a plurality of inductors and a plurality of driver circuits. The plurality of inductors are coupled to the output node. Each inductor has an inductance value. The plurality of driver circuits are coupled to the plurality of inductors, respectively. The inductance values of at least two inductors among the plurality of inductors are greater than the inductance value of another inductor.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: August 27, 2019
    Assignee: MediaTek Inc.
    Inventors: Chih-Chen Li, Kuan-Yu Fang, Kuan-Yu Chu, Yen-Hsun Hsu
  • Patent number: 10389344
    Abstract: A voltage supply circuit is provided. The voltage supply circuit is capable of operating at a first mode and generates a loading current at an output node. The voltage supply circuit includes a plurality of inductors and a plurality of drier circuits. The plurality of inductors are coupled to the output node. Each inductor has an inductance value. The plurality driver circuits are coupled to the plurality of inductors respectively. The inductance value of a first inductor among the plurality of inductors is greater than the inductance values of the other inductor.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: August 20, 2019
    Assignee: MediaTek Inc.
    Inventors: Chien-Wei Kuan, Yen-Hsun Hsu, Tun-Shih Chen
  • Patent number: 10389342
    Abstract: A comparator includes a resolver controlled by a resolver clock signal and a differential amplifier controlled by a sampling clock signal. The resolver clock signal and the sampling clock signal are such that amplification at the differential amplifier during the reset phase of the resolver clock signal and the reset phase of the sampling clock signal begins during the resolving phase of the resolver.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: August 20, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Dacheng Zhou, Daniel Alan Berkram, Ryan Barnhill, Christopher Allan Poirier, Christopher Wilson
  • Patent number: 10381880
    Abstract: A plurality of integrated antenna structures described herein may be formed in a flat panel antenna arrays which may be arranged in equally spaced grid and may be used in transmitters for sending focused RF waves towards a receiver for wireless power charging or powering. Each of the integrated antenna structures may include planar inverted-F antennas (PIFAs) integrated with artificial magnetic conductor (AMC) metamaterials. As a result of their high directionality and form factor, the integrated antenna structures may be placed very close together, thus enabling the integration of a high number of integrated antenna structures in a single flat panel antenna array which may fit about 400+ integrated antenna structures. Each integrated antenna structure in the flat panel antenna arrays may be operated independently, thus enabling an enhanced control over the pocket forming. In addition, the higher number of integrated antenna structures may contribute to a higher gain for the flat panel antenna arrays.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: August 13, 2019
    Assignee: Energous Corporation
    Inventors: Michael A. Leabman, Harry Contopanagos
  • Patent number: 10379568
    Abstract: The present invention relates to an energy supply circuit for instantly supplying power without a power converter and an electronic device which operates only when energy is supplied from an energy source using the same. An energy supply circuit without a power converter according to the present invention comprises: an energy extraction unit 10 for generating power from an energy source; and output unit 20 for supplying power to an external electronic circuit; a switch unit 30 interposed between the energy extraction unit and the output unit 20 to connect an output end of the energy extraction unit 10 to the output unit 20 when switched on; and a maximum power point tracking control unit 40 for generating an open/closed signal for opening or closing the switch unit 30 according to the voltage and current of the energy extraction unit 10.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: August 13, 2019
    Assignees: Seoul National University R&DB Foundation, Center for Integrated Smart Sensors Foundation
    Inventors: Nae-Hyuck Chang, Jin-Young Yang, Chai-Yeol Rim, Chong-Min Kyung
  • Patent number: 10375803
    Abstract: A load control device may be configured to control multiple characteristics of one or more electrical loads such as the intensity and color of a lighting load. The load control device may include concentric rotating portions for adjusting the multiple characteristics. A control circuit of the load control device may be configured to generate control data for controlling one or more of the characteristics of the electrical loads in response to rotations of the concentric rotating portions. The control circuit may be further configured to provide feedback regarding the control being applied on one or more visual indicators. The load control device may be a wall-mounted dimmer device or a battery-powered remote control device.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: August 6, 2019
    Assignee: Lutron Technology Company LLC
    Inventors: Chris Dimberg, Thomas M. Shearer, Daniel L. Twaddell