Patents Examined by Brandon S Cole
  • Patent number: 10296026
    Abstract: A low-noise voltage reference generator that utilizes internal gain and feedback to generate an output signal having reduced sensitivity to power supply variations and loading conditions is described. A method includes generating a current based on a voltage drop across a resistor. The voltage drop is based on a second voltage drop across a gate terminal of a transistor and a source terminal of the transistor. The method includes the current using a reference voltage to generate a mirrored current through a node coupled to the drain terminal of the transistor. The method includes generating a level-shifted voltage using a voltage on the node. The method includes buffering the level-shifted voltage using a power supply voltage to generate the reference voltage.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: May 21, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Aaron J. Caffee, Vaibhav Karkare
  • Patent number: 10284184
    Abstract: A charge pump unit including a capacitor that accumulates a charge on an output node according to a first clock signal and a transfer gate that takes in and applies a voltage of an input node to the output node according to a second clock signal received at a control terminal is controlled in the following manner. If the ratio of the total time of periods in which the voltage of the output node is higher than a target voltage in a predetermined monitoring period is smaller than or equal to a first threshold, i.e., if the charge pump unit executes a boosting operation for a relatively long period, a pulse voltage value of the second clock signal is increased.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: May 7, 2019
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Hiroyuki Tanikawa
  • Patent number: 10277235
    Abstract: A fine-adjustment synthesizer includes a fractional phase-locked loop having a reference integer frequency divider, a phase comparator, a loop filter, a frequency variable oscillator, a mixer, a baud-pass filter, and a feedback path programmable fractional frequency divider. A coarse-adjustment synthesizer includes an integer-type phase-locked loop having a reference integer frequency divider, a phase comparator, a loop filter, a frequency variable oscillator, a band-pass filter, and a feedback path programmable integer frequency divider. An output of a reference signal source is input in parallel to both the fine-adjustment synthesizer and the coarse-adjustment synthesizer. An output of the frequency variable oscillator in the fine-adjustment synthesizer and an output of the frequency variable oscillator in the coarse-adjustment synthesizer are guided to the mixer and an output signal of the fine-adjustment synthesizer is guided to an output end.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: April 30, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuhisa Yamauchi, Nobuhiro Tokumori, Kenji Miyasaka, Takashi Fujiwara, Masaki Kawamura
  • Patent number: 10277223
    Abstract: A charge injection compensation circuit compensates for charge injection by a field-effect transistor (FET) switch regardless of a supply voltage. The charge injection compensation circuit includes a main switch that injects charge into an electronic circuit when switched off, and a charge storage device that stores the injected charge until it can be dissipated to a dissipating node. Upon the main switch being controlled to switch off, a pulse generator circuit controls a charge storage switch to switch on to transfer the charge injected from the main switch to the charge storage device and then switch off. A dissipation circuit dissipates the charge from the charge storage device to a dissipating node.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: April 30, 2019
    Assignee: Analog Devices Global
    Inventors: Jofrey G. Santillan, David Aherne
  • Patent number: 10268846
    Abstract: A high voltage inductive adder is disclosed. In some embodiments, the high voltage inductive adder comprising a first adder circuit and a second adder circuit. The first adder circuit including a first source; a first switch electrically coupled with the first source; a first transformer core; and a first plurality of primary windings wound about the first transformer core and electrically coupled with the first switch. The second adder circuit including a second source; a second switch electrically coupled with the second source; a second transformer core; and a second plurality of primary windings wound about the second transformer core and electrically coupled with the second switch. The high voltage inductive adder comprising one or more secondary windings wound around both the first transformer core and the second transformer core and an output coupled with the plurality of secondary windings.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: April 23, 2019
    Assignee: EAGLE HARBOR TECHNOLOGIES, INC.
    Inventors: Kenneth E. Miller, James R. Prager, Timothy M. Ziemba, John G. Carscadden, Christopher Matthew Bowman, Ilia Slobodov
  • Patent number: 10270254
    Abstract: Methods and apparatus for controlling an interconnection device may be provided. Sockets of the interconnection device may be configured to electrically couple to respective energy-generation modules. In some examples, the interconnection device may include a connector, memory, and a processor configured to execute instructions for managing the electrical configuration of the sockets.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: April 23, 2019
    Assignee: SolarCity Corporation
    Inventors: Sandeep Narla, Alex Mayer, Brett Alten
  • Patent number: 10270456
    Abstract: An apparatus includes a phase interpolator configured to receive a four-phase signal and output a six-phase signal, and a summing network configured to receive the six-phase signal and output a two-phase signal, wherein: a first phase, a third phase, and a fifth phase of the six-phase signal are summed to generate a second phase of the two-phase signal, while a second phase, a fourth phase, and a sixth phase of the six-phase signal are summed to generate a first phase of the two-phase signal.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: April 23, 2019
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chia-Liang (Leon) Lin, Wenbo Xu, Fei Song
  • Patent number: 10269916
    Abstract: A lateral double-diffused metal-oxide-semiconductor field effect transistor includes a silicon semiconductor structure, first and second gate structures, and a trench dielectric layer. The first and second gate structures are disposed on the silicon semiconductor structure and separated from each other in a lateral direction. The trench dielectric layer is disposed in a trench in the silicon semiconductor structure and extends at least partially under each of the first and second gate structures in a thickness direction orthogonal to the lateral direction.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: April 23, 2019
    Assignee: Maxim Integrated Products, Inc.
    Inventors: John Xia, Marco A. Zuniga, Badredin Fatemizadeh, Vijay Parthasarathy
  • Patent number: 10270494
    Abstract: Exemplary embodiments are directed to a device include a parasitic coil for protection of the device. A device may include a first circuit configured to receive a first transmitted signal at an operational frequency. The device may also include a second circuit a second circuit configured to generate a field that opposes at least one of an undesirable portion of a wireless power field of the first transmitted signal and a portion of another wireless power field proximate the first circuit, the another wireless power field generated by a second transmitted signal at a non-operational frequency of the first circuit.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: April 23, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Zhen Ning Low, Charles E. Wheatley, III, Sergio P. Estrada
  • Patent number: 10270437
    Abstract: An RF switch having an M number of FETs that are stacked in series and coupled between a first end node and a second end node wherein each of the M number of FETs has a gate is disclosed. A resistive network is coupled between a common mode (CM) node and the gate for each of the M number of FETs such that a resistance between the CM node and each gate of the M number of FETs is substantially equal. Biasing circuitry coupled to the CM node is configured to sense a breakdown current flowing through the CM node, and in response to the breakdown current, generate a compensation signal that counters deviations of drain to source voltage across individual ones of the M number of FETs due to an applied RF voltage across the M number of FETs while the RF switch is in an OFF state.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: April 23, 2019
    Assignee: Qorvo US, Inc.
    Inventors: Baker Scott, George Maxim, Dirk Robert Walter Leipold, Daniel Charles Kerr
  • Patent number: 10263314
    Abstract: A power combiner in the form of a balanced LC combiner is provided. Inputs of the power combiner are isolated from one another via at least one RC matching element. The at least one RC matching element is dimensioned such that the connection between the inputs is at a stable potential during operation of the power combiner at at least one position. The power combiner can be formed in a planar design and have electrically conductive layers running parallel to one another. At least an inductor and a combiner capacitor are formed in the electrically conductive layers. A power combiner arrangement including the power combiner and high-frequency signal sources attached at least two inputs is also provided. The high-frequency signal sources can be in the form of frequency-agile transistor amplifiers.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: April 16, 2019
    Assignee: TRUMPF Huettinger GmbH + Co. KG
    Inventors: Andre Grede, Alexander Alt, Daniel Gruner, Anton Labanc
  • Patent number: 10264650
    Abstract: A contactless energy transfer system has a first stationary platform and a second movable platform. The first platform has at least one light source coupled to a power source. The second separate platform has at least one photovoltaic module mounted thereon. The at least one photovoltaic module is coupled to an energy storage system mounted on the second platform such that any light received at the photovoltaic module is converted to electrical energy stored in the energy storage system. The second platform is configured to move in close proximity to the first platform along a predetermined pathway. The predetermined pathway may be linear or rotary. The light sources are positioned and configured to direct light at the photovoltaic modules during a predetermined interval when the second platform is in close proximity to the first platform (for the linear pathway) or constantly or at predetermined intervals (for the rotatory pathway).
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: April 16, 2019
    Assignee: The Boeing Company
    Inventor: Douglas R. Jungwirth
  • Patent number: 10263431
    Abstract: Supply system for electronic boards of an electrical distribution system comprising at least two protection boards (2a, 2b) each able to control the supply of at least one protected pathway (3a, 3b) on the basis of a power line (4a, 4b), characterized by the fact that each protection board (2a, 2b) comprises at least one voltage converter (13a, 13b) able to provide an internal supply voltage of the protection board on the basis of a supply voltage, the voltage converter (13a) of a first protection board (2a) being connected to at least one second protection board (2b) so as to be able to provide the internal supply of the second protection board (2b) in case of failure of the voltage converter (13b) of the second protection board (2b).
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: April 16, 2019
    Assignee: ZODIAC AERO ELECTRIC
    Inventors: Jean-Clair Pradier, Jean-Pierre Balbinot
  • Patent number: 10263478
    Abstract: A wireless power supply system includes a power supply coil installed on the ground, an inner balloon in which a power supply coil is mounted and configured to expand and contract to adjust a vertical position of the power supply coil, and an outer balloon provided to cover both the power supply coil and the inner balloon and configured to expand to occupy a space between the power supply coil and a power receiving coil, and wirelessly supplies power from the power supply coil to the power receiving coil.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: April 16, 2019
    Assignee: IHI Corporation
    Inventors: Yuji Maekawa, Motonao Niizuma
  • Patent number: 10263511
    Abstract: A charge pumping apparatus in accordance with an embodiment may include a charge pump output voltage detector, a pump oscillator, and a charge pump switching controller. The charge pump output voltage detector may detect a charge pump output voltage, and may selectively output an enable signal according to the detected charge pump output voltage. The pump oscillator may output an oscillation signal during a period of time when the enable signal is activated. The charge pump switching controller may selectively operate one of a first pump and a second pump according to a predetermined stabilization time, the enable signal, and the oscillation signal.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: April 16, 2019
    Assignee: SK hynix Inc.
    Inventor: Myung Hwan Lee
  • Patent number: 10262973
    Abstract: Aspects of the disclosure provide a chip package that includes a first die and a second die. The first die has a processing circuit and a first interface circuit. The second die is disposed in a proximity to the first die and coupled to the first die. The second die includes internal functional circuits, two or more second interface circuits with an identical configuration, and a switch circuit. A specific second interface circuit is electrically connected to the first interface circuit via wires. The switch circuit is configured to select the specific second interface circuit from the two or more second interface circuits, and couple the specific second interface circuit to the internal functional circuits on the second die.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: April 16, 2019
    Assignee: Marvell International Ltd.
    Inventors: Claus F. Hoyer, Thomas Povlsen
  • Patent number: 10263605
    Abstract: The invention discloses a frequency extender, including a preamplifier to receive a RF input signal and output a pre-amplified RF signal, a series frequency multiplier branch, a series frequency divider branch and a multiplexer. The output port of the preamplifier couples to one input port of the multiplexer. The series frequency multiplier branch and the series divider branch are coupled to receive the pre-amplified RF signal. The output port of each frequency multiplier in the series multiplier branch and/or the output port of each frequency divider in the series divider branch are coupled to the input ports of the multiplexer respectively. The multiplexer couples to receive the pre-amplified RF signal, the frequency-multiplied RF signal and the frequency-divided signal, the multiplexer selects a signal from the received signals and outputs a multiplexer output signal based on the selected signal.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: April 16, 2019
    Inventor: Cemin Zhang
  • Patent number: 10256826
    Abstract: A non-linear spread spectrum clock generator using a linear combination may include a phase locked loop configured to receive a reference signal and generate an output signal according to the reference signal and a feedback signal that compensates for the output signal. The phase locked loop may include a divider configured to generate the feedback signal by dividing the output signal by a divisional ratio. The non-linear spread spectrum clock generator may include a non-linear profile generator configured to generate a non-linear signal by selectively outputting selected ones of a plurality of signals according to the absolute magnitudes of the signals and a delta-sigma modulator configured to receive the outputted linear ramp function and to change the divisional ratio. The signals may vary according to different linear ramp functions. The different ramp functions may include different slopes and initiation time values.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: April 9, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seungjin Kim, Jihyun Kim, Taeik Kim
  • Patent number: 10256716
    Abstract: A voltage feed-forward circuit, a multiplier using the voltage feed-forward circuit, and a power factor correction circuit using the multiplier. The voltage feed-forward circuit is used to maintain and output a peak voltage (Vff) of an input voltage (Vin), and includes first switch element (S1), a logic control unit (U1), a second switch element (S2), a first capacitor (C1), a third switch element (S3) and a second capacitor (C2). The first control signal (?1) and the second control signal (?2) begin to be provided at the same time, and the first control signal (?1) stops being provided when a voltage of the second end of the first capacitor (C1) is greater than the peak voltage (Vff) of the input voltage (Vin).
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: April 9, 2019
    Assignee: COSEMITECH (SHANGHAI) CO., LTD.
    Inventors: Jian You, Xiaoping Yin
  • Patent number: 10250057
    Abstract: A power supply including a bi-directional DC converter and a control method thereof are disclosed herein. The power supply includes first to third terminals, first and second semiconductor switches and a mode switching means. The first terminal is electrically coupled to an external power source. The second terminal is electrically coupled to a load. The third terminal is electrically coupled to a battery. The first and second semiconductor switches are electrically coupled in series between the first and second terminals. The mode switching means is electrically coupled to the first semiconductor switch, the second semiconductor switch and a bi-directional DC converter, respectively. The bi-directional DC converter is further electrically coupled to an intermediate node between the first semiconductor switch and the second semiconductor switch, and to the third terminal.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: April 2, 2019
    Assignee: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTD.
    Inventors: Chen Zhao, Lingdong Zhang