Abstract: A voltage supply circuit is provided. The voltage supply circuit is capable of operating at a first mode and generates a loading current at an output node. The voltage supply circuit includes a plurality of inductors and a plurality of drier circuits. The plurality of inductors are coupled to the output node. Each inductor has an inductance value. The plurality driver circuits are coupled to the plurality of inductors respectively. The inductance value of a first inductor among the plurality of inductors is greater than the inductance values of the other inductor.

Abstract: A comparator includes a resolver controlled by a resolver clock signal and a differential amplifier controlled by a sampling clock signal. The resolver clock signal and the sampling clock signal are such that amplification at the differential amplifier during the reset phase of the resolver clock signal and the reset phase of the sampling clock signal begins during the resolving phase of the resolver.

Abstract: A plurality of integrated antenna structures described herein may be formed in a flat panel antenna arrays which may be arranged in equally spaced grid and may be used in transmitters for sending focused RF waves towards a receiver for wireless power charging or powering. Each of the integrated antenna structures may include planar inverted-F antennas (PIFAs) integrated with artificial magnetic conductor (AMC) metamaterials. As a result of their high directionality and form factor, the integrated antenna structures may be placed very close together, thus enabling the integration of a high number of integrated antenna structures in a single flat panel antenna array which may fit about 400+ integrated antenna structures. Each integrated antenna structure in the flat panel antenna arrays may be operated independently, thus enabling an enhanced control over the pocket forming. In addition, the higher number of integrated antenna structures may contribute to a higher gain for the flat panel antenna arrays.

Abstract: The present invention relates to an energy supply circuit for instantly supplying power without a power converter and an electronic device which operates only when energy is supplied from an energy source using the same. An energy supply circuit without a power converter according to the present invention comprises: an energy extraction unit 10 for generating power from an energy source; and output unit 20 for supplying power to an external electronic circuit; a switch unit 30 interposed between the energy extraction unit and the output unit 20 to connect an output end of the energy extraction unit 10 to the output unit 20 when switched on; and a maximum power point tracking control unit 40 for generating an open/closed signal for opening or closing the switch unit 30 according to the voltage and current of the energy extraction unit 10.

Abstract: A load control device may be configured to control multiple characteristics of one or more electrical loads such as the intensity and color of a lighting load. The load control device may include concentric rotating portions for adjusting the multiple characteristics. A control circuit of the load control device may be configured to generate control data for controlling one or more of the characteristics of the electrical loads in response to rotations of the concentric rotating portions. The control circuit may be further configured to provide feedback regarding the control being applied on one or more visual indicators. The load control device may be a wall-mounted dimmer device or a battery-powered remote control device.

Abstract: A lighting system waveform shaping circuit (WSC) includes a line voltage input, a line voltage output connectable to an input voltage port of a control unit, a neutral line input connectable to a neutral line of a voltage power source, and the WSC including an impedance matching network (IMN) configured to alter an input impedance of the lighting control circuit. In one embodiment, the IMN can include a resistor in series with the line voltage input, and an actively-controlled bypass switch in parallel with the resistor. In another embodiment, the IMN can include respective ferrite chokes surrounding the input and the output voltage lines, a capacitor between the line voltage input and the neutral line input, a capacitor between the neutral line input and a protected earth ground, and a resistor in series between the neutral line input and the lighting control unit neutral line input port.

Abstract: In one embodiment of a wireless power transmitter, two coils are magnetically coupled together by placing both coils on a magnetic layer. A power circuit generates an AC signal of a defined voltage magnitude that causes a current to flow through the first coil, which generates a magnetic field having a first polarity. The second coil is coupled to the first coil. Current flows through the second coil and generates a magnetic field having a second polarity that is opposite from the first polarity. Because the magnetic field generated by each coil has a different polarity, the magnetic fields attract and form a strong magnetic field that flows from the first coil to the second coil. The strong magnetic field can transfer greater amounts of power to a receiver in comparison to coil configurations that emit magnetic fields in the same direction that repel one another.

Abstract: The disclosure provides a circuit that includes an integrator that generates an integrated signal in response to a current signal. A comparator is coupled to the integrator and receives the integrated signal and a primary reference voltage signal. The comparator generates a feedback signal. A switched capacitor network is coupled across the integrator. The feedback signal activates the switched capacitor network.

Abstract: Systems to wirelessly power transfer to a tailgate are disclosed. An example disclosed vehicle includes a transmitting circuit in a body of the vehicle configured to transmit power via wireless capacitive transfer. The example vehicle also includes a receiving circuit in a tailgate of the vehicle configured to receive power via wireless capacitive transfer.

Abstract: A delay line circuit including: a coarse-tuning arrangement, including delay units, the coarse-tuning arrangement being configured to coarsely-tune an input signal by transferring the input signal through a selected number of the delay units and thereby producing a first output signal; and a fine-tuning arrangement configured to receive the first output signal at a beginning of a signal path which includes at least three serially-connected inverters, finely-tune the first output signal along the signal path, and produce a second output signal at an end of the signal path; the fine-tuning arrangement including: a speed control unit which is selectively-connectable, and a switching circuit to selectively connect the speed control unit to the signal path based on a process-corner signal.

Abstract: Duty cycle correction devices for static compensation of an active clock edge shift. A duty cycle correction circuit in the duty cycle correction device corrects a clock input signal, according to a first control signal. A programmable delay circuit or a modified duty cycle correction circuit in the duty cycle correction device compensates a shift of an active clock edge in a clock output signal of the duty cycle correction circuit, according to a second control signal. A mapping circuit in the duty cycle correction device generates the second control signal by mapping a digital value of the first control signal and a digital value of the second control signal.

Abstract: A system and apparatus relating to a differential charge pump circuit for use in a phase-locked loop (PLL) circuit. A differential charge pump circuit can include a reference current, two sense amplifiers, a common mode control amplifier, and an h-bridge circuit. The h-bridge circuit is coupled to the reference current and the common mode control amplifier. The reference current drives a first portion of the h-bridge circuit and the common mode control amplifier controls a second portion of the h-bridge circuit. The h-bridge circuit also includes first and second nodes. The nodes are inputs to one of the sense amplifiers. The differential charge pump circuit is configured to control a voltage at the first node so that it is substantially equal to a voltage at the second node for a plurality of voltages at the second node. The differential charge pump circuit can also include a transistor with a gate coupled to an output of a sense amplifier.

Abstract: An example current limiting apparatus comprises a first transistor to carry a first current; a sense transistor coupled to the first transistor, the sense transistor to carry a sense current that is a function of the first current; a first amplifier coupled to the first transistor and the sense transistor, the amplifier to achieve a common voltage potential on terminals of the first and the sense transistors; a second amplifier coupled to the first amplifier and the sense transistor, the second amplifier to control the first and sense transistors based on the sense current; and a circuit coupled to the first and second amplifiers, the circuit to control an input to the second amplifier based on an input to the first amplifier such that a current limit of the first transistor remains below a programmed current limit of the first transistor.

Abstract: An embodiment of the invention shows a high-voltage MOS field-effect transistor connected in series with a Schottky diode. When the Schottky diode is forwardly biased, the high-voltage MOSFET can act as a switch and sustain a high drain-to-source voltage. When the Schottky diode is reversely biased, the Schottky diode can protect the integrate circuit where the high-voltage MOSFET is formed, because the integrate circuit might otherwise burn out due to an exceedingly-large reverse current.

Abstract: Apparatuses and methods for providing frequency divided clocks are described. An example apparatus includes a first circuit configured to provide a first intermediate clock responsive, at least in part, to a first input clock, the first intermediate clock being lower in frequency than the first input clock and further includes a second circuit configured to provide a second intermediate clock and a third intermediate clock responsive, at least in part, to a second input clock, the second intermediate clock being complementary to the third intermediate clock and lower in frequency than the second input clock. The apparatus further includes a third circuit configured to select and provide as an output clock one of the second and third intermediate clocks responsive, at least in part, to the first and second intermediate clocks.

Abstract: A switching device according to the present invention comprises: a main circuit including a switching element; a control circuit which generates a control signal for switching the switching element between an on state and an off state; and a first signal line and a second signal line which transfer the control signal outputted from the control circuit, to the main circuit. The value of the characteristic impedance (Zcd) of the first and second signal lines is set between the value of the output impedance (Zab) of the control circuit and the value of the input impedance (Zef) of the main circuit.

Abstract: The invention provides a bond wire arrangement comprising a signal bond wire (1) for operably connecting a first electronic device (6) to a second electronic device (8), and a control bond wire (2) being arranged alongside the signal bond wire at a distance so as to have a magnetic coupling with the signal bond wire (1), and having a first end (11) coupled to ground, and a second end (12) coupled to ground via a resistive element (14). The proposed solution allows the control of the Q factor (losses) of wire bond inductors during assembly phase, which will save time and reduce overall design cycle as compared to known methods.

Abstract: Techniques to compensate non-radiation hardened components for changes in performance that result from exposure to radiation. The techniques of this disclosure apply a predetermined bias signal to a representative non-radiation hardened component while a system is in use. The system determines whether there is a performance change in characteristics, such as voltage response, frequency response, gain, or other characteristics. The system may determine a compensation factor that may restore the desired signal output from the component. The system may compensate a second identical component that is in use in the system with the compensation factor. The component receiving the predetermined bias signal acts as a characterization dosimeter of the component in use in the system. A number of radiation vulnerable components may be characterized simultaneously with exact representative parts. The system may compensate identical component in use in the system with the appropriate compensation factor for each.

Abstract: A power supply control system includes: a current sensor as a first detector detecting current flowing in each controller in an operating state of each controller; a first current controller turned on to supply a driving current to each controller in the operating state of each controller and turned off to disconnect the driving current supply to each controller based on a determination result; a second current controller turned on to supply a dark current to each controller in a power-saving state of each controller and turned off to disconnect the dark current supply to each controller in the operation state of each controller; a dark current sensor as a second detector detecting a voltage drop amount in the power-saving state of each controller; and an anomaly determinator determining existence of anomaly in the power-saving state of each controller based on a detection result obtained from the second detector.

Abstract: The disclosure provides a trimming method, a trimming circuitry, and a trimming system for an IC with memory usage reduction. The method is applicable to a system including a tester, a characteristic adjustable circuit, and a trimming circuitry having a characteristic outputting circuit, a data memory, and a trim memory. The method includes the following steps. Under each condition, output signals respectively corresponding to trim settings are received from the characteristic adjustable circuit by the characteristic outputting circuit to obtain output values of the condition, a statistical parameter associated with the output values of the condition is calculated by the tester. The statistical parameter of at least one of the conditions is written into the data memory by the tester. An optimal trim setting of the characteristic adjustable circuit is determined according to the statistical parameters under all the conditions and written into the trim memory by the tester.