Abstract: A semiconductor structure includes: a first die, comprising a first interconnect structure and a first active pad electrically connected to the first interconnect structure; a first bonding dielectric layer over the first die; a first active bonding via in the first bonding dielectric layer, electrically connected to the first interconnect structure; and a plurality of first dummy bonding vias in the first bonding dielectric layer, wherein the first dummy bonding vias laterally surround the first active bonding via and are electrically floating.

Abstract: In examples, a chip scale package (CSP) comprises a semiconductor die; a conductive terminal coupled to the semiconductor die; and a non-conductive coat covering a backside of the semiconductor die and a sidewall of the semiconductor die. The non-conductive coat has a thickness of less than 45 microns.

Abstract: A process of forming a 3D memory device includes forming a stacked structure with a plurality of stacked layers, etching the stacked structure to form stepped trenches each comprising a plurality of steps, forming a hard mask layer with a plurality of openings over the stepped trenches, forming a photoresist layer over the hard mask layer, and etching through the plurality of openings using the hard mask layer and the photoresist layers as an etch mask to extend a bottom of the stepped trenches to a lower depth.

Abstract: A two part annulus repair rivet for repairing a defect in the annulus of an intervertebral disc includes a first part delivered through a port and adapted to be positioned at an internal surface of an annulus adjacent a defect and a second part adapted to be positioned on an external surface of the annulus adjacent the defect. The first and second parts are secured together, repairing the defect.

Abstract: An image processing apparatus includes a low-resolution image generating circuit configured to generate a low-resolution image including a second pixel corresponding to first pixels based on an input image including the first pixels, and an edge preserving smoothing circuit configured to generate a reliability of the second pixel based on characteristics of values of the first pixels and perform edge preserving smoothing on the input image using a value of the second pixel of which a reflection ratio is adjusted, based on the reliability of the second pixel.

Abstract: The present application describes various embodiments of guides that include one or more removable struts. The guides may include at least two guide portions that are connected to one another via at least one strut. In embodiments, the at least one strut may be designed such that it could be disconnected from at least one of the guide portions. The removable feature of the strut allows a surgeon to perform an osteotomy procedure by using the cutting slots and other relevant markings defined on the secured portions of the guide.

Abstract: A structure and a method of forming are provided. A first work function layer is formed over a first fin and terminates closer to the first fin than an adjacent second fin. A second work function layer is formed over the first work function layer and terminates closer to the second fin than the adjacent second fin. A third work function layer is formed over the first work function layer and the second fin. A conductive layer is formed over the third work function layer.

Abstract: A display panel includes a substrate having a first area and a second area, a non-display area surrounding the first area and the second area, and a display area surrounding the non-display area, a plurality of display elements arranged in the display area, and a plurality of signal lines electrically connected to the plurality of display elements, wherein the plurality of signal lines includes a first signal line and a second signal line neighboring each other and extending in a first direction, wherein the first signal line bypasses in the non-display area along a first side of the first area, and the second signal line bypasses in the non-display area along a second side of the first area, and wherein the first and second signal lines are asymmetrical with respect to a virtual central line through a center of the first area in the first direction.

Abstract: Semiconductor device with multiple independent gates. A gate-controlled semiconductor device includes a first plurality of cells of the semiconductor device configured to be controlled by a primary gate, and a second plurality of cells of the semiconductor device configured to be controlled by an auxiliary gate. The primary gate is electrically isolated from the auxiliary gate, and sources and drains of the semiconductor device are electrically coupled in parallel. The first and second pluralities of cells may be substantially identical in structure.

Abstract: A package includes a device die, an encapsulant encapsulating the device die therein, a first plurality of through-vias penetrating through the encapsulant, a second plurality of through-vias penetrating through the encapsulant, and redistribution lines over and electrically coupling to the first plurality of through-vias. The first plurality of through-vias include an array. The second plurality of through-vias are outside of the first array, and the second plurality of through-vias are larger than the first plurality of through-vias.

Abstract: A chip package includes a chip configured to generate and/or receive a signal; a laminate substrate including a substrate integrated waveguide (SIW) for carrying the signal, the substrate integrated waveguide including a chip-to-SIW transition structure configured to couple the signal between the SIW and the chip and a SIW-to-waveguide transition structure configured to couple the signal out of the SIW or into the SIW, wherein the SIW-to-waveguide transition structure includes a waveguide aperture; and a plurality of electrical interfaces arranged about a periphery of the waveguide aperture, the plurality of electrical interfaces configured to receive the signal from the SIW-to-waveguide transition structure and output the signal from the chip package or to couple the signal to the SIW-to-waveguide transition structure and into the chip package.

Abstract: Certain aspects involve video inpainting in which content is propagated from a user-provided reference video frame to other video frames depicting a scene. One example method includes one or more processing devices that performs operations that include accessing a scene depicting a reference object that includes an annotation identifying a target region to be modified in one or more video frames. The operations also includes computing a target motion of a target pixel that is subject to a motion constraint. The motion constraint is based on a three-dimensional model of the reference object. Further, operations include determining color data of the target pixel to correspond to the target motion. The color data includes a color value and a gradient. Operations also include determining gradient constraints using gradient values of neighbor pixels. Additionally, the processing devices updates the color data of the target pixel subject to the gradient constraints.

Abstract: A redistribution layer is formed on a carrier wafer. A cavity is formed within the redistribution layer. An electro-optical die is flip-chip connected to the redistribution layer. A plurality of optical fiber alignment structures within the electro-optical die is positioned over and exposed to the cavity. Mold compound material is disposed over the redistribution layer and the electro-optical die. A residual kerf region of the electro-optical die interfaces with the redistribution layer to prevent mold compound material from entering into the optical fiber alignment structures and the cavity. The carrier wafer is removed from the redistribution layer. The redistribution layer and the mold compound material are cut to obtain an electro-optical chip package that includes the electro-optical die. The cutting removes the residual kerf region from the electro-optical die to expose the plurality of optical fiber alignment structures and the cavity at an edge of the electro-optical chip package.

Abstract: A field stop insulated gate bipolar transistor (IGBT) fabricated without back-side laser dopant activation or any process temperatures over 450° C. after fabrication of front-side IGBT structures provides activated injection regions with controlled dopant concentrations. Injection regions may be formed on or in a substrate by epitaxial growth or ion implants and diffusion before growth of N field stop and drift layers and front-side fabrication of IGBT active cells. Back-side material removal can expose the injection region(s) for electrical connection to back-side metal. Alternatively, after front-side fabrication of IGBT active cells, back-side material removal can expose the field stop layer (or injection regions) and sputtering using a silicon target with a well-controlled doping concentration can form hole or electron injection regions with well-controlled doping concentration.

Abstract: A light emitting device includes a substrate, a plurality of first light emitting elements mounted on the substrate, including first LED dies, and emitting light having a first wavelength, and a light guide layer arranged so as to cover the plurality of first light emitting elements, and guiding the light from the plurality of first light emitting elements, wherein when LG1 is a distance between the first LED dies, and ?c is a critical angle of the light emitted from the light guide layer to the air, and a thickness T between the upper surfaces of the first light emitting elements and the upper surface of the light guide layer is equal to or longer than T1 indicated by T1=LG1/(2tan ?c).

Abstract: The present invention provides an orthopedic implant comprising a continuous reinforced composite filament in a freely predetermined fiber orientation in multiple continuous successive layers, wherein the continuous reinforced composite filament comprises a bioabsorbable polymer matrix and a continuous bioabsorbable reinforcing fiber or fiber bundle, and whereby the continuous bioabsorbable reinforcing fiber or fiber bundle of consecutive layers at least partly intermingles and/or intertwines forming a three dimensionally interlocked continuous fiber structure.

Abstract: In the semiconductor device, a semiconductor substrate has first and second surfaces. A circuitry layer is formed over the first surface and a first insulating layer is further formed over the circuitry layer. A second insulating layer including a first insulating element is formed over the second surface. A third insulating layer including a second insulating element different from the first insulating element of the second insulating layer is formed over the second surface with an intervention of the second insulating layer therebetween. A penetration electrode penetrates through the semiconductor substrate, the circuitry layer, the first insulating layer, the second insulating layer and the third insulating layer.

Abstract: The bone screw with internal extendable is a bone screw with an internal, extendable tang. The tang—part of a tang system—is concealed within the body of the screw until after placement. After the screw is threaded into the bone, the internal tang system is pushed out of the bone screw body, forcing one or more tangs to extend out of the body and into the bone. A driver allows the user to control the different steps of insertion, including converting rotational motion of a knob into linear motion of a rod, the rod moving through the screw body to force the tang to exit the bone screw body. The one or more tangs preferably exit the bone screw body at a tang exit portal formed by one or more tang exit guide surfaces.

Abstract: Methods and systems for determining a surface color of a target surface under an environment with an environmental light source. A plurality of images of the target surface are captured as the target surface is illuminated with a variable intensity, constant color light source and a constant intensity, constant color environmental light source, wherein the intensity of the light source on the target surface is varied by a known amount between the capturing of the images. A color feature tensor, independent of the environmental light source, is extracted from the image data, and used to infer a surface color of the target surface.

Abstract: In this present invention lateral voltage variable capacitor designs are disclosed. The lateral voltage variable capacitor utilizes a dielectric material with an electric field dependent dielectric permittivity (dielectric constant). Variable capacitor structures are defined laterally in the plane of the substrate as opposed to vertical device structures defined out of the plane of the substrate.