Abstract: The present application relates to an automated segmentation method for use with echocardiograms (echo). The method uses an iterative Dijkstra's algorithm, a strategic node selection, and a novel cost matrix formulation based on intensity peak prominence and is this termed the “Prominence Iterative Dijkstra's” algorithm, or ProID.

Abstract: A micro semiconductor structure includes a substrate, a dissociative layer, a protective layer and a micro semiconductor. The dissociative layer is located on one side of the substrate. The protective layer is located on at least one side of the substrate. The micro semiconductor is located on the side of the substrate. The transmittance of the protective layer for a light source with wavelength smaller than 360 nm is less than 20%.

Abstract: An encapsulation structure, an electronic apparatus, and an encapsulation method are provided. The encapsulation structure includes: a base substrate, an organic encapsulation layer and a barrier dam that are on the base substrate. The barrier dam is disposed outside the organic encapsulation layer; and the barrier dam includes an upper surface away from the base substrate and a side surface facing the organic encapsulation layer, and at least one of the upper surface and the side surface includes a groove and a protrusion.

Abstract: A method for manufacturing a semiconductor device is provided. The manufacturing method includes attaching a substrate to a sheet. The manufacturing method includes fragmenting the substrate into a plurality of individual chips. The manufacturing method includes expanding the sheet to widen the spacing between the plurality of chips. The manufacturing method includes covering the main surface and side surface of each of the plurality of chips with resin and sealing the chips to form a sealed body. The manufacturing method includes forming a stacked body in which a plurality of sealed bodies are stacked. The plurality of sealed bodies include a first sealed body and a second sealed body. Forming the stacked body includes stacking the second sealed body on the first sealed body in a state where the position of the chip in the second sealed body is offset in a direction in the plane with respect to the position of the chip in the first sealed body.

Abstract: A glass substrate houses an embedded multi-die interconnect bridge that is part of a semiconductor device package. Through-glass vias communicate to a surface for mounting on a semiconductor package substrate.

Abstract: A method of producing microelectronic components includes forming a functional layer system; applying a laminar carrier to the functional layer system; attaching a workpiece to a workpiece carrier; utilizing incident radiation of a laser beam is focused in a boundary region between a growth substrate and the functional layer system, and a bond between the growth substrate and the functional layer system in the boundary region is weakened or destroyed; separating a functional layer stack from the growth substrate, wherein a vacuum gripper having a sealing zone that circumferentially encloses an inner region is applied to the reverse side of the growth substrate, a negative pressure is generated in the inner region such that separation of the functional layer stack from the growth substrate is initiated in the inner region; and the growth substrate held on the vacuum gripper is removed from the functional layer stack.

Abstract: A method of fabricating a display device, the method comprising: preparing a mother substrate having a first cell region and a second cell region, and a first target region and a second target region in the first cell region and the second cell region, respectively; providing an encapsulation material on a first printing region in the first target region to form a first encapsulation layer; and providing the encapsulation material on a second printing region in the second target region to form a second encapsulation layer, wherein a center of the second printing region is shifted from a center of the second target region in a specific direction.

Abstract: A package substrate and method of manufacturing a package substrate and a semiconductor device package are provided. The package substrate includes a circuit layer, a molding layer and a sacrificial layer. The circuit layer includes conductive traces and conductive pads. The molding layer has an upper surface and a lower surface opposite to the upper surface, wherein the molding layer partially covers the conductive traces and the conductive pads, and first surfaces of the conductive traces and first surfaces of the conductive pads are exposed from the upper surface of the molding layer. The sacrificial layer covers the lower surface of the molding layer, second surfaces of the conductive pads.

Abstract: A semiconductor transistor structure with reduced contact resistance includes a substrate, a channel layer on the substrate, a barrier layer on the channel layer, a two-dimensional electron gas (2DEG) layer at an interface between the barrier layer and the channel layer, and a recess in a contact region. The recess penetrates through the barrier layer and extends into the channel layer. An Ohmic contact metal is disposed in the recess. The Ohmic contact metal is in direct contact with a vertical side surface of the barrier layer in the recess and in direct contact with an inclined side surface of the 2DEG layer and the channel layer in the recess.

Abstract: An encapsulant compound apparatus, includes a mechanical operator, and an insert disposed on a surface of the mechanical operator. The insert operates to capture foreign material in the encapsulant compound.

Abstract: Methods for making laser-marked packaged surface acoustic wave devices are provided. The method may include directly marking a surface of a piezoelectric substrate, where the opposite surface of the piezoelectric substrate includes a package structure encapsulating a surface acoustic wave device. The method may include exposing the surface of the piezoelectric substrate to light from a deep ultraviolet laser. By using a wavelength readily absorbed by the piezoelectric substrate, a relatively shallow marking may be made in the piezoelectric substrate. The markings may extend less than 1 micrometer into the piezoelectric substrate, and do not affect the structural integrity of the piezoelectric substrate or the operation of the packaged surface acoustic wave device.

Abstract: A chip package includes a semiconductor substrate, a first light-transmissive sheet, a second light-transmissive sheet, a first antenna layer, and a redistribution layer. The first light-transmissive sheet is disposed over the semiconductor substrate, and has a top surface facing away from semiconductor substrate and an inclined sidewall adjacent to the top surface. The second light-transmissive sheet is disposed over the first light-transmissive sheet. The first antenna layer is disposed between the first light-transmissive sheet and the second light-transmissive sheet. The redistribution layer is disposed on the inclined sidewall of the first light-transmissive sheet, and is in contact with an end of the first antenna layer.

Abstract: Embodiments include semiconductor packages and methods of forming the semiconductor packages. A semiconductor package includes a die over a substrate, a first conductive layer over the die, and a conductive cavity antenna over the first conductive layer and substrate. The conductive cavity antenna includes a conductive cavity, a cavity region, and a plurality of interconnects. The conductive cavity is over the first conductive layer and surrounds the cavity region. The semiconductor package also includes a second conductive layer over the conductive cavity antenna, first conductive layer, and substrate. The conductive cavity extends vertically from the first conductive layer to the second conductive layer. The cavity region may be embedded with the conductive cavity, the first conductive layer, and the second conductive layer. The plurality of interconnects may include first, second, and third interconnects.

Abstract: An interconnect structure for a redistribution layer includes an intermediate via land pad; a cluster of upper conductive vias abutting the intermediate via land pad and electrically coupling the intermediate via land pad to an upper via land pad; and an array of lower conductive vias electrically coupling the intermediate via land pad with a lower circuit pad. The array of lower conductive vias is arranged within a horseshoe-shaped via array region extending along a perimeter of the intermediate via land pad. The array of lower conductive vias arranged within the horseshoe-shaped via array region does not overlap with the cluster of upper conductive vias.

Abstract: A method of fabricating self-aligned grids in a BSI image sensor is provided. The method includes depositing a first dielectric layer over a back surface of a substrate that has a plurality of photodiodes formed therein, forming a grid of trenches, and filling in the trenches with dielectric material to create a trench isolation grid. Here, a trench passes through the first dielectric layer and extends into the substrate. The method further includes etching back dielectric material in the trenches to a level that is below an upper surface of the first dielectric layer to form recesses overlaying the trench isolation grid, and filling in the recesses with metallic material to create a metallic grid that is aligned with the trench isolation grid.

Abstract: In one embodiment, a method includes receiving, by an object reconstruction module, a first image and a second image. The first image includes a first region of an object and the second image comprises a second region of the object. The method also includes identifying, by the object reconstruction module, a transitional image. The transitional image includes the first region of the object and the second region of the object. The method further includes determining, by the object reconstruction module, that the first region of the object in the transitional image and the first region of the object in the first image are equivalent regions and generating, by the object reconstruction module, a reconstruction of the object using the first image and the transitional image. The reconstruction of the object includes the first region of the object and the second region of the object and excludes equivalent regions.

Abstract: Described is a method for segmenting measurement data from measurement of an object that has at least one material transition region. The measurement data are used to generate a digital object representation that has the material transition region and a multiplicity of spatially resolved image information items relating to the object. The method may include: determining measurement data that have at least one small structure having an extent which is less than a predefined extent; determining at least two homogeneous regions in the measurement data and/or in the digital object representation, wherein at least one homogeneous regions has a small structure; analysing a local similarity of the multiplicity of spatially resolved image information items; adapting an extent of each homogeneous region until at least one border region is arranged at an expected position of a material transition region; and segmenting the digital object representation based on the adapted homogeneous regions.

Abstract: Disclosed is a chip component including a substrate having a first surface and a second surface on an opposite side from the first surface, and a third surface connecting the first surface and the second surface to each other, an external surface resin configured to cover at least the third surface of the substrate, and a terminal electrode formed on the first surface of the substrate and exposed from the external surface resin. A recessed portion is formed in an end portion of the third surface of the substrate, the end portion being on the first surface side. The external surface resin is embedded in the recessed portion.

Abstract: A mid-infrared light emitting diode is provided, including a graphene lower electrode layer, a black phosphorous layer, and a graphene upper electrode layer sequentially arranged along a thickness direction of the mid-infrared light emitting diode, in which the black phosphorous layer contacts the graphene lower electrode layer and the graphene upper electrode layer. A manufacturing method of the mid-infrared light emitting diode, a silicon photonic circuit and a manufacturing method thereof are also provided.

Abstract: A position detection apparatus comprises: a map information creation part that creates map information representing a position in a space including a floor surface on which at least one detection object may be disposed; a mask information creation part that creates mask information, by extracting a region of a predetermined height range within a height range from the floor surface when the detection object is disposed in the space from the map information; a specifying part that specifies partial optical image information, by removing a region corresponding to the mask information from the optical image information; and a detection part that specifies a positional relationship between the map information and the partial optical image information at a pixel level, and detects a position of the detection object in the map information based on the specified positional relationship.