Patents Examined by Caleb E Henry
  • Patent number: 11765961
    Abstract: The present disclosure provides a mask plate and a fabricating method thereof. The mask plate includes a patterning layer having a plurality of openings; a bonding region at a periphery of the patterning region and including a bonding part configured to be bonded to an external frame; and a transition region between the patterning region and the bonding region and including a transition part, the transition part adjoining the patterning layer and the bonding part, respectively; a thickness of the patterning layer is less than a thickness of the bonding part; and a thickness of a portion of the transition part adjoining the patterning layer is less than a thickness of a portion of the transition part adjoining the bonding part. The mask plate of the present disclosure can alleviate problem that the patterning layer is thin and easy to deform and has improved flatness of the patterning layer.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: September 19, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shanshan Bai, Yansong Li
  • Patent number: 11765932
    Abstract: An organic optoelectronic component includes an organic functional layer stack between a first electrode and a second electrode including a light-emitting layer formed to emit radiation during operation of the component; a coupling-out layer arranged above the first electrode and/or the second electrode which is in a beam path of the radiation of the light-emitting layer; and a protective layer above the coupling-out layer, wherein the coupling-out layer includes a structured layer and a planarization layer arranged thereabove and the structured layer has a structured surface structured at least in places, the planarization layer planarizes the structured surface of the structured layer, the protective layer cannot be removed without at least partially destroying the coupling-out layer, and adhesion of the structured layer to the planarization layer is smaller than adhesion of the protective layer to the planarization layer.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: September 19, 2023
    Assignee: Pictiva Displays International Limited
    Inventors: Daniel Riedel, Nina Riegel, Thomas Wehlus, Arne Fleissner, Armin Heinrichsdobler
  • Patent number: 11756866
    Abstract: A lead frame includes: a die pad having a mounting surface for a semiconductor element; a recess included on the mounting surface; and a lead disposed around the die pad. The recess includes: a bottom surface positioned at a depth less than a thickness of the die pad from an opening plane of the recess; a plurality of protrusions protruding from the bottom surface; and a concavity recessed from the bottom surface.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: September 12, 2023
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kentaro Kaneko, Yoshio Furuhata, Konosuke Kobayashi
  • Patent number: 11758773
    Abstract: A display device includes a substrate including a first pixel area, a second pixel area spaced apart from the first pixel area, and a valley area between the first pixel area and the second pixel area, a first insulating layer on the substrate and in both the first pixel area and the second pixel area, a penetration hole through the first insulating layer and corresponding to the valley area, the penetration hole exposing a side surface of the first insulating layer and an upper surface of the substrate to outside the first insulating layer, a crack prevention pattern which is in the penetration hole and covers the side surface of the first insulating layer, and a second insulating layer facing the first insulating layer with the crack prevention pattern therebetween, the second insulating layer in contact with the upper surface of the substrate at the penetration hole.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: September 12, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jin-Yong Lee, Jinho Ju, Kwangwoo Park, Minjung Ann
  • Patent number: 11756829
    Abstract: Gate aligned contacts and methods of forming gate aligned contacts are described. For example, a method of fabricating a semiconductor structure includes forming a plurality of gate structures above an active region formed above a substrate. The gate structures each include a gate dielectric layer, a gate electrode, and sidewall spacers. A plurality of contact plugs is formed, each contact plug formed directly between the sidewall spacers of two adjacent gate structures of the plurality of gate structures. A plurality of contacts is formed, each contact formed directly between the sidewall spacers of two adjacent gate structures of the plurality of gate structures. The plurality of contacts and the plurality of gate structures are formed subsequent to forming the plurality of contact plugs.
    Type: Grant
    Filed: October 6, 2022
    Date of Patent: September 12, 2023
    Assignee: Intel Corporation
    Inventors: Oleg Golonzka, Swaminathan Sivakumar, Charles H. Wallace, Tahir Ghani
  • Patent number: 11751428
    Abstract: An OLED panel and a method of manufacturing the same are disclosed. The OLED panel is provided to be disposed above a camera, and the OLED panel comprises sequentially from top to bottom: a substrate; a light-emitting layer disposed on the substrate; a cathode disposed on the light-emitting layer; a high n value inorganic salt layer disposed on surfaces of the cathode and the light-emitting layer; and a CPL layer disposed on the high n value inorganic salt layer. An entire thickness of the high n value inorganic salt layer and a part of a thickness of the cathode of the OLED panel corresponding to a position above the camera are removed to form a hollow portion, so that the thickness of the cathode above the camera is reduced, so as to increase the light transmittance, thereby improving the quality of photos.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: September 5, 2023
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Zhenmin Wang
  • Patent number: 11751433
    Abstract: A transistor display panel according to an exemplary embodiment includes: a substrate; a first transistor disposed on the substrate; and a pixel electrode connected to the first transistor, wherein the first transistor includes a lower electrode disposed on the substrate, a first semiconductor overlapping the lower electrode, a first insulating layer covering the first semiconductor, a first gate electrode disposed on the first insulating layer and overlapping the first semiconductor, and a first source connecting member and a first drain connecting member disposed on the same layer as the first gate electrode and connected to the first semiconductor, wherein the first gate electrode is formed as a triple layer, the first source connecting member and first drain connecting member are formed as a double layer, and the first source connecting member is connected to the lower electrode.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: September 5, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventor: Hyuk Soon Kwon
  • Patent number: 11751451
    Abstract: According to one embodiment, a display device includes a pixel area including pixels each including at least one thin film transistor includes a semiconductor layer and a gate electrode, a first terminal area including a first wiring line disposed thereon connected to the at least one thin film transistor, a first protective film provided on the semiconductor layer, the gate electrode and the first wiring line, a first insulating film provided on the first protective film, a second protective film provided on the first insulating film, a second insulating film provided on the second protective film, a first opening formed in the first terminal area, and partially exposing the first wiring line, and a second opening formed to correspond to the first opening.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: September 5, 2023
    Assignee: JOLED INC.
    Inventors: Atsuhito Murai, Eiichi Sato, Masanori Miura
  • Patent number: 11751423
    Abstract: A display apparatus includes: a substrate including: a display area including a plurality of thin film transistors, and a plurality of display elements electrically connected to the plurality of thin film transistors; a first non-display area outside the display area; and a second non-display area at least partially surrounded by the display area; a through portion passing through the substrate in a vertical direction in the second non-display area; a metal layer surrounding the through portion at the second non-display area; and a hydrophobic blocking layer on an inner side surface of the through portion. The hydrophobic blocking layer includes an oxide of a metal material of the metal layer.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: September 5, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Younjae Jung, Jongwoo Park, Taeyoung Kim, Heejin Kim, Youngtae Choi
  • Patent number: 11749588
    Abstract: A semiconductor device comprises at least one semiconductor die electrically coupled to a set of electrically conductive leads, and package molding material molded over the at least one semiconductor die and the electrically conductive leads. At least a portion of the electrically conductive leads is exposed at a rear surface of the package molding material to provide electrically conductive pads. The electrically conductive pads comprise enlarged end portions extending at least partially over the package molding material and configured for coupling to a printed circuit board.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: September 5, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Michele Derai, Roberto Tiziani
  • Patent number: 11751457
    Abstract: An organic light emitting display device includes: a substrate including: pixel regions; connection regions between adjacent pixel regions from among the pixel regions, respectively; and a region having a through-opening, the region being defined by the adjacent pixel regions, and the connection regions respectively between the adjacent pixel regions; a sub-pixel structure on the substrate at each of the pixel regions; and an organic pattern on a side wall of the substrate, the side wall being adjacent to the through-opening.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: September 5, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventor: Sungbae Ju
  • Patent number: 11742268
    Abstract: A package structure applied to power converters can include: a first die having a first power transistor and a first control and drive circuit; a second die having a second power transistor; a connection device configured to couple the first and second power transistors in series between a high-level pin and a low-level pin of a lead frame of the package structure; and where a common node of the first and second power transistors can be coupled to an output pin of the lead frame through a metal connection structure with a low interconnection resistance.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: August 29, 2023
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Chiqing Fang, Jiaming Ye, Chen Zhao
  • Patent number: 11730054
    Abstract: A compound that is capable of achieving an organic EL device that has a high external quantum efficiency and a long lifetime is to be provided, and a compound represented by the following formula (1) is used (wherein in the formula, R11 to R17, R21 to R28, R31 to R38, R41 to R45, R51 to R55, R61 to R64, and L1 are defined in the description).
    Type: Grant
    Filed: September 6, 2022
    Date of Patent: August 15, 2023
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Hirokatsu Ito, Tasuku Haketa, Yu Kudo
  • Patent number: 11728319
    Abstract: A semiconductor package includes a first sub-semiconductor package, an interposer substrate, and a second sub-semiconductor package that are sequentially stacked. The first sub-semiconductor package includes a first package substrate, a first semiconductor device, and a first mold member that are sequentially stacked, and the interposer substrate includes at least one hole. The first mold member includes: a mold main portion which covers the first semiconductor device; a mold connecting portion extended from the mold main portion and inserted into the at least one hole; and a mold protruding portion extended from the mold connecting portion to cover a top surface of the interposer substrate outside the at least one hole. The mold main portion, the mold connecting portion, and the mold protruding portion constitute a single object.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD
    Inventor: Sang-Won Lee
  • Patent number: 11730038
    Abstract: A light emitting display device comprises a substrate, a first pixel electrode disposed on the substrate, a pixel defining film disposed on the first pixel electrode and having a first opening at least partially exposing the first pixel electrode, a first organic light emitting layer disposed on the pixel defining film and overlapping with the first opening of the pixel defining film, and a black matrix disposed on the first organic light emitting layer and having a first opening overlapping with the first organic light emitting layer. Light having passed through the first opening of the black matrix is one of red light, green light, and blue light. The first opening of the black matrix may have a shape with a curved portion.
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sun Kyu Joo, Byung Chul Kim, Sung Chul Kim, Su Jeong Kim, In Ok Kim, Hye Ran Mun, In Seok Song, Keun Chan Oh, Jae Jin Lyu, Yui Ku Lee
  • Patent number: 11723271
    Abstract: An organic compound, and an electronic component and an electronic device using same, and the organic compound has a structure as shown in a formula A, a formula B, a formula D or a formula F. Ar is selected from substituted or unsubstituted aryl with 6 to 30 carbon atoms and substituted or unsubstituted heteroaryl with 3 to 30 carbon atoms, and Het is selected from substituted or unsubstituted nitrogen-containing heteroaryl with 2 to 20 carbon atoms, and the nitrogen-containing heteroaryl at least contains two N atoms. The organic compound of the present disclosure can significantly reduce a driving voltage of a device and increase a service life of the device; and in addition, the organic compound of the present disclosure can further improve an efficiency of the device.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: August 8, 2023
    Assignee: SHAANXI LIGHTE OPTOELECTRONICS MATERIAL CO., LTD.
    Inventors: Tiantian Ma, Lei Yang, Linlin Hu
  • Patent number: 11721791
    Abstract: A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the second semiconductor layer includes a first edge; a reflective structure located on the second semiconductor layer and including an outer edge; a first electrode pad located on the reflective structure, wherein the first electrode pad including an outer side wall adjacent to the outer edge, wherein the outer edge extends beyond the outer side wall and does not exceed the first edge in a cross-sectional view of the light-emitting device.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: August 8, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Wen-Hung Chuang, Tzu-Yao Tseng, Cheng-Lin Lu
  • Patent number: 11723257
    Abstract: A manufacturing method for a display substrate, a display substrate and a display device are provided. The display substrate includes a display area and a bonding area at one side of the display area. The bonding area includes an isolation area disposed close to the display area and a bonding pad area disposed at one side of the isolation area far away from the display area. The manufacturing method of the display substrate includes forming a driving structure layer in the display area of a substrate and a bonding structure layer in the bonding area of the substrate, forming a light emitting structure layer on the driving structure layer of the display area, forming an isolation dam on the bonding structure layer of the isolation area, forming an encapsulation structure layer in the display area.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: August 8, 2023
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhiliang Jiang, Pan Zhao
  • Patent number: 11716870
    Abstract: Disclosed relates to a transparent display panel and manufacturing method of thereof, and the transparent display panel including a patterned cathode with improved transparency as a whole.
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: August 1, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: EunJu Kim, JongHyun Park
  • Patent number: 11715677
    Abstract: A semiconductor device includes a substrate that includes an opening extending through a thickness of the substrate, a frame that includes an integrated circuit (IC) die pad in the opening and a plurality of arms extending outwardly from the IC die pad, an IC mounted on the IC die pad, a plurality of bonding elements electrically coupling the substrate with the IC without the frame being an intermediary coupling element, and an encapsulant surrounding the IC, the plurality of bonding elements, and the plurality of arms. The substrate has a first major surface and a second major surface. Each arm is devoid of a contact pad. Each arm has a distal end coupled to the first major surface of the substrate, and each arm has a proximal end disposed over the first major surface of the substrate.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: August 1, 2023
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Jefferson Sismundo Talledo, Rammil Seguido