Abstract: An organic light emitting display device is provided having first and second pixel areas. The organic light emitting display device includes a first substrate; a second substrate facing the first substrate; a bank layer on the first substrate at a boundary region between the first and second pixel areas; a light emitting layer on the first substrate within the first pixel area; a light shielding layer on the second substrate at the boundary region between the first and second pixel areas; and a color filter on the second substrate within the first pixel area. A top of the bank layer is higher than a top of the light emitting layer with respect to the first substrate, and a top of the light shielding layer is higher a top of the color filter with respect to the second substrate.

Abstract: To provide a semiconductor device having a vertical JFET excellent in off-state performance without reducing a production yield. A gate region quadrangular in the cross-section along a channel width direction is formed below a source region by impurity ion implantation. By first etching, the source region over the upper surface of the gate region is removed to separate therebetween. Then, the upper surface of the gate region is processed by second etching having an etching rate lower at the side surface than at the center of the gate region. The resulting gate region has a lower surface parallel to the substrate surface and an upper surface below a boundary between the source region and the channel formation region and having, in the cross-section along the channel width direction, a downward slope from the side surface to the center. As a result, a channel length with reduced variations can be obtained.

Abstract: A method for performing a laser crystallization is provided. The method includes generating a laser beam, refracting the laser beam to uniformize an intensity of the laser beam at a focal plane of the laser beam. The laser beam whose intensity is uniformized is applied into an object substrate mounted with a stage.

Abstract: An embedded package includes a core layer having a cavity, a first semiconductor chip disposed in the cavity, and bumps disposed on a top surface of the first semiconductor chip, a second semiconductor chip disposed on the first semiconductor chip and the core layer, pads disposed on a top surface of the second semiconductor chip, and a first insulation layer disposed on the core layer and the first and second semiconductor chips. The first insulation layer has first openings that expose the bumps and second openings that expose the pads, and the first and second openings have a similar depth.

Abstract: A resin-sealed semiconductor device includes a mesa-type semiconductor element which includes a mesa-type semiconductor base body having a pn junction exposure portion in an outer peripheral tapered region surrounding a mesa region, and a glass layer which covers at least the outer peripheral tapered region; and a molding resin which seals the mesa-type semiconductor element, wherein the glass layer is formed by forming a layer made of a predetermined glass composition for protecting a semiconductor junction which substantially contains no Pb such that the layer covers the outer peripheral tapered region and, subsequently, by baking the layer made of the glass composition for protecting a semiconductor junction.

Abstract: An optoelectronic component may include a first organic functional layer structure, a second organic functional layer structure, and a charge generating layer structure between the first organic functional layer structure and the second organic functional layer structure. The charge generating layer structure includes a first electron-conducting charge generating layer, and a second electron-conducting charge generating layer. The second electron-conducting charge generating layer is formed from a single substance, and the substance of the first electron-conducting charge generating layer is a substance selected from the group of substances consisting of: HAT-CN, Cu(I)pFBz, NDP-2, NDP-9, Bi(III)pFBz, F16CuPc.

Abstract: Control elements that can be suitable for nonvolatile memory device applications are disclosed. The control element can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The control element can be based on a single dielectric layer or on a multilayer dielectric stack.

Abstract: In a semiconductor device using a transistor including an oxide semiconductor, a change in electrical characteristics is suppressed and reliability is improved. The semiconductor device includes a gate electrode over an insulating surface; an oxide semiconductor film overlapping with the gate electrode; a gate insulating film that is between the gate electrode and the oxide semiconductor film and in contact with the oxide semiconductor film; a protective film in contact with a surface of the oxide semiconductor film that is an opposite side of a surface in contact with the gate insulating film; and a pair of electrodes in contact with the oxide semiconductor film. The spin density of the gate insulating film or the protective film measured by electron spin resonance spectroscopy is lower than 1×1018 spins/cm3, preferably higher than or equal to 1×1017 spins/cm3 and lower than 1×1018 spins/cm3.

Abstract: A method of fabricating a fin-like field-effect transistor device is disclosed. The method includes forming mandrel features over a substrate and performing a first cut to remove mandrel features to form a first space. The method also includes performing a second cut to remove a portion of mandrel features to form a line-end and an end-to-end space. After the first and the second cuts, the substrate is etched using the mandrel features, with the first space and the end-to-end space as an etch mask, to form fins. Depositing a space layer to fully fill in a space between adjacent fins and cover sidewalls of the fins adjacent to the first space and the end-to-end space. The spacer layer is etched to form sidewall spacers on the fins adjacent to the first space and the end-to-end space and an isolation trench is formed in the first space and the end-to-end space.

Abstract: A substrate processing apparatus includes a process chamber in which a substrate is accommodated; a source gas supply system configured to supply a source gas onto the substrate; first and second reactive gas supply systems configured to supply a reactive gas onto the substrate via first and second interconnected reactive gas supply pipes, wherein a gas storage unit is installed at the second reactive gas supply pipe to store the reactive gas and the reactive gas is supplied onto the substrate via the gas storage unit; and a control unit configured to control the source gas supply system to supply the source gas onto the substrate and to control the first and second reactive gas supply systems to supply the reactive gas onto the substrate via the first and second reactive gas supply pipes.

Abstract: A phosphor, a preparing method for the phosphor, and a light emitting device are provided. The phosphor has a formula of A3?xCexQ5O12. A and Q are independently comprise Al, Ga, In, Sc, Y, La, Gd, Tb, Lu elements or combinations thereof. Ce represents a cerium element. O represents an oxygen element. 0<x?3. The phosphor contains 100 ppm˜2000 ppm of Ba element.

Abstract: In some embodiments, an electronic device processing system is provided that includes a processing tool having a first subsystem configured to carry out a first subset of processes on a substrate having pattern features, the first subsystem including a first conformal deposition chamber and a first etch chamber. The processing tool includes a second subsystem coupled to the first subsystem and configured to carry out a second subset of processes on the substrate, the second subsystem including a second conformal deposition chamber and a second etch chamber. The processing tool is configured to employ the first and second subsystems to perform pitch division on the substrate within the processing tool so as to form a reduced-pitch pattern on the substrate. Numerous other embodiments are provided.

Abstract: The present invention is directed to methods for tailoring the work function of electrodes in organic electronics using interfacial modifiers comprising functionalized semiconducting polymers and/or small molecules.

Abstract: A method for fabricating floating body memory cells (FBCs), and the resultant FBCs where gates favoring different conductivity type regions are used is described. In one embodiment, a p type back gate with a thicker insulation is used with a thinner insulated n type front gate. Processing, which compensates for misalignment, which allows the different oxide and gate materials to he fabricated is described.

Abstract: A light emitting device includes a package having side walls which define a recess, a light emitting element arranged in the recess, and a sealing member which seals the light emitting element. The sealing member includes a first portion which contains a fluorescent material and covers the light emitting element, and a second portion which does not contain a fluorescent material and is arranged over the first portion. The fluorescent material is a fluoride fluorescent material activated with tetravalent manganese represented by the following formula (I). The particles of the fluorescent material has a surface region with a tetravalent manganese ion concentration is lower than inner side. A2[M1-bMn4+bF6]??(I) In the formula (I), A is a cation which contains K+ and may contain at least one selected from the group consisting of Li+, Na+, Rb+, Cs+, and NH4+, M is at least one of 15 Group 4 and Group 14 elements, and 0<b<0.2.

Abstract: A method of forming a contact on a semiconductor device is disclosed. The method includes: forming a mask on the semiconductor device, the mask exposing at least one contact node disposed within a trench in a substrate of the semiconductor device; performing a first substrate contact etch on the semiconductor device, the first substrate contact etch recessing the exposed contact node within the trench; removing a set of node films disposed above the exposed contact node and on the sides of the trench; and forming a contact region within the trench above the exposed contact node, the contact region contacting the substrate.

Abstract: A device for back-scattering an incident light ray, including: a host substrate; a structured layer; a first face in contact with a front face of the host substrate; a second flat face parallel to the first face; a first material and a second material which form, in a mixed plane, alternating surfaces at least one of whose dimensions is between 300 nm and 800 nm, the mixed plane is between the first and second face of the structured layer; wherein the refractive index of the first and of the second material are different, the structured layer is covered by a specific layer, the specific layer is made of a material which is different from the first and second materials of the structured layer, and the specific layer is crystalline and semi-conductive.

Abstract: An organic light emitting diode display device which may improve luminous emitting efficiency by forming a scattering layer with a material including fluorine and a method of fabricating the same are discussed. The organic light emitting diode display device can include a thin film transistor formed on a substrate; an overcoat layer formed on the substrate such that the thin film transistor is covered; a scattering layer formed on the overcoat layer and formed with a material including fluorine; and an organic light emitting cell formed on the scattering layer and including a first electrode, an organic emission layer and a second electrode sequentially laminated, wherein light emitted from the organic light emitting cell passes through the scattering layer and then is emitted through the substrate.

Abstract: The disclosed technology relates generally to photovoltaic cells, and more particularly to photovoltaic cells with plated metal contacts. In one aspect, a method of fabricating a photovoltaic cell with a metal contact pattern on a surface of a semiconductor substrate includes locally smoothening portions of the surface of the semiconductor substrate by using a first laser, at predetermined locations. The method additionally includes doping the surface of the semiconductor substrate to form an emitter region. The method additionally includes forming a dielectric layer on the surface of the semiconductor substrate, and subsequently forming openings through the dielectric layer by using a second laser, thereby locally exposing the underlying surface of the semiconductor substrate at the predetermined locations. The method further includes forming metal contacts at exposed regions of the surface of the semiconductor substrate by plating.

Abstract: The disclosure relates to a method of making organic light emitting diode array. A base defining a plurality of convexities is provided. A number of first electrodes are applied on the plurality of convexities. A patterned second insulative layer is made among the convexities to cover first parts of the first electrodes between the convexities and expose second parts of the first electrodes on top surfaces of the convexities to form a number of protrudent portions. A number of electroluminescent layers are transfer printed on the number of protrudent portions to form a number of organic light emitting layers. A second electrode is electrically connected to the number of organic light emitting layers.