Abstract: A luminescent materials including donor-acceptor compounds with a nitrogen containing donor connected to the 1-position of a carbazole and triazene acceptor connected at the 9-position is disclosed.

Abstract: A technique for making high performance low noise amplifiers, low cost high performance RF, microwave circuits and other devices by using a minimum of costly high performance semiconductors is described. By combining a single discrete portion of an expensive semiconductor with a less expensive GaAs carrier, MMIC devices with improved performance over their discrete counterparts are achieved.

Abstract: An organic EL device includes a pair of electrodes and an organic compound layer between pair of electrodes. The organic compound layer includes an emitting layer including a first material, a second material and a third material, in which singlet energy EgS(H) of the first material, singlet energy EgS(H2) of the second material, and singlet energy EgS(D) of the third material satisfy a specific relationship.

Abstract: Provided herein are charge generating devices and methods of making and use thereof. The charge generating devices comprise a substrate having a top surface; a plurality of spaced-apart three-dimensional elements disposed on the top surface of the substrate; and a plurality of cavities formed by the plurality of spaced-apart three-dimensional elements, the plurality of cavities being the area between the plurality of spaced-apart three-dimensional elements. The charge generating devices can further comprise a radioactive layer disposed on at least a portion of the plurality of spaced-apart three-dimensional elements and the top surface such that the plurality of cavities and the top surface are substantially coated by the radioactive layer. In some examples, the charge generating devices can comprise a radiation material and/or a scintillating material disposed within at least a portion of the plurality of cavities.

Abstract: The present disclosure relates to a host material and an organic electroluminescent device comprising the same. By using a specific combination of two or more host compounds according to the present disclosure, the organic electroluminescent device of the present disclosure has luminous efficiency at least equivalent to or higher than conventional devices and has lifespan better than conventional devices.

Abstract: A method for forming a semiconductor device and semiconductor device is disclosed. In one example, the method includes forming a silicone layer on a semiconductor die. The method further includes plasma treating a silicone surface of the silicone layer. A surfactant is deposited on the plasma-treated silicone surface of the silicone layer to obtain a silicone surface at least partly covered by surfactant. A mold is formed on the silicone surface at least partly covered by surfactant. The surfactant includes surfactant molecules comprising an inorganic skeleton terminated by organic compounds.

Abstract: A semiconductor light emitting device including a first conductive electrode and a second conductive electrode; a first conductive semiconductor layer on which the first conductive electrode is disposed; a second conductive semiconductor layer overlapping the first conductive semiconductor layer, on which the second conductive electrode is disposed; and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer. Further, the second conductive semiconductor layer includes a first layer including a porous material capable of being electro-polished and disposed on an outer surface of the semiconductor light emitting device; a second layer disposed under the first layer and having a lower impurity concentration than the first layer; and a third layer disposed between the second layer and the active layer and having a higher impurity concentration than the second layer.

Abstract: A semiconductor device includes a base element and a copper element over the base element. The copper element includes a layer stack having at least two copper layers and at least one intermediate conductive layer of a material different from copper. The at least two copper layers and the at least one intermediate conductive layer are alternately stacked over each other.

Abstract: A method for depositing a conductive coating on a surface is provided, the method including treating the surface by depositing fullerene on the surface to produce a treated surface and depositing the conductive coating on the treated surface. The conductive coating generally includes magnesium. A product and an organic optoelectronic device produced according to the method are also provided.

Abstract: Light emitting diode (LED) devices, components and systems are provided. Improved substrates for LEDs and LED devices are provided, with one or more dielectric layers over a reflective layer sufficient to minimize or eliminate damage of the dielectric layer(s). More stable and efficient LED devices can be produced using such improved substrates. LED devices, and methods of making the same, are also provided wherein LED chips are embedded in fill material to attach the LEDs to a substrate and increase light reflectivity.

Abstract: A method is described for stacking a plurality of cores. For example, one embodiment comprises: mounting an uncore die on a package, the uncore die comprising a plurality of exposed landing slots, each landing slot including an inter-die interface usable to connect vertically to a cores die, the uncore die including a plurality of uncore components usable by cores within the cores die; and vertically coupling a first cores die comprising a first plurality of cores on top of the uncore die, the cores spaced on the first cores die to correspond to all or a first subset of the landing slots on the uncore die, each of the cores having an inter-die interface positioned to be communicatively coupled to a corresponding inter-die interface within a landing slot on the uncore die when the first cores die is vertically coupled on top of the uncore die.

Abstract: An optical member for a multi-panel display device according to an embodiment includes a first optical member located on a first display device and including optical fibers, a second optical member located on a second display device neighboring the first display device and including optical fibers, and an optical fiber triangular bar located to overlap a region where the first and second optical members are adjacent to each other, and including optical fibers, wherein each of the first and second optical members includes a chamfer portion corresponding to the optical fiber triangular bar at the region where the first and second optical members are adjacent to each other.

Abstract: An electrical package may comprise a first substrate with a first substrate surface, and a microprocessor chip connected to the first substrate surface. The microprocessor chip may comprise a first chip surface that electrically connects to the first substrate surface, and a second chip surface located opposite the first chip surface. The electrical package may comprise a heat spreader assembly that comprises a lid section and a contact surface thermally connected to the second-chip surface. The electrical package may also comprise a pedestal between the contact surface and the lid section. The pedestal may comprise a first end that is located near the contact surface and a second end that is located near the lid section. The second end may be wider than the first end.

Abstract: This disclosure relates to the technical field of semiconductors, and discloses a semiconductor device and a manufacturing method therefor. The semiconductor device may include a substrate; a first fin on the substrate for forming a first electronic component; a first gate structure on a portion of the first fin including a first gate dielectric layer on a portion of the first fin and a first gate on the first gate dielectric layer; and a first source region and a first drain region that each at one of two sides of the first gate structure and at least partially located in the first fin, where the first gate dielectric layer comprises a first region abutting against the first drain region, a second region abutting against the first source region, and a third region between the first region and the second region, and wherein thickness of the first region is greater than that of the third region.

Abstract: According to one embodiment, an organic EL device includes an insulating substrate including a first main surface and a second main surface, a switching element formed on the insulating substrate at the first main surface side, a first electrode electrically connected to the switching element, a second electrode opposed to the first electrode, an organic luminescent layer disposed between the first electrode and the second electrode, a reflective plate disposed between the insulating substrate and the first electrode, and a conductive film covering the second main surface of the insulating substrate.

Abstract: A plasma processing apparatus, plasma processing method, and plasma processing analysis method in which a suitable combination of wavelength, time interval, and etching condition parameter for control to change etching conditions is determined among wavelengths, time intervals, and changeable parameters for spectroscopic measurement data in order to ensure stable etching conditions. Specifically, a regression equation which represents the correlation between emission intensity and etching result at a wavelength and a time interval is obtained for each of two or more combinations of wavelength, time interval, and etching condition parameter. Furthermore, for each of the combinations, the amount of change is calculated from the regression equation when the value set for the etching condition parameter is changed.

Abstract: A substrate has a first surface and a second surface facing each other. A photoelectric conversion region includes a plurality of photoelectric conversion devices provided in the substrate. An interlayered insulating layer is provided on the first surface of the substrate. A plurality of wires is provided on the interlayered insulating layer. An inter-wire insulating layer covers the plurality of wires. A plurality of micro lenses is provided on the second surface of the substrate. A grid pattern is provided in at least one of the interlayered insulating layer and the inter-wire insulating layer. The grid pattern, when viewed in a plan view, overlaps a region between two adjacent photoelectric conversion devices of the plurality of photoelectric conversion devices.

Abstract: A method of and system for adhesive bonding. The method and system a) treat a surface of an element to be bonded to provide an adherent structure including one or more rubber compounds on the surface; b) place a polymerizable adhesive composition, including at least one photoinitiator and at least one energy converting material, in contact with the adherent structure and two or more components to be bonded to form an assembly, c) irradiated the assembly with radiation at a first wavelength, capable of conversion by the at least one energy converting material, to a second wavelength capable of activating the at least one photoinitiator to produce from the polymerizable adhesive composition a cured adhesive composition; and d) adhesively join the two or more components by way of the adherent structure and the cured adhesive composition.

Abstract: A method of fabricating a semiconductor device includes forming a buried insulation region within a substrate by processing the substrate using etching and deposition processes. A semiconductor layer is formed over the buried insulation region at a first side of the substrate. Device regions are formed in the semiconductor layer. The substrate is thinned from a second side of the substrate to expose the buried insulation region. The buried insulation region is selectively removed to expose a bottom surface of the substrate. A conductive region is formed under the bottom surface of the substrate.

Abstract: A tapered roller bearing (31a) has a plurality of retainer segments (11a, 11d) each having a pocket to house a tapered roller (34a), and arranged so as to be continuously lined with each other in a circumferential direction between an outer ring (32a) and an inner ring (33a). The retainer segment (11a, 11d) is formed of a resin containing a filler material to lower a thermal linear expansion coefficient. In addition, a clearance (39a) is provided between the first retainer segment (11a) and the last retainer segment (11d) after the plurality of retainer segments (11a, 11d) have been arranged in the circumferential direction without providing any clearance. Here a circumferential range (R) of the clearance (39a) is larger than 0.075% of a circumference of a circle passing through a center of the retainer segment (11a, 11d) and smaller than 0.12% thereof at room temperature.